| at91_machdep.c (238354) | at91_machdep.c (238376) |
|---|---|
| 1/*- 2 * Copyright (c) 1994-1998 Mark Brinicombe. 3 * Copyright (c) 1994 Brini. 4 * All rights reserved. 5 * 6 * This code is derived from software written for Brini by Mark Brinicombe 7 * 8 * Redistribution and use in source and binary forms, with or without --- 30 unchanged lines hidden (view full) --- 39 * Machine dependant functions for kernel setup 40 * 41 * This file needs a lot of work. 42 * 43 * Created : 17/09/94 44 */ 45 46#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 1994-1998 Mark Brinicombe. 3 * Copyright (c) 1994 Brini. 4 * All rights reserved. 5 * 6 * This code is derived from software written for Brini by Mark Brinicombe 7 * 8 * Redistribution and use in source and binary forms, with or without --- 30 unchanged lines hidden (view full) --- 39 * Machine dependant functions for kernel setup 40 * 41 * This file needs a lot of work. 42 * 43 * Created : 17/09/94 44 */ 45 46#include <sys/cdefs.h> |
| 47__FBSDID("$FreeBSD: head/sys/arm/at91/at91_machdep.c 238354 2012-07-10 19:48:42Z imp $"); | 47__FBSDID("$FreeBSD: head/sys/arm/at91/at91_machdep.c 238376 2012-07-11 20:17:14Z imp $"); |
| 48 49#define _ARM32_BUS_DMA_PRIVATE 50#include <sys/param.h> 51#include <sys/systm.h> 52#include <sys/sysproto.h> 53#include <sys/signalvar.h> 54#include <sys/imgact.h> 55#include <sys/kernel.h> --- 29 unchanged lines hidden (view full) --- 85#include <machine/machdep.h> 86#include <machine/metadata.h> 87#include <machine/armreg.h> 88#include <machine/bus.h> 89#include <sys/reboot.h> 90 91#include <arm/at91/at91board.h> 92#include <arm/at91/at91var.h> | 48 49#define _ARM32_BUS_DMA_PRIVATE 50#include <sys/param.h> 51#include <sys/systm.h> 52#include <sys/sysproto.h> 53#include <sys/signalvar.h> 54#include <sys/imgact.h> 55#include <sys/kernel.h> --- 29 unchanged lines hidden (view full) --- 85#include <machine/machdep.h> 86#include <machine/metadata.h> 87#include <machine/armreg.h> 88#include <machine/bus.h> 89#include <sys/reboot.h> 90 91#include <arm/at91/at91board.h> 92#include <arm/at91/at91var.h> |
| 93#include <arm/at91/at91soc.h> |
|
| 93#include <arm/at91/at91_usartreg.h> 94#include <arm/at91/at91rm92reg.h> 95#include <arm/at91/at91sam9g20reg.h> 96 97/* Page table for mapping proc0 zero page */ 98#define KERNEL_PT_SYS 0 99#define KERNEL_PT_KERN 1 100#define KERNEL_PT_KERN_NUM 22 --- 172 unchanged lines hidden (view full) --- 273 [AT91_ST_SAM9M11] = "at91sam9m11", 274 [AT91_ST_SAM9G15] = "at91sam9g15", 275 [AT91_ST_SAM9G25] = "at91sam9g25", 276 [AT91_ST_SAM9G35] = "at91sam9g35", 277 [AT91_ST_SAM9X25] = "at91sam9x25", 278 [AT91_ST_SAM9X35] = "at91sam9x35", 279}; 280 | 94#include <arm/at91/at91_usartreg.h> 95#include <arm/at91/at91rm92reg.h> 96#include <arm/at91/at91sam9g20reg.h> 97 98/* Page table for mapping proc0 zero page */ 99#define KERNEL_PT_SYS 0 100#define KERNEL_PT_KERN 1 101#define KERNEL_PT_KERN_NUM 22 --- 172 unchanged lines hidden (view full) --- 274 [AT91_ST_SAM9M11] = "at91sam9m11", 275 [AT91_ST_SAM9G15] = "at91sam9g15", 276 [AT91_ST_SAM9G25] = "at91sam9g25", 277 [AT91_ST_SAM9G35] = "at91sam9g35", 278 [AT91_ST_SAM9X25] = "at91sam9x25", 279 [AT91_ST_SAM9X35] = "at91sam9x35", 280}; 281 |
| 281struct at91_soc_info soc_data; | 282struct at91_soc_info soc_info; |
| 282 283/* 284 * Read the SoC ID from the CIDR register and try to match it against the 285 * values we know. If we find a good one, we return true. If not, we 286 * return false. When we find a good one, we also find the subtype 287 * and CPU family. 288 */ 289static int 290at91_try_id(uint32_t dbgu_base) 291{ 292 uint32_t socid; 293 | 283 284/* 285 * Read the SoC ID from the CIDR register and try to match it against the 286 * values we know. If we find a good one, we return true. If not, we 287 * return false. When we find a good one, we also find the subtype 288 * and CPU family. 289 */ 290static int 291at91_try_id(uint32_t dbgu_base) 292{ 293 uint32_t socid; 294 |
| 294 soc_data.cidr = *(volatile uint32_t *)(AT91_BASE + dbgu_base + | 295 soc_info.cidr = *(volatile uint32_t *)(AT91_BASE + dbgu_base + |
| 295 DBGU_C1R); | 296 DBGU_C1R); |
| 296 socid = soc_data.cidr & ~AT91_CPU_VERSION_MASK; | 297 socid = soc_info.cidr & ~AT91_CPU_VERSION_MASK; |
| 297 | 298 |
| 298 soc_data.type = AT91_T_NONE; 299 soc_data.subtype = AT91_ST_NONE; 300 soc_data.family = (soc_data.cidr & AT91_CPU_FAMILY_MASK) >> 20; 301 soc_data.exid = *(volatile uint32_t *)(AT91_BASE + dbgu_base + | 299 soc_info.type = AT91_T_NONE; 300 soc_info.subtype = AT91_ST_NONE; 301 soc_info.family = (soc_info.cidr & AT91_CPU_FAMILY_MASK) >> 20; 302 soc_info.exid = *(volatile uint32_t *)(AT91_BASE + dbgu_base + |
| 302 DBGU_C2R); 303 304 switch (socid) { 305 case AT91_CPU_CAP9: | 303 DBGU_C2R); 304 305 switch (socid) { 306 case AT91_CPU_CAP9: |
| 306 soc_data.type = AT91_T_CAP9; | 307 soc_info.type = AT91_T_CAP9; |
| 307 break; 308 case AT91_CPU_RM9200: | 308 break; 309 case AT91_CPU_RM9200: |
| 309 soc_data.type = AT91_T_RM9200; | 310 soc_info.type = AT91_T_RM9200; |
| 310 break; 311 case AT91_CPU_SAM9XE128: 312 case AT91_CPU_SAM9XE256: 313 case AT91_CPU_SAM9XE512: 314 case AT91_CPU_SAM9260: | 311 break; 312 case AT91_CPU_SAM9XE128: 313 case AT91_CPU_SAM9XE256: 314 case AT91_CPU_SAM9XE512: 315 case AT91_CPU_SAM9260: |
| 315 soc_data.type = AT91_T_SAM9260; 316 if (soc_data.family == AT91_FAMILY_SAM9XE) 317 soc_data.subtype = AT91_ST_SAM9XE; | 316 soc_info.type = AT91_T_SAM9260; 317 if (soc_info.family == AT91_FAMILY_SAM9XE) 318 soc_info.subtype = AT91_ST_SAM9XE; |
| 318 break; 319 case AT91_CPU_SAM9261: | 319 break; 320 case AT91_CPU_SAM9261: |
| 320 soc_data.type = AT91_T_SAM9261; | 321 soc_info.type = AT91_T_SAM9261; |
| 321 break; 322 case AT91_CPU_SAM9263: | 322 break; 323 case AT91_CPU_SAM9263: |
| 323 soc_data.type = AT91_T_SAM9263; | 324 soc_info.type = AT91_T_SAM9263; |
| 324 break; 325 case AT91_CPU_SAM9G10: | 325 break; 326 case AT91_CPU_SAM9G10: |
| 326 soc_data.type = AT91_T_SAM9G10; | 327 soc_info.type = AT91_T_SAM9G10; |
| 327 break; 328 case AT91_CPU_SAM9G20: | 328 break; 329 case AT91_CPU_SAM9G20: |
| 329 soc_data.type = AT91_T_SAM9G20; | 330 soc_info.type = AT91_T_SAM9G20; |
| 330 break; 331 case AT91_CPU_SAM9G45: | 331 break; 332 case AT91_CPU_SAM9G45: |
| 332 soc_data.type = AT91_T_SAM9G45; | 333 soc_info.type = AT91_T_SAM9G45; |
| 333 break; 334 case AT91_CPU_SAM9N12: | 334 break; 335 case AT91_CPU_SAM9N12: |
| 335 soc_data.type = AT91_T_SAM9N12; | 336 soc_info.type = AT91_T_SAM9N12; |
| 336 break; 337 case AT91_CPU_SAM9RL64: | 337 break; 338 case AT91_CPU_SAM9RL64: |
| 338 soc_data.type = AT91_T_SAM9RL; | 339 soc_info.type = AT91_T_SAM9RL; |
| 339 break; 340 case AT91_CPU_SAM9X5: | 340 break; 341 case AT91_CPU_SAM9X5: |
| 341 soc_data.type = AT91_T_SAM9X5; | 342 soc_info.type = AT91_T_SAM9X5; |
| 342 break; 343 default: 344 return (0); 345 } 346 | 343 break; 344 default: 345 return (0); 346 } 347 |
| 347 switch (soc_data.type) { | 348 switch (soc_info.type) { |
| 348 case AT91_T_SAM9G45: | 349 case AT91_T_SAM9G45: |
| 349 switch (soc_data.exid) { | 350 switch (soc_info.exid) { |
| 350 case AT91_EXID_SAM9G45: | 351 case AT91_EXID_SAM9G45: |
| 351 soc_data.subtype = AT91_ST_SAM9G45; | 352 soc_info.subtype = AT91_ST_SAM9G45; |
| 352 break; 353 case AT91_EXID_SAM9G46: | 353 break; 354 case AT91_EXID_SAM9G46: |
| 354 soc_data.subtype = AT91_ST_SAM9G46; | 355 soc_info.subtype = AT91_ST_SAM9G46; |
| 355 break; 356 case AT91_EXID_SAM9M10: | 356 break; 357 case AT91_EXID_SAM9M10: |
| 357 soc_data.subtype = AT91_ST_SAM9M10; | 358 soc_info.subtype = AT91_ST_SAM9M10; |
| 358 break; 359 case AT91_EXID_SAM9M11: | 359 break; 360 case AT91_EXID_SAM9M11: |
| 360 soc_data.subtype = AT91_ST_SAM9M11; | 361 soc_info.subtype = AT91_ST_SAM9M11; |
| 361 break; 362 } 363 break; 364 case AT91_T_SAM9X5: | 362 break; 363 } 364 break; 365 case AT91_T_SAM9X5: |
| 365 switch (soc_data.exid) { | 366 switch (soc_info.exid) { |
| 366 case AT91_EXID_SAM9G15: | 367 case AT91_EXID_SAM9G15: |
| 367 soc_data.subtype = AT91_ST_SAM9G15; | 368 soc_info.subtype = AT91_ST_SAM9G15; |
| 368 break; 369 case AT91_EXID_SAM9G25: | 369 break; 370 case AT91_EXID_SAM9G25: |
| 370 soc_data.subtype = AT91_ST_SAM9G25; | 371 soc_info.subtype = AT91_ST_SAM9G25; |
| 371 break; 372 case AT91_EXID_SAM9G35: | 372 break; 373 case AT91_EXID_SAM9G35: |
| 373 soc_data.subtype = AT91_ST_SAM9G35; | 374 soc_info.subtype = AT91_ST_SAM9G35; |
| 374 break; 375 case AT91_EXID_SAM9X25: | 375 break; 376 case AT91_EXID_SAM9X25: |
| 376 soc_data.subtype = AT91_ST_SAM9X25; | 377 soc_info.subtype = AT91_ST_SAM9X25; |
| 377 break; 378 case AT91_EXID_SAM9X35: | 378 break; 379 case AT91_EXID_SAM9X35: |
| 379 soc_data.subtype = AT91_ST_SAM9X35; | 380 soc_info.subtype = AT91_ST_SAM9X35; |
| 380 break; 381 } 382 break; 383 default: 384 break; 385 } 386 /* | 381 break; 382 } 383 break; 384 default: 385 break; 386 } 387 /* |
| 387 * Disable interrupts | 388 * Disable interrupts in the DBGU unit... |
| 388 */ 389 *(volatile uint32_t *)(AT91_BASE + dbgu_base + USART_IDR) = 0xffffffff; 390 391 /* 392 * Save the name for later... 393 */ | 389 */ 390 *(volatile uint32_t *)(AT91_BASE + dbgu_base + USART_IDR) = 0xffffffff; 391 392 /* 393 * Save the name for later... 394 */ |
| 394 snprintf(soc_data.name, sizeof(soc_data.name), "%s%s%s", 395 soc_type_name[soc_data.type], 396 soc_data.subtype == AT91_ST_NONE ? "" : " subtype ", 397 soc_data.subtype == AT91_ST_NONE ? "" : 398 soc_subtype_name[soc_data.subtype]); | 395 snprintf(soc_info.name, sizeof(soc_info.name), "%s%s%s", 396 soc_type_name[soc_info.type], 397 soc_info.subtype == AT91_ST_NONE ? "" : " subtype ", 398 soc_info.subtype == AT91_ST_NONE ? "" : 399 soc_subtype_name[soc_info.subtype]); 400 401 /* 402 * try to get the matching CPU support. 403 */ 404 soc_info.soc_data = at91_match_soc(soc_info.type, soc_info.subtype); 405 |
| 399 return (1); 400} 401 402static void 403at91_soc_id(void) 404{ 405 406 if (!at91_try_id(AT91_DBGU0)) --- 136 unchanged lines hidden (view full) --- 543 544 at91_soc_id(); 545 546 /* Initialize all the clocks, so that the console can work */ 547 at91_pmc_init_clock(); 548 549 cninit(); 550 | 406 return (1); 407} 408 409static void 410at91_soc_id(void) 411{ 412 413 if (!at91_try_id(AT91_DBGU0)) --- 136 unchanged lines hidden (view full) --- 550 551 at91_soc_id(); 552 553 /* Initialize all the clocks, so that the console can work */ 554 at91_pmc_init_clock(); 555 556 cninit(); 557 |
| 558 if (soc_info.soc_data == NULL) 559 printf("Warning: No soc support for %s found.\n", soc_info.name); 560 |
|
| 551 memsize = board_init(); 552 physmem = memsize / PAGE_SIZE; 553 554 /* 555 * Pages were allocated during the secondary bootstrap for the 556 * stacks for different CPU modes. 557 * We must now set the r13 registers in the different CPU modes to 558 * point to these stacks. --- 73 unchanged lines hidden (view full) --- 632{ 633 634} 635 636void 637DELAY(int n) 638{ 639 | 561 memsize = board_init(); 562 physmem = memsize / PAGE_SIZE; 563 564 /* 565 * Pages were allocated during the secondary bootstrap for the 566 * stacks for different CPU modes. 567 * We must now set the r13 registers in the different CPU modes to 568 * point to these stacks. --- 73 unchanged lines hidden (view full) --- 642{ 643 644} 645 646void 647DELAY(int n) 648{ 649 |
| 640 if (soc_data.delay) 641 soc_data.delay(n); | 650 if (soc_info.soc_data) 651 soc_info.soc_data->soc_delay(n); |
| 642} 643 644void 645cpu_reset(void) 646{ 647 | 652} 653 654void 655cpu_reset(void) 656{ 657 |
| 648 if (soc_data.reset) 649 soc_data.reset(); | 658 if (soc_info.soc_data) 659 soc_info.soc_data->soc_reset(); |
| 650 while (1) 651 continue; 652} | 660 while (1) 661 continue; 662} |