| cpufunc_asm.S (129198) | cpufunc_asm.S (137463) |
|---|---|
| 1/* $NetBSD: cpufunc_asm.S,v 1.12 2003/09/06 09:14:52 rearnsha Exp $ */ 2 3/* 4 * Copyright (c) 1997,1998 Mark Brinicombe. 5 * Copyright (c) 1997 Causality Limited 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 29 unchanged lines hidden (view full) --- 38 * 39 * Assembly functions for CPU / MMU / TLB specific operations 40 * 41 * Created : 30/01/97 42 * 43 */ 44 45#include <machine/asm.h> | 1/* $NetBSD: cpufunc_asm.S,v 1.12 2003/09/06 09:14:52 rearnsha Exp $ */ 2 3/* 4 * Copyright (c) 1997,1998 Mark Brinicombe. 5 * Copyright (c) 1997 Causality Limited 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 29 unchanged lines hidden (view full) --- 38 * 39 * Assembly functions for CPU / MMU / TLB specific operations 40 * 41 * Created : 30/01/97 42 * 43 */ 44 45#include <machine/asm.h> |
| 46__FBSDID("$FreeBSD: head/sys/arm/arm/cpufunc_asm.S 129198 2004-05-14 11:46:45Z cognet $"); | 46__FBSDID("$FreeBSD: head/sys/arm/arm/cpufunc_asm.S 137463 2004-11-09 16:47:47Z cognet $"); |
| 47 48 .text 49 .align 0 50 51ENTRY(cpufunc_nullop) | 47 48 .text 49 .align 0 50 51ENTRY(cpufunc_nullop) |
| 52 mov pc, lr | 52 RET |
| 53 54/* 55 * Generic functions to read the internal coprocessor registers 56 * 57 * Currently these registers are : 58 * c0 - CPU ID 59 * c5 - Fault status 60 * c6 - Fault address 61 * 62 */ 63 64ENTRY(cpufunc_id) 65 mrc p15, 0, r0, c0, c0, 0 | 53 54/* 55 * Generic functions to read the internal coprocessor registers 56 * 57 * Currently these registers are : 58 * c0 - CPU ID 59 * c5 - Fault status 60 * c6 - Fault address 61 * 62 */ 63 64ENTRY(cpufunc_id) 65 mrc p15, 0, r0, c0, c0, 0 |
| 66 mov pc, lr | 66 RET |
| 67 68ENTRY(cpu_get_control) 69 mrc p15, 0, r0, c1, c0, 0 | 67 68ENTRY(cpu_get_control) 69 mrc p15, 0, r0, c1, c0, 0 |
| 70 mov pc, lr | 70 RET |
| 71 72ENTRY(cpu_read_cache_config) 73 mrc p15, 0, r0, c0, c0, 1 | 71 72ENTRY(cpu_read_cache_config) 73 mrc p15, 0, r0, c0, c0, 1 |
| 74 mov pc, lr | 74 RET |
| 75 76ENTRY(cpufunc_faultstatus) 77 mrc p15, 0, r0, c5, c0, 0 | 75 76ENTRY(cpufunc_faultstatus) 77 mrc p15, 0, r0, c5, c0, 0 |
| 78 mov pc, lr | 78 RET |
| 79 80ENTRY(cpufunc_faultaddress) 81 mrc p15, 0, r0, c6, c0, 0 | 79 80ENTRY(cpufunc_faultaddress) 81 mrc p15, 0, r0, c6, c0, 0 |
| 82 mov pc, lr | 82 RET |
| 83 84 85/* 86 * Generic functions to write the internal coprocessor registers 87 * 88 * 89 * Currently these registers are 90 * c1 - CPU Control 91 * c3 - Domain Access Control 92 * 93 * All other registers are CPU architecture specific 94 */ 95 96#if 0 /* See below. */ 97ENTRY(cpufunc_control) 98 mcr p15, 0, r0, c1, c0, 0 | 83 84 85/* 86 * Generic functions to write the internal coprocessor registers 87 * 88 * 89 * Currently these registers are 90 * c1 - CPU Control 91 * c3 - Domain Access Control 92 * 93 * All other registers are CPU architecture specific 94 */ 95 96#if 0 /* See below. */ 97ENTRY(cpufunc_control) 98 mcr p15, 0, r0, c1, c0, 0 |
| 99 mov pc, lr | 99 RET |
| 100#endif 101 102ENTRY(cpufunc_domains) 103 mcr p15, 0, r0, c3, c0, 0 | 100#endif 101 102ENTRY(cpufunc_domains) 103 mcr p15, 0, r0, c3, c0, 0 |
| 104 mov pc, lr | 104 RET |
| 105 106/* 107 * Generic functions to read/modify/write the internal coprocessor registers 108 * 109 * 110 * Currently these registers are 111 * c1 - CPU Control 112 * --- 7 unchanged lines hidden (view full) --- 120 121 122 teq r2, r3 /* Only write if there is a change */ 123 mcrne p15, 0, r2, c1, c0, 0 /* Write new control register */ 124 #if 0 125 mov r0, r3 /* Return old value */ 126 #endif 127 | 105 106/* 107 * Generic functions to read/modify/write the internal coprocessor registers 108 * 109 * 110 * Currently these registers are 111 * c1 - CPU Control 112 * --- 7 unchanged lines hidden (view full) --- 120 121 122 teq r2, r3 /* Only write if there is a change */ 123 mcrne p15, 0, r2, c1, c0, 0 /* Write new control register */ 124 #if 0 125 mov r0, r3 /* Return old value */ 126 #endif 127 |
| 128 mov pc, lr | 128 RET |
| 129.Lglou: 130 .asciz "plop %p\n" 131 .align 0 132/* 133 * other potentially useful software functions are: 134 * clean D cache entry and flush I cache entry 135 * for the moment use cache_purgeID_E 136 */ --- 21 unchanged lines hidden --- | 129.Lglou: 130 .asciz "plop %p\n" 131 .align 0 132/* 133 * other potentially useful software functions are: 134 * clean D cache entry and flush I cache entry 135 * for the moment use cache_purgeID_E 136 */ --- 21 unchanged lines hidden --- |