| x86.c (280839) | x86.c (284900) |
|---|---|
| 1/*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: stable/10/sys/amd64/vmm/x86.c 280839 2015-03-30 07:11:49Z mav $ | 26 * $FreeBSD: stable/10/sys/amd64/vmm/x86.c 284900 2015-06-28 03:22:26Z neel $ |
| 27 */ 28 29#include <sys/cdefs.h> | 27 */ 28 29#include <sys/cdefs.h> |
| 30__FBSDID("$FreeBSD: stable/10/sys/amd64/vmm/x86.c 280839 2015-03-30 07:11:49Z mav $"); | 30__FBSDID("$FreeBSD: stable/10/sys/amd64/vmm/x86.c 284900 2015-06-28 03:22:26Z neel $"); |
| 31 32#include <sys/param.h> 33#include <sys/pcpu.h> 34#include <sys/systm.h> | 31 32#include <sys/param.h> 33#include <sys/pcpu.h> 34#include <sys/systm.h> |
| 35#include <sys/cpuset.h> | |
| 36#include <sys/sysctl.h> 37 38#include <machine/clock.h> 39#include <machine/cpufunc.h> 40#include <machine/md_var.h> 41#include <machine/segments.h> 42#include <machine/specialreg.h> 43 --- 182 unchanged lines hidden (view full) --- 226 227 /* 228 * Override the APIC ID only in ebx 229 */ 230 regs[1] &= ~(CPUID_LOCAL_APIC_ID); 231 regs[1] |= (vcpu_id << CPUID_0000_0001_APICID_SHIFT); 232 233 /* | 35#include <sys/sysctl.h> 36 37#include <machine/clock.h> 38#include <machine/cpufunc.h> 39#include <machine/md_var.h> 40#include <machine/segments.h> 41#include <machine/specialreg.h> 42 --- 182 unchanged lines hidden (view full) --- 225 226 /* 227 * Override the APIC ID only in ebx 228 */ 229 regs[1] &= ~(CPUID_LOCAL_APIC_ID); 230 regs[1] |= (vcpu_id << CPUID_0000_0001_APICID_SHIFT); 231 232 /* |
| 234 * Don't expose VMX, SpeedStep or TME capability. | 233 * Don't expose VMX, SpeedStep, TME or SMX capability. |
| 235 * Advertise x2APIC capability and Hypervisor guest. 236 */ 237 regs[2] &= ~(CPUID2_VMX | CPUID2_EST | CPUID2_TM2); | 234 * Advertise x2APIC capability and Hypervisor guest. 235 */ 236 regs[2] &= ~(CPUID2_VMX | CPUID2_EST | CPUID2_TM2); |
| 237 regs[2] &= ~(CPUID2_SMX); |
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| 238 239 regs[2] |= CPUID2_HV; 240 241 if (x2apic_state != X2APIC_DISABLED) 242 regs[2] |= CPUID2_X2APIC; 243 else 244 regs[2] &= ~CPUID2_X2APIC; 245 --- 35 unchanged lines hidden (view full) --- 281 * No TSC deadline support in the APIC yet 282 */ 283 regs[2] &= ~CPUID2_TSCDLT; 284 285 /* 286 * Hide thermal monitoring 287 */ 288 regs[3] &= ~(CPUID_ACPI | CPUID_TM); | 238 239 regs[2] |= CPUID2_HV; 240 241 if (x2apic_state != X2APIC_DISABLED) 242 regs[2] |= CPUID2_X2APIC; 243 else 244 regs[2] &= ~CPUID2_X2APIC; 245 --- 35 unchanged lines hidden (view full) --- 281 * No TSC deadline support in the APIC yet 282 */ 283 regs[2] &= ~CPUID2_TSCDLT; 284 285 /* 286 * Hide thermal monitoring 287 */ 288 regs[3] &= ~(CPUID_ACPI | CPUID_TM); |
| 289 | 289 |
| 290 /* | 290 /* |
| 291 * Machine check handling is done in the host. 292 * Hide MTRR capability. | 291 * Hide the debug store capability. |
| 293 */ | 292 */ |
| 294 regs[3] &= ~(CPUID_MCA | CPUID_MCE | CPUID_MTRR); 295 296 /* 297 * Hide the debug store capability. 298 */ | |
| 299 regs[3] &= ~CPUID_DS; 300 | 293 regs[3] &= ~CPUID_DS; 294 |
| 295 /* 296 * Advertise the Machine Check and MTRR capability. 297 * 298 * Some guest OSes (e.g. Windows) will not boot if 299 * these features are absent. 300 */ 301 regs[3] |= (CPUID_MCA | CPUID_MCE | CPUID_MTRR); 302 |
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| 301 logical_cpus = threads_per_core * cores_per_package; 302 regs[1] &= ~CPUID_HTT_CORES; 303 regs[1] |= (logical_cpus & 0xff) << 16; 304 regs[3] |= CPUID_HTT; 305 break; 306 307 case CPUID_0000_0004: 308 cpuid_count(*eax, *ecx, regs); --- 172 unchanged lines hidden (view full) --- 481 482 *eax = regs[0]; 483 *ebx = regs[1]; 484 *ecx = regs[2]; 485 *edx = regs[3]; 486 487 return (1); 488} | 303 logical_cpus = threads_per_core * cores_per_package; 304 regs[1] &= ~CPUID_HTT_CORES; 305 regs[1] |= (logical_cpus & 0xff) << 16; 306 regs[3] |= CPUID_HTT; 307 break; 308 309 case CPUID_0000_0004: 310 cpuid_count(*eax, *ecx, regs); --- 172 unchanged lines hidden (view full) --- 483 484 *eax = regs[0]; 485 *ebx = regs[1]; 486 *ecx = regs[2]; 487 *edx = regs[3]; 488 489 return (1); 490} |
| 491 492bool 493vm_cpuid_capability(struct vm *vm, int vcpuid, enum vm_cpuid_capability cap) 494{ 495 bool rv; 496 497 KASSERT(cap > 0 && cap < VCC_LAST, ("%s: invalid vm_cpu_capability %d", 498 __func__, cap)); 499 500 /* 501 * Simply passthrough the capabilities of the host cpu for now. 502 */ 503 rv = false; 504 switch (cap) { 505 case VCC_NO_EXECUTE: 506 if (amd_feature & AMDID_NX) 507 rv = true; 508 break; 509 case VCC_FFXSR: 510 if (amd_feature & AMDID_FFXSR) 511 rv = true; 512 break; 513 case VCC_TCE: 514 if (amd_feature2 & AMDID2_TCE) 515 rv = true; 516 break; 517 default: 518 panic("%s: unknown vm_cpu_capability %d", __func__, cap); 519 } 520 return (rv); 521} |
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