| vmx_msr.c (284894) | vmx_msr.c (284900) |
|---|---|
| 1/*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: stable/10/sys/amd64/vmm/intel/vmx_msr.c 284894 2015-06-27 22:48:22Z neel $ | 26 * $FreeBSD: stable/10/sys/amd64/vmm/intel/vmx_msr.c 284900 2015-06-28 03:22:26Z neel $ |
| 27 */ 28 29#include <sys/cdefs.h> | 27 */ 28 29#include <sys/cdefs.h> |
| 30__FBSDID("$FreeBSD: stable/10/sys/amd64/vmm/intel/vmx_msr.c 284894 2015-06-27 22:48:22Z neel $"); | 30__FBSDID("$FreeBSD: stable/10/sys/amd64/vmm/intel/vmx_msr.c 284900 2015-06-28 03:22:26Z neel $"); |
| 31 32#include <sys/param.h> 33#include <sys/systm.h> | 31 32#include <sys/param.h> 33#include <sys/systm.h> |
| 34#include <sys/cpuset.h> | |
| 35 36#include <machine/clock.h> 37#include <machine/cpufunc.h> 38#include <machine/md_var.h> 39#include <machine/specialreg.h> 40#include <machine/vmm.h> 41 42#include "vmx.h" --- 348 unchanged lines hidden (view full) --- 391{ 392 const uint64_t *guest_msrs; 393 int error; 394 395 guest_msrs = vmx->guest_msrs[vcpuid]; 396 error = 0; 397 398 switch (num) { | 34 35#include <machine/clock.h> 36#include <machine/cpufunc.h> 37#include <machine/md_var.h> 38#include <machine/specialreg.h> 39#include <machine/vmm.h> 40 41#include "vmx.h" --- 348 unchanged lines hidden (view full) --- 390{ 391 const uint64_t *guest_msrs; 392 int error; 393 394 guest_msrs = vmx->guest_msrs[vcpuid]; 395 error = 0; 396 397 switch (num) { |
| 398 case MSR_MCG_CAP: 399 case MSR_MCG_STATUS: 400 *val = 0; 401 break; 402 case MSR_MTRRcap: 403 case MSR_MTRRdefType: 404 case MSR_MTRR4kBase ... MSR_MTRR4kBase + 8: 405 case MSR_MTRR16kBase ... MSR_MTRR16kBase + 1: 406 case MSR_MTRR64kBase: 407 *val = 0; 408 break; |
|
| 399 case MSR_IA32_MISC_ENABLE: 400 *val = misc_enable; 401 break; 402 case MSR_PLATFORM_INFO: 403 *val = platform_info; 404 break; 405 case MSR_TURBO_RATIO_LIMIT: 406 case MSR_TURBO_RATIO_LIMIT1: --- 15 unchanged lines hidden (view full) --- 422 uint64_t *guest_msrs; 423 uint64_t changed; 424 int error; 425 426 guest_msrs = vmx->guest_msrs[vcpuid]; 427 error = 0; 428 429 switch (num) { | 409 case MSR_IA32_MISC_ENABLE: 410 *val = misc_enable; 411 break; 412 case MSR_PLATFORM_INFO: 413 *val = platform_info; 414 break; 415 case MSR_TURBO_RATIO_LIMIT: 416 case MSR_TURBO_RATIO_LIMIT1: --- 15 unchanged lines hidden (view full) --- 432 uint64_t *guest_msrs; 433 uint64_t changed; 434 int error; 435 436 guest_msrs = vmx->guest_msrs[vcpuid]; 437 error = 0; 438 439 switch (num) { |
| 440 case MSR_MCG_CAP: 441 case MSR_MCG_STATUS: 442 break; /* ignore writes */ 443 case MSR_MTRRcap: 444 vm_inject_gp(vmx->vm, vcpuid); 445 break; 446 case MSR_MTRRdefType: 447 case MSR_MTRR4kBase ... MSR_MTRR4kBase + 8: 448 case MSR_MTRR16kBase ... MSR_MTRR16kBase + 1: 449 case MSR_MTRR64kBase: 450 break; /* Ignore writes */ |
|
| 430 case MSR_IA32_MISC_ENABLE: 431 changed = val ^ misc_enable; 432 /* 433 * If the host has disabled the NX feature then the guest 434 * also cannot use it. However, a Linux guest will try to 435 * enable the NX feature by writing to the MISC_ENABLE MSR. 436 * 437 * This can be safely ignored because the memory management --- 10 unchanged lines hidden (view full) --- 448 449 break; 450 case MSR_PAT: 451 if (pat_valid(val)) 452 guest_msrs[IDX_MSR_PAT] = val; 453 else 454 vm_inject_gp(vmx->vm, vcpuid); 455 break; | 451 case MSR_IA32_MISC_ENABLE: 452 changed = val ^ misc_enable; 453 /* 454 * If the host has disabled the NX feature then the guest 455 * also cannot use it. However, a Linux guest will try to 456 * enable the NX feature by writing to the MISC_ENABLE MSR. 457 * 458 * This can be safely ignored because the memory management --- 10 unchanged lines hidden (view full) --- 469 470 break; 471 case MSR_PAT: 472 if (pat_valid(val)) 473 guest_msrs[IDX_MSR_PAT] = val; 474 else 475 vm_inject_gp(vmx->vm, vcpuid); 476 break; |
| 477 case MSR_TSC: 478 error = vmx_set_tsc_offset(vmx, vcpuid, val - rdtsc()); 479 break; |
|
| 456 default: 457 error = EINVAL; 458 break; 459 } 460 461 return (error); 462} | 480 default: 481 error = EINVAL; 482 break; 483 } 484 485 return (error); 486} |