specialreg.h (120352) | specialreg.h (122292) |
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1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 17 unchanged lines hidden (view full) --- 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * from: @(#)specialreg.h 7.1 (Berkeley) 5/9/91 | 1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 17 unchanged lines hidden (view full) --- 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * from: @(#)specialreg.h 7.1 (Berkeley) 5/9/91 |
34 * $FreeBSD: head/sys/amd64/include/specialreg.h 120352 2003-09-22 22:51:46Z peter $ | 34 * $FreeBSD: head/sys/amd64/include/specialreg.h 122292 2003-11-08 03:33:38Z peter $ |
35 */ 36 37#ifndef _MACHINE_SPECIALREG_H_ 38#define _MACHINE_SPECIALREG_H_ 39 40/* 41 * Bits in 386 special registers: 42 */ 43#define CR0_PE 0x00000001 /* Protected mode Enable */ | 35 */ 36 37#ifndef _MACHINE_SPECIALREG_H_ 38#define _MACHINE_SPECIALREG_H_ 39 40/* 41 * Bits in 386 special registers: 42 */ 43#define CR0_PE 0x00000001 /* Protected mode Enable */ |
44#define CR0_MP 0x00000002 /* "Math" Present (NPX or NPX emulator) */ 45#define CR0_EM 0x00000004 /* EMulate non-NPX coproc. (trap ESC only) */ | 44#define CR0_MP 0x00000002 /* "Math" (fpu) Present */ 45#define CR0_EM 0x00000004 /* EMulate FPU instructions. (trap ESC only) */ |
46#define CR0_TS 0x00000008 /* Task Switched (if MP, trap ESC and WAIT) */ | 46#define CR0_TS 0x00000008 /* Task Switched (if MP, trap ESC and WAIT) */ |
47#ifdef notused 48#define CR0_ET 0x00000010 /* Extension Type (387 (if set) vs 287) */ 49#endif | |
50#define CR0_PG 0x80000000 /* PaGing enable */ 51 52/* 53 * Bits in 486 special registers: 54 */ 55#define CR0_NE 0x00000020 /* Numeric Error enable (EX16 vs IRQ13) */ 56#define CR0_WP 0x00010000 /* Write Protect (honor page protect in 57 all modes) */ --- 291 unchanged lines hidden --- | 47#define CR0_PG 0x80000000 /* PaGing enable */ 48 49/* 50 * Bits in 486 special registers: 51 */ 52#define CR0_NE 0x00000020 /* Numeric Error enable (EX16 vs IRQ13) */ 53#define CR0_WP 0x00010000 /* Write Protect (honor page protect in 54 all modes) */ --- 291 unchanged lines hidden --- |