1/*-
2 * Copyright (c) 2005 Peter Wemm
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
| 1/*-
2 * Copyright (c) 2005 Peter Wemm
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
|
26 * $FreeBSD: head/sys/amd64/ia32/ia32_reg.c 216634 2010-12-22 00:18:42Z jkim $
| 26 * $FreeBSD: head/sys/amd64/ia32/ia32_reg.c 230426 2012-01-21 17:45:27Z kib $
|
27 */
28
29#include <sys/cdefs.h>
| 27 */
28
29#include <sys/cdefs.h>
|
30__FBSDID("$FreeBSD: head/sys/amd64/ia32/ia32_reg.c 216634 2010-12-22 00:18:42Z jkim $");
| 30__FBSDID("$FreeBSD: head/sys/amd64/ia32/ia32_reg.c 230426 2012-01-21 17:45:27Z kib $");
|
31
32#include "opt_compat.h"
33
34#include <sys/param.h>
35#include <sys/exec.h>
36#include <sys/fcntl.h>
37#include <sys/imgact.h>
38#include <sys/kernel.h>
39#include <sys/lock.h>
40#include <sys/malloc.h>
41#include <sys/mutex.h>
42#include <sys/mman.h>
43#include <sys/namei.h>
44#include <sys/pioctl.h>
45#include <sys/proc.h>
46#include <sys/procfs.h>
47#include <sys/resourcevar.h>
48#include <sys/systm.h>
49#include <sys/signalvar.h>
50#include <sys/stat.h>
51#include <sys/sx.h>
52#include <sys/syscall.h>
53#include <sys/sysctl.h>
54#include <sys/sysent.h>
55#include <sys/vnode.h>
56
57#include <vm/vm.h>
58#include <vm/vm_kern.h>
59#include <vm/vm_param.h>
60#include <vm/pmap.h>
61#include <vm/vm_map.h>
62#include <vm/vm_object.h>
63#include <vm/vm_extern.h>
64
65#include <compat/freebsd32/freebsd32_util.h>
66#include <compat/freebsd32/freebsd32_proto.h>
67#include <machine/fpu.h>
68#include <compat/ia32/ia32_reg.h>
69#include <machine/psl.h>
70#include <machine/segments.h>
71#include <machine/specialreg.h>
72#include <machine/frame.h>
73#include <machine/md_var.h>
74#include <machine/pcb.h>
75#include <machine/cpufunc.h>
76
77#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
78#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
79
80int
81fill_regs32(struct thread *td, struct reg32 *regs)
82{
83 struct pcb *pcb;
84 struct trapframe *tp;
85
86 tp = td->td_frame;
87 pcb = td->td_pcb;
88 if (tp->tf_flags & TF_HASSEGS) {
89 regs->r_gs = tp->tf_gs;
90 regs->r_fs = tp->tf_fs;
91 regs->r_es = tp->tf_es;
92 regs->r_ds = tp->tf_ds;
93 } else {
94 regs->r_gs = _ugssel;
95 regs->r_fs = _ufssel;
96 regs->r_es = _udatasel;
97 regs->r_ds = _udatasel;
98 }
99 regs->r_edi = tp->tf_rdi;
100 regs->r_esi = tp->tf_rsi;
101 regs->r_ebp = tp->tf_rbp;
102 regs->r_ebx = tp->tf_rbx;
103 regs->r_edx = tp->tf_rdx;
104 regs->r_ecx = tp->tf_rcx;
105 regs->r_eax = tp->tf_rax;
106 regs->r_eip = tp->tf_rip;
107 regs->r_cs = tp->tf_cs;
108 regs->r_eflags = tp->tf_rflags;
109 regs->r_esp = tp->tf_rsp;
110 regs->r_ss = tp->tf_ss;
111 return (0);
112}
113
114int
115set_regs32(struct thread *td, struct reg32 *regs)
116{
117 struct pcb *pcb;
118 struct trapframe *tp;
119
120 tp = td->td_frame;
121 if (!EFL_SECURE(regs->r_eflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
122 return (EINVAL);
123 pcb = td->td_pcb;
124 tp->tf_gs = regs->r_gs;
125 tp->tf_fs = regs->r_fs;
126 tp->tf_es = regs->r_es;
127 tp->tf_ds = regs->r_ds;
128 set_pcb_flags(pcb, PCB_FULL_IRET);
129 tp->tf_flags = TF_HASSEGS;
130 tp->tf_rdi = regs->r_edi;
131 tp->tf_rsi = regs->r_esi;
132 tp->tf_rbp = regs->r_ebp;
133 tp->tf_rbx = regs->r_ebx;
134 tp->tf_rdx = regs->r_edx;
135 tp->tf_rcx = regs->r_ecx;
136 tp->tf_rax = regs->r_eax;
137 tp->tf_rip = regs->r_eip;
138 tp->tf_cs = regs->r_cs;
139 tp->tf_rflags = regs->r_eflags;
140 tp->tf_rsp = regs->r_esp;
141 tp->tf_ss = regs->r_ss;
142 return (0);
143}
144
145int
146fill_fpregs32(struct thread *td, struct fpreg32 *regs)
147{
148 struct savefpu *sv_fpu;
149 struct save87 *sv_87;
150 struct env87 *penv_87;
151 struct envxmm *penv_xmm;
152 int i;
153
154 bzero(regs, sizeof(*regs));
155 sv_87 = (struct save87 *)regs;
156 penv_87 = &sv_87->sv_env;
157 fpugetregs(td);
| 31
32#include "opt_compat.h"
33
34#include <sys/param.h>
35#include <sys/exec.h>
36#include <sys/fcntl.h>
37#include <sys/imgact.h>
38#include <sys/kernel.h>
39#include <sys/lock.h>
40#include <sys/malloc.h>
41#include <sys/mutex.h>
42#include <sys/mman.h>
43#include <sys/namei.h>
44#include <sys/pioctl.h>
45#include <sys/proc.h>
46#include <sys/procfs.h>
47#include <sys/resourcevar.h>
48#include <sys/systm.h>
49#include <sys/signalvar.h>
50#include <sys/stat.h>
51#include <sys/sx.h>
52#include <sys/syscall.h>
53#include <sys/sysctl.h>
54#include <sys/sysent.h>
55#include <sys/vnode.h>
56
57#include <vm/vm.h>
58#include <vm/vm_kern.h>
59#include <vm/vm_param.h>
60#include <vm/pmap.h>
61#include <vm/vm_map.h>
62#include <vm/vm_object.h>
63#include <vm/vm_extern.h>
64
65#include <compat/freebsd32/freebsd32_util.h>
66#include <compat/freebsd32/freebsd32_proto.h>
67#include <machine/fpu.h>
68#include <compat/ia32/ia32_reg.h>
69#include <machine/psl.h>
70#include <machine/segments.h>
71#include <machine/specialreg.h>
72#include <machine/frame.h>
73#include <machine/md_var.h>
74#include <machine/pcb.h>
75#include <machine/cpufunc.h>
76
77#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
78#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
79
80int
81fill_regs32(struct thread *td, struct reg32 *regs)
82{
83 struct pcb *pcb;
84 struct trapframe *tp;
85
86 tp = td->td_frame;
87 pcb = td->td_pcb;
88 if (tp->tf_flags & TF_HASSEGS) {
89 regs->r_gs = tp->tf_gs;
90 regs->r_fs = tp->tf_fs;
91 regs->r_es = tp->tf_es;
92 regs->r_ds = tp->tf_ds;
93 } else {
94 regs->r_gs = _ugssel;
95 regs->r_fs = _ufssel;
96 regs->r_es = _udatasel;
97 regs->r_ds = _udatasel;
98 }
99 regs->r_edi = tp->tf_rdi;
100 regs->r_esi = tp->tf_rsi;
101 regs->r_ebp = tp->tf_rbp;
102 regs->r_ebx = tp->tf_rbx;
103 regs->r_edx = tp->tf_rdx;
104 regs->r_ecx = tp->tf_rcx;
105 regs->r_eax = tp->tf_rax;
106 regs->r_eip = tp->tf_rip;
107 regs->r_cs = tp->tf_cs;
108 regs->r_eflags = tp->tf_rflags;
109 regs->r_esp = tp->tf_rsp;
110 regs->r_ss = tp->tf_ss;
111 return (0);
112}
113
114int
115set_regs32(struct thread *td, struct reg32 *regs)
116{
117 struct pcb *pcb;
118 struct trapframe *tp;
119
120 tp = td->td_frame;
121 if (!EFL_SECURE(regs->r_eflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
122 return (EINVAL);
123 pcb = td->td_pcb;
124 tp->tf_gs = regs->r_gs;
125 tp->tf_fs = regs->r_fs;
126 tp->tf_es = regs->r_es;
127 tp->tf_ds = regs->r_ds;
128 set_pcb_flags(pcb, PCB_FULL_IRET);
129 tp->tf_flags = TF_HASSEGS;
130 tp->tf_rdi = regs->r_edi;
131 tp->tf_rsi = regs->r_esi;
132 tp->tf_rbp = regs->r_ebp;
133 tp->tf_rbx = regs->r_ebx;
134 tp->tf_rdx = regs->r_edx;
135 tp->tf_rcx = regs->r_ecx;
136 tp->tf_rax = regs->r_eax;
137 tp->tf_rip = regs->r_eip;
138 tp->tf_cs = regs->r_cs;
139 tp->tf_rflags = regs->r_eflags;
140 tp->tf_rsp = regs->r_esp;
141 tp->tf_ss = regs->r_ss;
142 return (0);
143}
144
145int
146fill_fpregs32(struct thread *td, struct fpreg32 *regs)
147{
148 struct savefpu *sv_fpu;
149 struct save87 *sv_87;
150 struct env87 *penv_87;
151 struct envxmm *penv_xmm;
152 int i;
153
154 bzero(regs, sizeof(*regs));
155 sv_87 = (struct save87 *)regs;
156 penv_87 = &sv_87->sv_env;
157 fpugetregs(td);
|
158 sv_fpu = &td->td_pcb->pcb_user_save;
| 158 sv_fpu = get_pcb_user_save_td(td);
|
159 penv_xmm = &sv_fpu->sv_env;
160
161 /* FPU control/status */
162 penv_87->en_cw = penv_xmm->en_cw;
163 penv_87->en_sw = penv_xmm->en_sw;
164 penv_87->en_tw = penv_xmm->en_tw;
165 /*
166 * XXX for en_fip/fcs/foo/fos, check if the fxsave format
167 * uses the old-style layout for 32 bit user apps. If so,
168 * read the ip and operand segment registers from there.
169 * For now, use the process's %cs/%ds.
170 */
171 penv_87->en_fip = penv_xmm->en_rip;
172 penv_87->en_fcs = td->td_frame->tf_cs;
173 penv_87->en_opcode = penv_xmm->en_opcode;
174 penv_87->en_foo = penv_xmm->en_rdp;
175 /* Entry into the kernel always sets TF_HASSEGS */
176 penv_87->en_fos = td->td_frame->tf_ds;
177
178 /* FPU registers */
179 for (i = 0; i < 8; ++i)
180 sv_87->sv_ac[i] = sv_fpu->sv_fp[i].fp_acc;
181
182 return (0);
183}
184
185int
186set_fpregs32(struct thread *td, struct fpreg32 *regs)
187{
188 struct save87 *sv_87 = (struct save87 *)regs;
189 struct env87 *penv_87 = &sv_87->sv_env;
| 159 penv_xmm = &sv_fpu->sv_env;
160
161 /* FPU control/status */
162 penv_87->en_cw = penv_xmm->en_cw;
163 penv_87->en_sw = penv_xmm->en_sw;
164 penv_87->en_tw = penv_xmm->en_tw;
165 /*
166 * XXX for en_fip/fcs/foo/fos, check if the fxsave format
167 * uses the old-style layout for 32 bit user apps. If so,
168 * read the ip and operand segment registers from there.
169 * For now, use the process's %cs/%ds.
170 */
171 penv_87->en_fip = penv_xmm->en_rip;
172 penv_87->en_fcs = td->td_frame->tf_cs;
173 penv_87->en_opcode = penv_xmm->en_opcode;
174 penv_87->en_foo = penv_xmm->en_rdp;
175 /* Entry into the kernel always sets TF_HASSEGS */
176 penv_87->en_fos = td->td_frame->tf_ds;
177
178 /* FPU registers */
179 for (i = 0; i < 8; ++i)
180 sv_87->sv_ac[i] = sv_fpu->sv_fp[i].fp_acc;
181
182 return (0);
183}
184
185int
186set_fpregs32(struct thread *td, struct fpreg32 *regs)
187{
188 struct save87 *sv_87 = (struct save87 *)regs;
189 struct env87 *penv_87 = &sv_87->sv_env;
|
190 struct savefpu *sv_fpu = &td->td_pcb->pcb_user_save;
| 190 struct savefpu *sv_fpu = get_pcb_user_save_td(td);
|
191 struct envxmm *penv_xmm = &sv_fpu->sv_env;
192 int i;
193
194 /* FPU control/status */
195 penv_xmm->en_cw = penv_87->en_cw;
196 penv_xmm->en_sw = penv_87->en_sw;
197 penv_xmm->en_tw = penv_87->en_tw;
198 penv_xmm->en_rip = penv_87->en_fip;
199 /* penv_87->en_fcs and en_fos ignored, see above */
200 penv_xmm->en_opcode = penv_87->en_opcode;
201 penv_xmm->en_rdp = penv_87->en_foo;
202
203 /* FPU registers */
204 for (i = 0; i < 8; ++i)
205 sv_fpu->sv_fp[i].fp_acc = sv_87->sv_ac[i];
206 for (i = 8; i < 16; ++i)
207 bzero(&sv_fpu->sv_fp[i].fp_acc, sizeof(sv_fpu->sv_fp[i].fp_acc));
208 fpuuserinited(td);
209
210 return (0);
211}
212
213int
214fill_dbregs32(struct thread *td, struct dbreg32 *regs)
215{
216 struct dbreg dr;
217 int err, i;
218
219 err = fill_dbregs(td, &dr);
220 for (i = 0; i < 8; i++)
221 regs->dr[i] = dr.dr[i];
222 return (err);
223}
224
225int
226set_dbregs32(struct thread *td, struct dbreg32 *regs)
227{
228 struct dbreg dr;
229 int i;
230
231 for (i = 0; i < 8; i++)
232 dr.dr[i] = regs->dr[i];
233 for (i = 8; i < 16; i++)
234 dr.dr[i] = 0;
235 return (set_dbregs(td, &dr));
236}
| 191 struct envxmm *penv_xmm = &sv_fpu->sv_env;
192 int i;
193
194 /* FPU control/status */
195 penv_xmm->en_cw = penv_87->en_cw;
196 penv_xmm->en_sw = penv_87->en_sw;
197 penv_xmm->en_tw = penv_87->en_tw;
198 penv_xmm->en_rip = penv_87->en_fip;
199 /* penv_87->en_fcs and en_fos ignored, see above */
200 penv_xmm->en_opcode = penv_87->en_opcode;
201 penv_xmm->en_rdp = penv_87->en_foo;
202
203 /* FPU registers */
204 for (i = 0; i < 8; ++i)
205 sv_fpu->sv_fp[i].fp_acc = sv_87->sv_ac[i];
206 for (i = 8; i < 16; ++i)
207 bzero(&sv_fpu->sv_fp[i].fp_acc, sizeof(sv_fpu->sv_fp[i].fp_acc));
208 fpuuserinited(td);
209
210 return (0);
211}
212
213int
214fill_dbregs32(struct thread *td, struct dbreg32 *regs)
215{
216 struct dbreg dr;
217 int err, i;
218
219 err = fill_dbregs(td, &dr);
220 for (i = 0; i < 8; i++)
221 regs->dr[i] = dr.dr[i];
222 return (err);
223}
224
225int
226set_dbregs32(struct thread *td, struct dbreg32 *regs)
227{
228 struct dbreg dr;
229 int i;
230
231 for (i = 0; i < 8; i++)
232 dr.dr[i] = regs->dr[i];
233 for (i = 8; i < 16; i++)
234 dr.dr[i] = 0;
235 return (set_dbregs(td, &dr));
236}
|