| mpboot.S (121755) | mpboot.S (121996) |
|---|---|
| 1/* 2 * Copyright (c) 1995, Jack F. Vogel 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 17 unchanged lines hidden (view full) --- 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * mpboot.s: FreeBSD machine support for the Intel MP Spec 32 * multiprocessor systems. 33 * | 1/* 2 * Copyright (c) 1995, Jack F. Vogel 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 17 unchanged lines hidden (view full) --- 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * mpboot.s: FreeBSD machine support for the Intel MP Spec 32 * multiprocessor systems. 33 * |
| 34 * $FreeBSD: head/sys/amd64/amd64/mpboot.S 121755 2003-10-30 21:42:44Z jhb $ | 34 * $FreeBSD: head/sys/amd64/amd64/mpboot.S 121996 2003-11-03 22:32:04Z jhb $ |
| 35 */ 36 37#include "opt_pmap.h" 38 39#include <machine/asmacros.h> /* miscellaneous asm macros */ | 35 */ 36 37#include "opt_pmap.h" 38 39#include <machine/asmacros.h> /* miscellaneous asm macros */ |
| 40#include | 40#include <machine/apicreg.h> |
| 41#include <machine/specialreg.h> 42 43#include "assym.s" 44 45#define R(x) ((x)-KERNBASE) 46 47/* 48 * this code MUST be enabled here and in mp_machdep.c --- 23 unchanged lines hidden (view full) --- 72 73/* 74 * the APs enter here from their trampoline code (bootMP, below) 75 */ 76 .p2align 4 77 78NON_GPROF_ENTRY(MPentry) 79 CHECKPOINT(0x36, 3) | 41#include <machine/specialreg.h> 42 43#include "assym.s" 44 45#define R(x) ((x)-KERNBASE) 46 47/* 48 * this code MUST be enabled here and in mp_machdep.c --- 23 unchanged lines hidden (view full) --- 72 73/* 74 * the APs enter here from their trampoline code (bootMP, below) 75 */ 76 .p2align 4 77 78NON_GPROF_ENTRY(MPentry) 79 CHECKPOINT(0x36, 3) |
| 80 /* 81 * Enable features on this processor. We don't support SMP on 82 * CPUs older than a Pentium, so we know that we can use the cpuid 83 * instruction. 84 */ 85 movl $1,%eax 86 cpuid /* Retrieve features */ 87 movl %cr4,%eax 88#ifndef DISABLE_PSE 89 testl $CPUID_PSE,%edx 90 jz 1f 91 orl $CR4_PSE,%eax /* Enable PSE */ 921: 93#endif 94#ifndef DISABLE_PG_G 95 testl $CPUID_PGE,%edx 96 jz 1f 97 orl $CR4_PGE,%eax /* Enable PGE */ 981: 99#endif 100 testl $CPUID_VME,%edx 101 jz 1f 102 orl $CR4_VME,%eax /* Enable VME */ 1031: 104 movl %eax,%cr4 105 |
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| 80 /* Now enable paging mode */ 81#ifdef PAE 82 movl R(IdlePDPT), %eax 83 movl %eax, %cr3 84 movl %cr4, %eax 85 orl $CR4_PAE, %eax 86 movl %eax, %cr4 87#else 88 movl R(IdlePTD), %eax 89 movl %eax,%cr3 90#endif | 106 /* Now enable paging mode */ 107#ifdef PAE 108 movl R(IdlePDPT), %eax 109 movl %eax, %cr3 110 movl %cr4, %eax 111 orl $CR4_PAE, %eax 112 movl %eax, %cr4 113#else 114 movl R(IdlePTD), %eax 115 movl %eax,%cr3 116#endif |
| 91#ifndef DISABLE_PSE 92 cmpl $0, R(pseflag) 93 je 1f 94 movl %cr4, %eax 95 orl $CR4_PSE, %eax 96 movl %eax, %cr4 971: 98#endif 99#ifndef DISABLE_PG_G 100 cmpl $0, R(pgeflag) 101 je 2f 102 movl %cr4, %eax 103 orl $CR4_PGE, %eax 104 movl %eax, %cr4 1052: 106#endif | |
| 107 movl %cr0,%eax 108 orl $CR0_PE|CR0_PG,%eax /* enable paging */ 109 movl %eax,%cr0 /* let the games begin! */ 110 movl bootSTK,%esp /* boot stack end loc. */ 111 112 pushl $mp_begin /* jump to high mem */ 113 ret 114 115 /* 116 * Wait for the booting CPU to signal startup 117 */ 118mp_begin: /* now running relocated at KERNBASE */ 119 CHECKPOINT(0x37, 4) 120 call init_secondary /* load i386 tables */ | 117 movl %cr0,%eax 118 orl $CR0_PE|CR0_PG,%eax /* enable paging */ 119 movl %eax,%cr0 /* let the games begin! */ 120 movl bootSTK,%esp /* boot stack end loc. */ 121 122 pushl $mp_begin /* jump to high mem */ 123 ret 124 125 /* 126 * Wait for the booting CPU to signal startup 127 */ 128mp_begin: /* now running relocated at KERNBASE */ 129 CHECKPOINT(0x37, 4) 130 call init_secondary /* load i386 tables */ |
| 121 CHECKPOINT(0x38, 5) | |
| 122 | 131 |
| 123 /* 124 * If the [BSP] CPU has support for VME, turn it on. 125 */ 126 testl $CPUID_VME, cpu_feature /* XXX WRONG! BSP! */ 127 jz 1f 128 movl %cr4, %eax 129 orl $CR4_VME, %eax 130 movl %eax, %cr4 1311: 132 133 /* disable the APIC, just to be SURE */ 134 movl lapic+LA_SVR, %eax /* get spurious vector reg. */ 135 andl $~APIC_SVR_SWEN, %eax /* clear software enable bit */ 136 movl %eax, lapic+LA_SVR 137 138 /* signal our startup to the BSP */ 139 movl lapic+LA_VER, %eax /* our version reg contents */ 140 movl %eax, cpu_apic_versions /* into [ 0 ] */ 141 incl mp_ncpus /* signal BSP */ 142 143 CHECKPOINT(0x39, 6) 144 145 /* Now, let's prepare for some REAL WORK :-) This doesn't return. */ 146 call ap_init 147 | |
| 148/* 149 * This is the embedded trampoline or bootstrap that is 150 * copied into 'real-mode' low memory, it is where the 151 * secondary processor "wakes up". When it is executed 152 * the processor will eventually jump into the routine 153 * MPentry, which resides in normal kernel text above 154 * 1Meg. -jackv 155 */ --- 145 unchanged lines hidden --- | 132/* 133 * This is the embedded trampoline or bootstrap that is 134 * copied into 'real-mode' low memory, it is where the 135 * secondary processor "wakes up". When it is executed 136 * the processor will eventually jump into the routine 137 * MPentry, which resides in normal kernel text above 138 * 1Meg. -jackv 139 */ --- 145 unchanged lines hidden --- |