| exception.S (70714) | exception.S (71257) |
|---|---|
| 1/*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 16 unchanged lines hidden (view full) --- 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * | 1/*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 16 unchanged lines hidden (view full) --- 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * |
| 33 * $FreeBSD: head/sys/amd64/amd64/exception.S 70714 2001-01-06 17:40:04Z jake $ | 33 * $FreeBSD: head/sys/amd64/amd64/exception.S 71257 2001-01-19 13:19:02Z peter $ |
| 34 */ 35 | 34 */ 35 |
| 36#include "npx.h" | 36#include "opt_npx.h" |
| 37 38#include <machine/asmacros.h> 39#include <sys/ipl.h> 40#include <machine/lock.h> 41#include <machine/mutex.h> 42#include <machine/psl.h> 43#include <machine/trap.h> 44#ifdef SMP --- 101 unchanged lines hidden (view full) --- 146IDTVEC(page) 147 TRAP(T_PAGEFLT) 148IDTVEC(mchk) 149 pushl $0; TRAP(T_MCHK) 150IDTVEC(rsvd) 151 pushl $0; TRAP(T_RESERVED) 152 153IDTVEC(fpu) | 37 38#include <machine/asmacros.h> 39#include <sys/ipl.h> 40#include <machine/lock.h> 41#include <machine/mutex.h> 42#include <machine/psl.h> 43#include <machine/trap.h> 44#ifdef SMP --- 101 unchanged lines hidden (view full) --- 146IDTVEC(page) 147 TRAP(T_PAGEFLT) 148IDTVEC(mchk) 149 pushl $0; TRAP(T_MCHK) 150IDTVEC(rsvd) 151 pushl $0; TRAP(T_RESERVED) 152 153IDTVEC(fpu) |
| 154#if NNPX > 0 | 154#ifdef DEV_NPX |
| 155 /* 156 * Handle like an interrupt (except for accounting) so that we can 157 * call npx_intr to clear the error. It would be better to handle 158 * npx interrupts as traps. Nested interrupts would probably have 159 * to be converted to ASTs. 160 */ 161 pushl $0 /* dummy error code */ 162 pushl $0 /* dummy trap type */ --- 14 unchanged lines hidden (view full) --- 177 call __mtx_enter_giant_def 178 call _npx_intr 179 call __mtx_exit_giant_def 180 181 addl $4,%esp 182 incb PCPU(INTR_NESTING_LEVEL) 183 MEXITCOUNT 184 jmp _doreti | 155 /* 156 * Handle like an interrupt (except for accounting) so that we can 157 * call npx_intr to clear the error. It would be better to handle 158 * npx interrupts as traps. Nested interrupts would probably have 159 * to be converted to ASTs. 160 */ 161 pushl $0 /* dummy error code */ 162 pushl $0 /* dummy trap type */ --- 14 unchanged lines hidden (view full) --- 177 call __mtx_enter_giant_def 178 call _npx_intr 179 call __mtx_exit_giant_def 180 181 addl $4,%esp 182 incb PCPU(INTR_NESTING_LEVEL) 183 MEXITCOUNT 184 jmp _doreti |
| 185#else /* NNPX > 0 */ | 185#else /* DEV_NPX */ |
| 186 pushl $0; TRAP(T_ARITHTRAP) | 186 pushl $0; TRAP(T_ARITHTRAP) |
| 187#endif /* NNPX > 0 */ | 187#endif /* DEV_NPX */ |
| 188 189IDTVEC(align) 190 TRAP(T_ALIGNFLT) 191 192 /* 193 * _alltraps entry point. Interrupts are enabled if this was a trap 194 * gate (TGT), else disabled if this was an interrupt gate (IGT). 195 * Note that int0x80_syscall is a trap gate. Only page faults --- 161 unchanged lines hidden --- | 188 189IDTVEC(align) 190 TRAP(T_ALIGNFLT) 191 192 /* 193 * _alltraps entry point. Interrupts are enabled if this was a trap 194 * gate (TGT), else disabled if this was an interrupt gate (IGT). 195 * Note that int0x80_syscall is a trap gate. Only page faults --- 161 unchanged lines hidden --- |