| lp.4 (84877) | lp.4 (117011) |
|---|---|
| 1.\" -*- nroff -*- 2.\" 3.\" Copyright (c) 1996 A.R.Gordon, andrew.gordon@net-tel.co.uk 4.\" All rights reserved. 5.\" 6.\" Redistribution and use in source and binary forms, with or without 7.\" modification, are permitted provided that the following conditions 8.\" are met: --- 18 unchanged lines hidden (view full) --- 27.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32.\" SUCH DAMAGE. 33.\" 34.\" Id: man4.i386/lp.4,v 1.9 1999/02/14 12:06:16 nsouch Exp | 1.\" -*- nroff -*- 2.\" 3.\" Copyright (c) 1996 A.R.Gordon, andrew.gordon@net-tel.co.uk 4.\" All rights reserved. 5.\" 6.\" Redistribution and use in source and binary forms, with or without 7.\" modification, are permitted provided that the following conditions 8.\" are met: --- 18 unchanged lines hidden (view full) --- 27.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32.\" SUCH DAMAGE. 33.\" 34.\" Id: man4.i386/lp.4,v 1.9 1999/02/14 12:06:16 nsouch Exp |
| 35.\" $FreeBSD: head/share/man/man4/lp.4 84877 2001-10-13 09:08:37Z yokota $ | 35.\" $FreeBSD: head/share/man/man4/lp.4 117011 2003-06-28 23:53:39Z ru $ |
| 36.\" 37.Dd March 4, 1996 38.Os 39.Dt LP 4 40.Sh NAME 41.Nm lp 42.Nd printer port Internet Protocol driver 43.Sh SYNOPSIS --- 30 unchanged lines hidden (view full) --- 74.Pp 75The communication protocol is selected by the 76.Cm link0 77flag: 78.Bl -tag -width Fl 79.It Fl link0 80(default) Use 81.Fx | 36.\" 37.Dd March 4, 1996 38.Os 39.Dt LP 4 40.Sh NAME 41.Nm lp 42.Nd printer port Internet Protocol driver 43.Sh SYNOPSIS --- 30 unchanged lines hidden (view full) --- 74.Pp 75The communication protocol is selected by the 76.Cm link0 77flag: 78.Bl -tag -width Fl 79.It Fl link0 80(default) Use 81.Fx |
| 82mode (LPIP). This is the simpler of the two modes | 82mode (LPIP). 83This is the simpler of the two modes |
| 83and therefore slightly more efficient. 84.It Cm link0 | 84and therefore slightly more efficient. 85.It Cm link0 |
| 85Use Crynwr/Linux compatible mode (CLPIP). This mode has a simulated ethernet | 86Use Crynwr/Linux compatible mode (CLPIP). 87This mode has a simulated ethernet |
| 86packet header, and is easier to interface to other types of equipment. 87.El 88.Pp | 88packet header, and is easier to interface to other types of equipment. 89.El 90.Pp |
| 89The interface MTU defaults to 1500, but may be set to any value. Both ends | 91The interface MTU defaults to 1500, but may be set to any value. 92Both ends |
| 90of the link must be configured with the same MTU. 91.Ss Cable Connections 92The cable connecting the two parallel ports should be wired as follows: 93.Bd -literal 94 Pin Pin Description 95 2 15 Data0 -> ERROR* 96 3 13 Data1 -> SLCT 97 4 12 Data2 -> PE --- 6 unchanged lines hidden (view full) --- 104 11 6 BUSY -> Data4 105 18-25 18-25 Ground 106.Ed 107.Pp 108Cables with this wiring are widely available as 'Laplink' cables, and 109are often coloured yellow. 110.Pp 111The connections are symmetric, and provide 5 lines in each direction (four | 93of the link must be configured with the same MTU. 94.Ss Cable Connections 95The cable connecting the two parallel ports should be wired as follows: 96.Bd -literal 97 Pin Pin Description 98 2 15 Data0 -> ERROR* 99 3 13 Data1 -> SLCT 100 4 12 Data2 -> PE --- 6 unchanged lines hidden (view full) --- 107 11 6 BUSY -> Data4 108 18-25 18-25 Ground 109.Ed 110.Pp 111Cables with this wiring are widely available as 'Laplink' cables, and 112are often coloured yellow. 113.Pp 114The connections are symmetric, and provide 5 lines in each direction (four |
| 112data plus one handshake). The two modes use the same wiring, but make a | 115data plus one handshake). 116The two modes use the same wiring, but make a |
| 113different choice of which line to use as handshake. 114.Ss FreeBSD LPIP mode 115The signal lines are used as follows: 116.Bl -tag -width dataxxxx(Pinxx) 117.It Em Data0 (Pin 2) 118Data out, bit 0. 119.It Em Data1 (Pin 3) 120Data out, bit 1. --- 10 unchanged lines hidden (view full) --- 131.It Em PE (pin 12) 132Data in, bit 2. 133.It Em BUSY (pin 11) 134Data in, bit 3. 135.It Em ACK* (pin 10) 136Handshake in. 137.El 138.Pp | 117different choice of which line to use as handshake. 118.Ss FreeBSD LPIP mode 119The signal lines are used as follows: 120.Bl -tag -width dataxxxx(Pinxx) 121.It Em Data0 (Pin 2) 122Data out, bit 0. 123.It Em Data1 (Pin 3) 124Data out, bit 1. --- 10 unchanged lines hidden (view full) --- 135.It Em PE (pin 12) 136Data in, bit 2. 137.It Em BUSY (pin 11) 138Data in, bit 3. 139.It Em ACK* (pin 10) 140Handshake in. 141.El 142.Pp |
| 139When idle, all data lines are at zero. Each byte is signalled in four steps: | 143When idle, all data lines are at zero. 144Each byte is signalled in four steps: |
| 140sender writes the 4 most significant bits and raises the handshake line; 141receiver reads the 4 bits and raises its handshake to acknowledge; 142sender places the 4 least significant bits on the data lines and lowers 143the handshake; receiver reads the data and lowers its handshake. 144.Pp 145The packet format has a two-byte header, comprising the fixed values 0x08, 1460x00, immediately followed by the IP header and data. 147.Pp 148The start of a packet is indicated by simply signalling the first byte | 145sender writes the 4 most significant bits and raises the handshake line; 146receiver reads the 4 bits and raises its handshake to acknowledge; 147sender places the 4 least significant bits on the data lines and lowers 148the handshake; receiver reads the data and lowers its handshake. 149.Pp 150The packet format has a two-byte header, comprising the fixed values 0x08, 1510x00, immediately followed by the IP header and data. 152.Pp 153The start of a packet is indicated by simply signalling the first byte |
| 149of the header. The end of the packet is indicated by inverting | 154of the header. 155The end of the packet is indicated by inverting |
| 150the data lines (ie. writing the ones-complement of the previous nibble 151to be transmitted) without changing the state of the handshake. 152.Pp 153Note that the end-of-packet marker assumes that the handshake signal and 154the data-out bits can be written in a single instruction - otherwise 155certain byte values in the packet data would falsely be interpreted | 156the data lines (ie. writing the ones-complement of the previous nibble 157to be transmitted) without changing the state of the handshake. 158.Pp 159Note that the end-of-packet marker assumes that the handshake signal and 160the data-out bits can be written in a single instruction - otherwise 161certain byte values in the packet data would falsely be interpreted |
| 156as end-of-packet. This is not a problem for the PC printer port, | 162as end-of-packet. 163This is not a problem for the PC printer port, |
| 157but requires care when implementing this protocol on other equipment. 158.Ss Crynwr/Linux CLPIP mode 159The signal lines are used as follows: 160.Bl -tag -width dataxxxx(Pinxx) 161.It Em Data0 (Pin 2) 162Data out, bit 0. 163.It Em Data1 (Pin 3) 164Data out, bit 1. --- 10 unchanged lines hidden (view full) --- 175.It Em PE (pin 12) 176Data in, bit 2. 177.It Em ACK* (pin 10) 178Data in, bit 3. 179.It Em BUSY (pin 11) 180Handshake in. 181.El 182.Pp | 164but requires care when implementing this protocol on other equipment. 165.Ss Crynwr/Linux CLPIP mode 166The signal lines are used as follows: 167.Bl -tag -width dataxxxx(Pinxx) 168.It Em Data0 (Pin 2) 169Data out, bit 0. 170.It Em Data1 (Pin 3) 171Data out, bit 1. --- 10 unchanged lines hidden (view full) --- 182.It Em PE (pin 12) 183Data in, bit 2. 184.It Em ACK* (pin 10) 185Data in, bit 3. 186.It Em BUSY (pin 11) 187Handshake in. 188.El 189.Pp |
| 183When idle, all data lines are at zero. Each byte is signalled in four steps: | 190When idle, all data lines are at zero. 191Each byte is signalled in four steps: |
| 184sender writes the 4 least significant bits and raises the handshake line; 185receiver reads the 4 bits and raises its handshake to acknowledge; 186sender places the 4 most significant bits on the data lines and lowers 187the handshake; receiver reads the data and lowers its handshake. 188[Note that this is the opposite nibble order to LPIP mode]. 189.Pp 190Packet format is: 191.Bd -literal --- 11 unchanged lines hidden (view full) --- 203.Pp 204The checksum is a simple arithmetic sum of all the bytes (again, including 205the header but not checksum or length bytes). 206.Fx 207calculates 208outgoing checksums, but does not validate incoming ones. 209.Pp 210The start of packet has to be signalled specially, since the line chosen | 192sender writes the 4 least significant bits and raises the handshake line; 193receiver reads the 4 bits and raises its handshake to acknowledge; 194sender places the 4 most significant bits on the data lines and lowers 195the handshake; receiver reads the data and lowers its handshake. 196[Note that this is the opposite nibble order to LPIP mode]. 197.Pp 198Packet format is: 199.Bd -literal --- 11 unchanged lines hidden (view full) --- 211.Pp 212The checksum is a simple arithmetic sum of all the bytes (again, including 213the header but not checksum or length bytes). 214.Fx 215calculates 216outgoing checksums, but does not validate incoming ones. 217.Pp 218The start of packet has to be signalled specially, since the line chosen |
| 211for handshake-in cannot be used to generate an interrupt. The sender 212writes the value 0x08 to the data lines, and waits for the receiver 213to respond by writing 0x01 to its data lines. The sender then starts | 219for handshake-in cannot be used to generate an interrupt. 220The sender writes the value 0x08 to the data lines, and waits for the receiver 221to respond by writing 0x01 to its data lines. 222The sender then starts |
| 214signalling the first byte of the packet (the length byte). 215.Pp 216End of packet is deduced from the packet length and is not signalled 217specially (although the data lines are restored to the zero, idle 218state to avoid spuriously indicating the start of the next packet). 219.Sh SEE ALSO 220.Xr ppbus 4 , 221.Xr ppc 4 , 222.Xr ifconfig 8 223.Sh BUGS 224Busy-waiting loops are used while handshaking bytes, (and worse still when 225waiting for the receiving system to respond to an interrupt for the start | 223signalling the first byte of the packet (the length byte). 224.Pp 225End of packet is deduced from the packet length and is not signalled 226specially (although the data lines are restored to the zero, idle 227state to avoid spuriously indicating the start of the next packet). 228.Sh SEE ALSO 229.Xr ppbus 4 , 230.Xr ppc 4 , 231.Xr ifconfig 8 232.Sh BUGS 233Busy-waiting loops are used while handshaking bytes, (and worse still when 234waiting for the receiving system to respond to an interrupt for the start |
| 226of a packet). Hence a fast system talking to a slow one will consume 227excessive amounts of CPU. This is unavoidable in the case of CLPIP mode | 235of a packet). 236Hence a fast system talking to a slow one will consume 237excessive amounts of CPU. 238This is unavoidable in the case of CLPIP mode |
| 228due to the choice of handshake lines; it could theoretically be improved 229in the case of LPIP mode. 230.Pp 231Polling timeouts are controlled by counting loop iterations rather than | 239due to the choice of handshake lines; it could theoretically be improved 240in the case of LPIP mode. 241.Pp 242Polling timeouts are controlled by counting loop iterations rather than |
| 232timers, and so are dependent on CPU speed. This is somewhat stabilised | 243timers, and so are dependent on CPU speed. 244This is somewhat stabilised |
| 233by the need to perform (slow) ISA bus cycles to actually read the port. | 245by the need to perform (slow) ISA bus cycles to actually read the port. |