| pmc.xscale.3 (233628) | pmc.xscale.3 (233648) |
|---|---|
| 1.\" Copyright (c) 2009, 2010 Rui Paulo. All rights reserved. 2.\" 3.\" Redistribution and use in source and binary forms, with or without 4.\" modification, are permitted provided that the following conditions 5.\" are met: 6.\" 1. Redistributions of source code must retain the above copyright 7.\" notice, this list of conditions and the following disclaimer. 8.\" 2. Redistributions in binary form must reproduce the above copyright --- 7 unchanged lines hidden (view full) --- 16.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 17.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 18.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 19.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 20.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 21.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 22.\" SUCH DAMAGE. 23.\" | 1.\" Copyright (c) 2009, 2010 Rui Paulo. All rights reserved. 2.\" 3.\" Redistribution and use in source and binary forms, with or without 4.\" modification, are permitted provided that the following conditions 5.\" are met: 6.\" 1. Redistributions of source code must retain the above copyright 7.\" notice, this list of conditions and the following disclaimer. 8.\" 2. Redistributions in binary form must reproduce the above copyright --- 7 unchanged lines hidden (view full) --- 16.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 17.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 18.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 19.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 20.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 21.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 22.\" SUCH DAMAGE. 23.\" |
| 24.\" $FreeBSD: head/lib/libpmc/pmc.xscale.3 233628 2012-03-28 20:58:30Z fabient $ | 24.\" $FreeBSD: head/lib/libpmc/pmc.xscale.3 233648 2012-03-29 05:02:12Z eadler $ |
| 25.\" 26.Dd December 23, 2009 27.Dt PMC.XSCALE 3 28.Os 29.Sh NAME 30.Nm pmc.xscale 31.Nd measurement events for 32.Tn Intel --- 7 unchanged lines hidden (view full) --- 40.Tn Intel XScale 41CPUs are ARM CPUs based on the ARMv5e core. 42.Pp 43Second generation cores have 2 counters, while third generation cores 44have 4 counters. 45Third generation cores also have an increased number of PMC events. 46.Pp 47.Tn Intel XScale | 25.\" 26.Dd December 23, 2009 27.Dt PMC.XSCALE 3 28.Os 29.Sh NAME 30.Nm pmc.xscale 31.Nd measurement events for 32.Tn Intel --- 7 unchanged lines hidden (view full) --- 40.Tn Intel XScale 41CPUs are ARM CPUs based on the ARMv5e core. 42.Pp 43Second generation cores have 2 counters, while third generation cores 44have 4 counters. 45Third generation cores also have an increased number of PMC events. 46.Pp 47.Tn Intel XScale |
| 48PMCs are documented in | 48PMCs are documented in |
| 49.Rs 50.%B "3rd Generation Intel XScale Microarchitecture Developer's Manual" 51.%D May 2007 52.Re 53.Ss Event Specifiers (Programmable PMCs) 54.Tn Intel XScale 55programmable PMCs support the following events: 56.Bl -tag -width indent --- 55 unchanged lines hidden (view full) --- 112L2 cache miss, not including cache operations. 113.It Li ADDRESS_BUS_TRANS 114Address bus transaction. 115.It Li SELF_ADDRESS_BUS_TRANS 116Self initiated address bus transaction. 117.It Li DATA_BUS_TRANS 118Data bus transaction. 119.El | 49.Rs 50.%B "3rd Generation Intel XScale Microarchitecture Developer's Manual" 51.%D May 2007 52.Re 53.Ss Event Specifiers (Programmable PMCs) 54.Tn Intel XScale 55programmable PMCs support the following events: 56.Bl -tag -width indent --- 55 unchanged lines hidden (view full) --- 112L2 cache miss, not including cache operations. 113.It Li ADDRESS_BUS_TRANS 114Address bus transaction. 115.It Li SELF_ADDRESS_BUS_TRANS 116Self initiated address bus transaction. 117.It Li DATA_BUS_TRANS 118Data bus transaction. 119.El |
| 120.Ss Event Name Aliases | 120.Ss Event Name Aliases |
| 121The following table shows the mapping between the PMC-independent 122aliases supported by 123.Lb libpmc 124and the underlying hardware events used. 125.Bl -column "branch-mispredicts" "BRANCH_MISPRED" 126.It Em Alias Ta Em Event 127.It Li branches Ta Li BRANCH_RETIRED 128.It Li branch-mispredicts Ta Li BRANCH_MISPRED --- 29 unchanged lines hidden --- | 121The following table shows the mapping between the PMC-independent 122aliases supported by 123.Lb libpmc 124and the underlying hardware events used. 125.Bl -column "branch-mispredicts" "BRANCH_MISPRED" 126.It Em Alias Ta Em Event 127.It Li branches Ta Li BRANCH_RETIRED 128.It Li branch-mispredicts Ta Li BRANCH_MISPRED --- 29 unchanged lines hidden --- |