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DAGISelMatcherGen.cpp (204961) DAGISelMatcherGen.cpp (205218)
1//===- DAGISelMatcherGen.cpp - Matcher generator --------------------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

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403}
404
405
406void MatcherGen::EmitMatchCode(const TreePatternNode *N,
407 TreePatternNode *NodeNoTypes) {
408 // If N and NodeNoTypes don't agree on a type, then this is a case where we
409 // need to do a type check. Emit the check, apply the tyep to NodeNoTypes and
410 // reinfer any correlated types.
1//===- DAGISelMatcherGen.cpp - Matcher generator --------------------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

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403}
404
405
406void MatcherGen::EmitMatchCode(const TreePatternNode *N,
407 TreePatternNode *NodeNoTypes) {
408 // If N and NodeNoTypes don't agree on a type, then this is a case where we
409 // need to do a type check. Emit the check, apply the tyep to NodeNoTypes and
410 // reinfer any correlated types.
411 unsigned NodeType = EEVT::isUnknown;
412 if (NodeNoTypes->getExtTypes() != N->getExtTypes()) {
413 NodeType = N->getTypeNum(0);
414 NodeNoTypes->setTypes(N->getExtTypes());
411 bool DoTypeCheck = false;
412 if (NodeNoTypes->getExtType() != N->getExtType()) {
413 NodeNoTypes->setType(N->getExtType());
415 InferPossibleTypes();
414 InferPossibleTypes();
415 DoTypeCheck = true;
416 }
417
418 // If this node has a name associated with it, capture it in VariableMap. If
419 // we already saw this in the pattern, emit code to verify dagness.
420 if (!N->getName().empty()) {
421 unsigned &VarMapEntry = VariableMap[N->getName()];
422 if (VarMapEntry == 0) {
423 // If it is a named node, we must emit a 'Record' opcode.

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437 EmitLeafMatchCode(N);
438 else
439 EmitOperatorMatchCode(N, NodeNoTypes);
440
441 // If there are node predicates for this node, generate their checks.
442 for (unsigned i = 0, e = N->getPredicateFns().size(); i != e; ++i)
443 AddMatcher(new CheckPredicateMatcher(N->getPredicateFns()[i]));
444
416 }
417
418 // If this node has a name associated with it, capture it in VariableMap. If
419 // we already saw this in the pattern, emit code to verify dagness.
420 if (!N->getName().empty()) {
421 unsigned &VarMapEntry = VariableMap[N->getName()];
422 if (VarMapEntry == 0) {
423 // If it is a named node, we must emit a 'Record' opcode.

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437 EmitLeafMatchCode(N);
438 else
439 EmitOperatorMatchCode(N, NodeNoTypes);
440
441 // If there are node predicates for this node, generate their checks.
442 for (unsigned i = 0, e = N->getPredicateFns().size(); i != e; ++i)
443 AddMatcher(new CheckPredicateMatcher(N->getPredicateFns()[i]));
444
445 if (NodeType != EEVT::isUnknown)
446 AddMatcher(new CheckTypeMatcher((MVT::SimpleValueType)NodeType));
445 if (DoTypeCheck)
446 AddMatcher(new CheckTypeMatcher(N->getType()));
447}
448
449/// EmitMatcherCode - Generate the code that matches the predicate of this
450/// pattern for the specified Variant. If the variant is invalid this returns
451/// true and does not generate code, if it is valid, it returns false.
452bool MatcherGen::EmitMatcherCode(unsigned Variant) {
453 // If the root of the pattern is a ComplexPattern and if it is specified to
454 // match some number of root opcodes, these are considered to be our variants.

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562 ResultOps.push_back(SlotNo);
563}
564
565void MatcherGen::EmitResultLeafAsOperand(const TreePatternNode *N,
566 SmallVectorImpl<unsigned> &ResultOps) {
567 assert(N->isLeaf() && "Must be a leaf");
568
569 if (IntInit *II = dynamic_cast<IntInit*>(N->getLeafValue())) {
447}
448
449/// EmitMatcherCode - Generate the code that matches the predicate of this
450/// pattern for the specified Variant. If the variant is invalid this returns
451/// true and does not generate code, if it is valid, it returns false.
452bool MatcherGen::EmitMatcherCode(unsigned Variant) {
453 // If the root of the pattern is a ComplexPattern and if it is specified to
454 // match some number of root opcodes, these are considered to be our variants.

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562 ResultOps.push_back(SlotNo);
563}
564
565void MatcherGen::EmitResultLeafAsOperand(const TreePatternNode *N,
566 SmallVectorImpl<unsigned> &ResultOps) {
567 assert(N->isLeaf() && "Must be a leaf");
568
569 if (IntInit *II = dynamic_cast<IntInit*>(N->getLeafValue())) {
570 AddMatcher(new EmitIntegerMatcher(II->getValue(),N->getTypeNum(0)));
570 AddMatcher(new EmitIntegerMatcher(II->getValue(), N->getType()));
571 ResultOps.push_back(NextRecordedOperandNo++);
572 return;
573 }
574
575 // If this is an explicit register reference, handle it.
576 if (DefInit *DI = dynamic_cast<DefInit*>(N->getLeafValue())) {
577 if (DI->getDef()->isSubClassOf("Register")) {
571 ResultOps.push_back(NextRecordedOperandNo++);
572 return;
573 }
574
575 // If this is an explicit register reference, handle it.
576 if (DefInit *DI = dynamic_cast<DefInit*>(N->getLeafValue())) {
577 if (DI->getDef()->isSubClassOf("Register")) {
578 AddMatcher(new EmitRegisterMatcher(DI->getDef(),
579 N->getTypeNum(0)));
578 AddMatcher(new EmitRegisterMatcher(DI->getDef(), N->getType()));
580 ResultOps.push_back(NextRecordedOperandNo++);
581 return;
582 }
583
584 if (DI->getDef()->getName() == "zero_reg") {
579 ResultOps.push_back(NextRecordedOperandNo++);
580 return;
581 }
582
583 if (DI->getDef()->getName() == "zero_reg") {
585 AddMatcher(new EmitRegisterMatcher(0, N->getTypeNum(0)));
584 AddMatcher(new EmitRegisterMatcher(0, N->getType()));
586 ResultOps.push_back(NextRecordedOperandNo++);
587 return;
588 }
589
590 // Handle a reference to a register class. This is used
591 // in COPY_TO_SUBREG instructions.
592 if (DI->getDef()->isSubClassOf("RegisterClass")) {
593 std::string Value = getQualifiedName(DI->getDef()) + "RegClassID";

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704 // flagged to the CopyFromReg nodes we just generated.
705 TreeHasInFlag = true;
706 }
707
708 // Result order: node results, chain, flags
709
710 // Determine the result types.
711 SmallVector<MVT::SimpleValueType, 4> ResultVTs;
585 ResultOps.push_back(NextRecordedOperandNo++);
586 return;
587 }
588
589 // Handle a reference to a register class. This is used
590 // in COPY_TO_SUBREG instructions.
591 if (DI->getDef()->isSubClassOf("RegisterClass")) {
592 std::string Value = getQualifiedName(DI->getDef()) + "RegClassID";

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703 // flagged to the CopyFromReg nodes we just generated.
704 TreeHasInFlag = true;
705 }
706
707 // Result order: node results, chain, flags
708
709 // Determine the result types.
710 SmallVector<MVT::SimpleValueType, 4> ResultVTs;
712 if (NumResults != 0 && N->getTypeNum(0) != MVT::isVoid) {
711 if (NumResults != 0 && N->getType() != MVT::isVoid) {
713 // FIXME2: If the node has multiple results, we should add them. For now,
714 // preserve existing behavior?!
712 // FIXME2: If the node has multiple results, we should add them. For now,
713 // preserve existing behavior?!
715 ResultVTs.push_back(N->getTypeNum(0));
714 ResultVTs.push_back(N->getType());
716 }
717
718
719 // If this is the root instruction of a pattern that has physical registers in
720 // its result pattern, add output VTs for them. For example, X86 has:
721 // (set AL, (mul ...))
722 // This also handles implicit results like:
723 // (implicit EFLAGS)

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716
717
718 // If this is the root instruction of a pattern that has physical registers in
719 // its result pattern, add output VTs for them. For example, X86 has:
720 // (set AL, (mul ...))
721 // This also handles implicit results like:
722 // (implicit EFLAGS)

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