| X86InstrMMX.td (193323) | X86InstrMMX.td (193574) |
|---|---|
| 1//====- X86InstrMMX.td - Describe the X86 Instruction Set --*- tablegen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 563 unchanged lines hidden (view full) --- 572 (MMX_MOVQ2FR64rr VR64:$src)>; 573def : Pat<(f64 (bitconvert (v2i32 VR64:$src))), 574 (MMX_MOVQ2FR64rr VR64:$src)>; 575def : Pat<(f64 (bitconvert (v4i16 VR64:$src))), 576 (MMX_MOVQ2FR64rr VR64:$src)>; 577def : Pat<(f64 (bitconvert (v8i8 VR64:$src))), 578 (MMX_MOVQ2FR64rr VR64:$src)>; 579 | 1//====- X86InstrMMX.td - Describe the X86 Instruction Set --*- tablegen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 563 unchanged lines hidden (view full) --- 572 (MMX_MOVQ2FR64rr VR64:$src)>; 573def : Pat<(f64 (bitconvert (v2i32 VR64:$src))), 574 (MMX_MOVQ2FR64rr VR64:$src)>; 575def : Pat<(f64 (bitconvert (v4i16 VR64:$src))), 576 (MMX_MOVQ2FR64rr VR64:$src)>; 577def : Pat<(f64 (bitconvert (v8i8 VR64:$src))), 578 (MMX_MOVQ2FR64rr VR64:$src)>; 579 |
| 580// Move scalar to MMX zero-extended 581// movd to MMX register zero-extends 582let AddedComplexity = 15 in { 583 def : Pat<(v8i8 (X86vzmovl (bc_v8i8 (v2i32 (scalar_to_vector GR32:$src))))), 584 (MMX_MOVZDI2PDIrr GR32:$src)>; 585 def : Pat<(v4i16 (X86vzmovl (bc_v4i16 (v2i32 (scalar_to_vector GR32:$src))))), 586 (MMX_MOVZDI2PDIrr GR32:$src)>; 587} 588 | |
| 589let AddedComplexity = 20 in { | 580let AddedComplexity = 20 in { |
| 590 def : Pat<(v8i8 (X86vzmovl (bc_v8i8 (load_mmx addr:$src)))), 591 (MMX_MOVZDI2PDIrm addr:$src)>; 592 def : Pat<(v4i16 (X86vzmovl (bc_v4i16 (load_mmx addr:$src)))), 593 (MMX_MOVZDI2PDIrm addr:$src)>; | |
| 594 def : Pat<(v2i32 (X86vzmovl (bc_v2i32 (load_mmx addr:$src)))), 595 (MMX_MOVZDI2PDIrm addr:$src)>; 596} 597 598// Clear top half. 599let AddedComplexity = 15 in { | 581 def : Pat<(v2i32 (X86vzmovl (bc_v2i32 (load_mmx addr:$src)))), 582 (MMX_MOVZDI2PDIrm addr:$src)>; 583} 584 585// Clear top half. 586let AddedComplexity = 15 in { |
| 600 def : Pat<(v8i8 (X86vzmovl VR64:$src)), 601 (MMX_PUNPCKLDQrr VR64:$src, (MMX_V_SET0))>; 602 def : Pat<(v4i16 (X86vzmovl VR64:$src)), 603 (MMX_PUNPCKLDQrr VR64:$src, (MMX_V_SET0))>; | |
| 604 def : Pat<(v2i32 (X86vzmovl VR64:$src)), 605 (MMX_PUNPCKLDQrr VR64:$src, (MMX_V_SET0))>; 606} 607 | 587 def : Pat<(v2i32 (X86vzmovl VR64:$src)), 588 (MMX_PUNPCKLDQrr VR64:$src, (MMX_V_SET0))>; 589} 590 |
| 608// Scalar to v4i16 / v8i8. The source may be a GR32, but only the lower 609// 8 or 16-bits matter. 610def : Pat<(bc_v8i8 (v2i32 (scalar_to_vector GR32:$src))), 611 (MMX_MOVD64rr GR32:$src)>; 612def : Pat<(bc_v4i16 (v2i32 (scalar_to_vector GR32:$src))), 613 (MMX_MOVD64rr GR32:$src)>; 614 | |
| 615// Patterns to perform canonical versions of vector shuffling. 616let AddedComplexity = 10 in { 617 def : Pat<(v8i8 (mmx_unpckl_undef VR64:$src, (undef))), 618 (MMX_PUNPCKLBWrr VR64:$src, VR64:$src)>; 619 def : Pat<(v4i16 (mmx_unpckl_undef VR64:$src, (undef))), 620 (MMX_PUNPCKLWDrr VR64:$src, VR64:$src)>; 621 def : Pat<(v2i32 (mmx_unpckl_undef VR64:$src, (undef))), 622 (MMX_PUNPCKLDQrr VR64:$src, VR64:$src)>; --- 72 unchanged lines hidden --- | 591// Patterns to perform canonical versions of vector shuffling. 592let AddedComplexity = 10 in { 593 def : Pat<(v8i8 (mmx_unpckl_undef VR64:$src, (undef))), 594 (MMX_PUNPCKLBWrr VR64:$src, VR64:$src)>; 595 def : Pat<(v4i16 (mmx_unpckl_undef VR64:$src, (undef))), 596 (MMX_PUNPCKLWDrr VR64:$src, VR64:$src)>; 597 def : Pat<(v2i32 (mmx_unpckl_undef VR64:$src, (undef))), 598 (MMX_PUNPCKLDQrr VR64:$src, VR64:$src)>; --- 72 unchanged lines hidden --- |