111a112,128
> static bool isDS(unsigned Opcode) {
> switch(Opcode) {
> default: return false;
> case AMDGPU::DS_ADD_U32_RTN:
> case AMDGPU::DS_SUB_U32_RTN:
> case AMDGPU::DS_WRITE_B32:
> case AMDGPU::DS_WRITE_B8:
> case AMDGPU::DS_WRITE_B16:
> case AMDGPU::DS_READ_B32:
> case AMDGPU::DS_READ_I8:
> case AMDGPU::DS_READ_U8:
> case AMDGPU::DS_READ_I16:
> case AMDGPU::DS_READ_U16:
> return true;
> }
> }
>
148c165,167
< if (!shouldSkip(&MBB, &MBB.getParent()->back()))
---
> if (MBB.getParent()->getInfo<SIMachineFunctionInfo>()->ShaderType !=
> ShaderType::PIXEL ||
> !shouldSkip(&MBB, &MBB.getParent()->back()))
299c318
< // Kill is only allowed in pixel shaders
---
> // Kill is only allowed in pixel / geometry shaders
301c320,322
< ShaderType::PIXEL);
---
> ShaderType::PIXEL ||
> MBB.getParent()->getInfo<SIMachineFunctionInfo>()->ShaderType ==
> ShaderType::GEOMETRY);
433a455,459
> if (isDS(MI.getOpcode())) {
> NeedM0 = true;
> NeedWQM = true;
> }
>
494,501d519
< case AMDGPU::DS_READ_B32:
< NeedWQM = true;
< // Fall through
< case AMDGPU::DS_WRITE_B32:
< case AMDGPU::DS_ADD_U32_RTN:
< NeedM0 = true;
< break;
<
520c538
< if (NeedWQM && MFI->ShaderType != ShaderType::COMPUTE) {
---
> if (NeedWQM && MFI->ShaderType == ShaderType::PIXEL) {