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SIIntrinsics.td (263508) SIIntrinsics.td (266715)
1//===-- SIIntrinsics.td - SI Intrinsic defs ----------------*- tablegen -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

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33 llvm_i32_ty, // nfmt(imm)
34 llvm_i32_ty, // offen(imm)
35 llvm_i32_ty, // idxen(imm)
36 llvm_i32_ty, // glc(imm)
37 llvm_i32_ty, // slc(imm)
38 llvm_i32_ty], // tfe(imm)
39 []>;
40
1//===-- SIIntrinsics.td - SI Intrinsic defs ----------------*- tablegen -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

--- 24 unchanged lines hidden (view full) ---

33 llvm_i32_ty, // nfmt(imm)
34 llvm_i32_ty, // offen(imm)
35 llvm_i32_ty, // idxen(imm)
36 llvm_i32_ty, // glc(imm)
37 llvm_i32_ty, // slc(imm)
38 llvm_i32_ty], // tfe(imm)
39 []>;
40
41 // Fully-flexible BUFFER_LOAD_DWORD_* except for the ADDR64 bit, which is not exposed
42 def int_SI_buffer_load_dword : Intrinsic <
43 [llvm_anyint_ty], // vdata(VGPR), overloaded for types i32, v2i32, v4i32
44 [llvm_anyint_ty, // rsrc(SGPR)
45 llvm_anyint_ty, // vaddr(VGPR)
46 llvm_i32_ty, // soffset(SGPR)
47 llvm_i32_ty, // inst_offset(imm)
48 llvm_i32_ty, // offen(imm)
49 llvm_i32_ty, // idxen(imm)
50 llvm_i32_ty, // glc(imm)
51 llvm_i32_ty, // slc(imm)
52 llvm_i32_ty], // tfe(imm)
53 [IntrReadArgMem]>;
54
55 def int_SI_sendmsg : Intrinsic <[], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
56
41 class Sample : Intrinsic <[llvm_v4f32_ty], [llvm_anyvector_ty, llvm_v32i8_ty, llvm_anyint_ty, llvm_i32_ty], [IntrNoMem]>;
42
43 def int_SI_sample : Sample;
44 def int_SI_sampleb : Sample;
45 def int_SI_sampled : Sample;
46 def int_SI_samplel : Sample;
47
48 def int_SI_imageload : Intrinsic <[llvm_v4i32_ty], [llvm_anyvector_ty, llvm_v32i8_ty, llvm_i32_ty], [IntrNoMem]>;

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57 class Sample : Intrinsic <[llvm_v4f32_ty], [llvm_anyvector_ty, llvm_v32i8_ty, llvm_anyint_ty, llvm_i32_ty], [IntrNoMem]>;
58
59 def int_SI_sample : Sample;
60 def int_SI_sampleb : Sample;
61 def int_SI_sampled : Sample;
62 def int_SI_samplel : Sample;
63
64 def int_SI_imageload : Intrinsic <[llvm_v4i32_ty], [llvm_anyvector_ty, llvm_v32i8_ty, llvm_i32_ty], [IntrNoMem]>;

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