24a25,26
> def SendMsgImm : Operand<i32>;
>
829d830
< } // End hasSideEffects
833c834,842
< //def S_SENDMSG : SOPP_ <0x00000010, "S_SENDMSG", []>;
---
>
> let Uses = [EXEC] in {
> def S_SENDMSG : SOPP <0x00000010, (ins SendMsgImm:$simm16, M0Reg:$m0), "S_SENDMSG $simm16",
> [(int_SI_sendmsg imm:$simm16, M0Reg:$m0)]
> > {
> let DisableEncoding = "$m0";
> }
> } // End Uses = [EXEC]
>
839a849
> } // End hasSideEffects
982,984c992,995
< defm V_ADD_I32 : VOP2b_32 <0x00000025, "V_ADD_I32", []>;
< defm V_SUB_I32 : VOP2b_32 <0x00000026, "V_SUB_I32", []>;
< defm V_SUBREV_I32 : VOP2b_32 <0x00000027, "V_SUBREV_I32", [], "V_SUB_I32">;
---
> defm V_ADD_I32 : VOP2b_32 <0x00000025, "V_ADD_I32", [], VSrc_32>;
> defm V_SUB_I32 : VOP2b_32 <0x00000026, "V_SUB_I32", [], VSrc_32>;
> defm V_SUBREV_I32 : VOP2b_32 <0x00000027, "V_SUBREV_I32", [], VSrc_32,
> "V_SUB_I32">;
987,989c998,1001
< defm V_ADDC_U32 : VOP2b_32 <0x00000028, "V_ADDC_U32", []>;
< defm V_SUBB_U32 : VOP2b_32 <0x00000029, "V_SUBB_U32", []>;
< defm V_SUBBREV_U32 : VOP2b_32 <0x0000002a, "V_SUBBREV_U32", [], "V_SUBB_U32">;
---
> defm V_ADDC_U32 : VOP2b_32 <0x00000028, "V_ADDC_U32", [], VReg_32>;
> defm V_SUBB_U32 : VOP2b_32 <0x00000029, "V_SUBB_U32", [], VReg_32>;
> defm V_SUBBREV_U32 : VOP2b_32 <0x0000002a, "V_SUBBREV_U32", [], VReg_32,
> "V_SUBB_U32">;
1406c1418
< (BUFFER_LOAD_FORMAT_XYZW_IDXEN $tlst, $buf_idx_vgpr, imm:$attr_offset)
---
> (BUFFER_LOAD_FORMAT_XYZW_IDXEN $tlst, $buf_idx_vgpr, imm:$attr_offset, 0, 0, 0, 0)
1660a1673,1683
> /********** ================================ **********/
> /********** Floating point absolute/negative **********/
> /********** ================================ **********/
>
> // Manipulate the sign bit directly, as e.g. using the source negation modifier
> // in V_ADD_F32_e64 $src, 0, [...] does not result in -0.0 for $src == +0.0,
> // breaking the piglit *s-floatBitsToInt-neg* tests
>
> // TODO: Look into not implementing isFNegFree/isFAbsFree for SI, and possibly
> // removing these patterns
>
1661a1685,1689
> (fneg (fabs f32:$src)),
> (V_OR_B32_e32 $src, (V_MOV_B32_e32 0x80000000)) /* Set sign bit */
> >;
>
> def : Pat <
1663,1664c1691
< (V_ADD_F32_e64 $src, (i32 0 /* SRC1 */),
< 1 /* ABS */, 0 /* CLAMP */, 0 /* OMOD */, 0 /* NEG */)
---
> (V_AND_B32_e32 $src, (V_MOV_B32_e32 0x7fffffff)) /* Clear sign bit */
1669,1670c1696
< (V_ADD_F32_e64 $src, (i32 0 /* SRC1 */),
< 0 /* ABS */, 0 /* CLAMP */, 0 /* OMOD */, 1 /* NEG */)
---
> (V_XOR_B32_e32 $src, (V_MOV_B32_e32 0x80000000)) /* Toggle sign bit */
1796a1823,1827
> def : Pat <
> (i32 (zext i1:$src0)),
> (V_CNDMASK_B32_e64 (i32 0), (i32 1), $src0)
> >;
>
1812c1843
< (BUFFER_LOAD_DWORD_OFFEN $sbase, $voff)
---
> (BUFFER_LOAD_DWORD_OFFEN $sbase, $voff, 0, 0, 0, 0)
1972a2004,2047
> // BUFFER_LOAD_DWORD*, addr64=0
> multiclass MUBUF_Load_Dword <ValueType vt, MUBUF offset, MUBUF offen, MUBUF idxen,
> MUBUF bothen> {
>
> def : Pat <
> (vt (int_SI_buffer_load_dword i128:$rsrc, i32:$vaddr, i32:$soffset,
> imm:$offset, 0, 0, imm:$glc, imm:$slc,
> imm:$tfe)),
> (offset $rsrc, $vaddr, (as_i16imm $offset), $soffset, (as_i1imm $glc),
> (as_i1imm $slc), (as_i1imm $tfe))
> >;
>
> def : Pat <
> (vt (int_SI_buffer_load_dword i128:$rsrc, i32:$vaddr, i32:$soffset,
> imm, 1, 0, imm:$glc, imm:$slc,
> imm:$tfe)),
> (offen $rsrc, $vaddr, $soffset, (as_i1imm $glc), (as_i1imm $slc),
> (as_i1imm $tfe))
> >;
>
> def : Pat <
> (vt (int_SI_buffer_load_dword i128:$rsrc, i32:$vaddr, i32:$soffset,
> imm:$offset, 0, 1, imm:$glc, imm:$slc,
> imm:$tfe)),
> (idxen $rsrc, $vaddr, (as_i16imm $offset), $soffset, (as_i1imm $glc),
> (as_i1imm $slc), (as_i1imm $tfe))
> >;
>
> def : Pat <
> (vt (int_SI_buffer_load_dword i128:$rsrc, v2i32:$vaddr, i32:$soffset,
> imm, 1, 1, imm:$glc, imm:$slc,
> imm:$tfe)),
> (bothen $rsrc, $vaddr, $soffset, (as_i1imm $glc), (as_i1imm $slc),
> (as_i1imm $tfe))
> >;
> }
>
> defm : MUBUF_Load_Dword <i32, BUFFER_LOAD_DWORD_OFFSET, BUFFER_LOAD_DWORD_OFFEN,
> BUFFER_LOAD_DWORD_IDXEN, BUFFER_LOAD_DWORD_BOTHEN>;
> defm : MUBUF_Load_Dword <v2i32, BUFFER_LOAD_DWORDX2_OFFSET, BUFFER_LOAD_DWORDX2_OFFEN,
> BUFFER_LOAD_DWORDX2_IDXEN, BUFFER_LOAD_DWORDX2_BOTHEN>;
> defm : MUBUF_Load_Dword <v4i32, BUFFER_LOAD_DWORDX4_OFFSET, BUFFER_LOAD_DWORDX4_OFFEN,
> BUFFER_LOAD_DWORDX4_IDXEN, BUFFER_LOAD_DWORDX4_BOTHEN>;
>
2059a2135,2139
> def : Pat <
> (i1 (trunc i32:$a)),
> (V_CMP_EQ_I32_e64 (V_AND_B32_e32 (i32 1), $a), 1)
> >;
>