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full compact
NVPTXISelDAGToDAG.cpp (251662) NVPTXISelDAGToDAG.cpp (255804)
1//===-- NVPTXISelDAGToDAG.cpp - A dag to dag inst selector for NVPTX ------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

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86 do_DIVF32_PREC = 1;
87
88}
89
90/// Select - Select instructions not customized! Used for
91/// expanded, promoted and normal instructions.
92SDNode *NVPTXDAGToDAGISel::Select(SDNode *N) {
93
1//===-- NVPTXISelDAGToDAG.cpp - A dag to dag inst selector for NVPTX ------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

--- 77 unchanged lines hidden (view full) ---

86 do_DIVF32_PREC = 1;
87
88}
89
90/// Select - Select instructions not customized! Used for
91/// expanded, promoted and normal instructions.
92SDNode *NVPTXDAGToDAGISel::Select(SDNode *N) {
93
94 if (N->isMachineOpcode())
94 if (N->isMachineOpcode()) {
95 N->setNodeId(-1);
95 return NULL; // Already selected.
96 return NULL; // Already selected.
97 }
96
97 SDNode *ResNode = NULL;
98 switch (N->getOpcode()) {
99 case ISD::LOAD:
100 ResNode = SelectLoad(N);
101 break;
102 case ISD::STORE:
103 ResNode = SelectStore(N);

--- 1637 unchanged lines hidden ---
98
99 SDNode *ResNode = NULL;
100 switch (N->getOpcode()) {
101 case ISD::LOAD:
102 ResNode = SelectLoad(N);
103 break;
104 case ISD::STORE:
105 ResNode = SelectStore(N);

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