Deleted Added
full compact
ARMISelLowering.h (198090) ARMISelLowering.h (198892)
1//===-- ARMISelLowering.h - ARM DAG Lowering Interface ----------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

--- 123 unchanged lines hidden (view full) ---

132
133 /// Define some predicates that are used for node matching.
134 namespace ARM {
135 /// getVMOVImm - If this is a build_vector of constants which can be
136 /// formed by using a VMOV instruction of the specified element size,
137 /// return the constant being splatted. The ByteSize field indicates the
138 /// number of bytes of each element [1248].
139 SDValue getVMOVImm(SDNode *N, unsigned ByteSize, SelectionDAG &DAG);
1//===-- ARMISelLowering.h - ARM DAG Lowering Interface ----------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

--- 123 unchanged lines hidden (view full) ---

132
133 /// Define some predicates that are used for node matching.
134 namespace ARM {
135 /// getVMOVImm - If this is a build_vector of constants which can be
136 /// formed by using a VMOV instruction of the specified element size,
137 /// return the constant being splatted. The ByteSize field indicates the
138 /// number of bytes of each element [1248].
139 SDValue getVMOVImm(SDNode *N, unsigned ByteSize, SelectionDAG &DAG);
140
141 /// getVFPf32Imm / getVFPf64Imm - If the given fp immediate can be
142 /// materialized with a VMOV.f32 / VMOV.f64 (i.e. fconsts / fconstd)
143 /// instruction, returns its 8-bit integer representation. Otherwise,
144 /// returns -1.
145 int getVFPf32Imm(const APFloat &FPImm);
146 int getVFPf64Imm(const APFloat &FPImm);
140 }
141
142 //===--------------------------------------------------------------------===//
143 // ARMTargetLowering - ARM Implementation of the TargetLowering interface
144
145 class ARMTargetLowering : public TargetLowering {
146 int VarArgsFrameIndex; // FrameIndex for start of varargs area.
147 public:

--- 71 unchanged lines hidden (view full) ---

219 return Subtarget;
220 }
221
222 /// getFunctionAlignment - Return the Log2 alignment of this function.
223 virtual unsigned getFunctionAlignment(const Function *F) const;
224
225 bool isShuffleMaskLegal(const SmallVectorImpl<int> &M, EVT VT) const;
226 bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
147 }
148
149 //===--------------------------------------------------------------------===//
150 // ARMTargetLowering - ARM Implementation of the TargetLowering interface
151
152 class ARMTargetLowering : public TargetLowering {
153 int VarArgsFrameIndex; // FrameIndex for start of varargs area.
154 public:

--- 71 unchanged lines hidden (view full) ---

226 return Subtarget;
227 }
228
229 /// getFunctionAlignment - Return the Log2 alignment of this function.
230 virtual unsigned getFunctionAlignment(const Function *F) const;
231
232 bool isShuffleMaskLegal(const SmallVectorImpl<int> &M, EVT VT) const;
233 bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
234
235 /// isFPImmLegal - Returns true if the target can instruction select the
236 /// specified FP immediate natively. If false, the legalizer will
237 /// materialize the FP immediate as a load from a constant pool.
238 virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const;
239
227 private:
228 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
229 /// make the right decision when generating code for different targets.
230 const ARMSubtarget *Subtarget;
231
232 /// ARMPCLabelIndex - Keep track of the number of ARM PC labels created.
233 ///
234 unsigned ARMPCLabelIndex;

--- 15 unchanged lines hidden (view full) ---

250
251 CCAssignFn *CCAssignFnForNode(CallingConv::ID CC, bool Return, bool isVarArg) const;
252 SDValue LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg,
253 DebugLoc dl, SelectionDAG &DAG,
254 const CCValAssign &VA,
255 ISD::ArgFlagsTy Flags);
256 SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG);
257 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG);
240 private:
241 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
242 /// make the right decision when generating code for different targets.
243 const ARMSubtarget *Subtarget;
244
245 /// ARMPCLabelIndex - Keep track of the number of ARM PC labels created.
246 ///
247 unsigned ARMPCLabelIndex;

--- 15 unchanged lines hidden (view full) ---

263
264 CCAssignFn *CCAssignFnForNode(CallingConv::ID CC, bool Return, bool isVarArg) const;
265 SDValue LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg,
266 DebugLoc dl, SelectionDAG &DAG,
267 const CCValAssign &VA,
268 ISD::ArgFlagsTy Flags);
269 SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG);
270 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG);
271 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG);
258 SDValue LowerGlobalAddressDarwin(SDValue Op, SelectionDAG &DAG);
259 SDValue LowerGlobalAddressELF(SDValue Op, SelectionDAG &DAG);
260 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG);
261 SDValue LowerToTLSGeneralDynamicModel(GlobalAddressSDNode *GA,
262 SelectionDAG &DAG);
263 SDValue LowerToTLSExecModels(GlobalAddressSDNode *GA,
264 SelectionDAG &DAG);
265 SDValue LowerGLOBAL_OFFSET_TABLE(SDValue Op, SelectionDAG &DAG);

--- 42 unchanged lines hidden ---
272 SDValue LowerGlobalAddressDarwin(SDValue Op, SelectionDAG &DAG);
273 SDValue LowerGlobalAddressELF(SDValue Op, SelectionDAG &DAG);
274 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG);
275 SDValue LowerToTLSGeneralDynamicModel(GlobalAddressSDNode *GA,
276 SelectionDAG &DAG);
277 SDValue LowerToTLSExecModels(GlobalAddressSDNode *GA,
278 SelectionDAG &DAG);
279 SDValue LowerGLOBAL_OFFSET_TABLE(SDValue Op, SelectionDAG &DAG);

--- 42 unchanged lines hidden ---