1//===-- ARMISelLowering.h - ARM DAG Lowering Interface ----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 123 unchanged lines hidden (view full) --- 132 133 /// Define some predicates that are used for node matching. 134 namespace ARM { 135 /// getVMOVImm - If this is a build_vector of constants which can be 136 /// formed by using a VMOV instruction of the specified element size, 137 /// return the constant being splatted. The ByteSize field indicates the 138 /// number of bytes of each element [1248]. 139 SDValue getVMOVImm(SDNode *N, unsigned ByteSize, SelectionDAG &DAG); |
140 141 /// getVFPf32Imm / getVFPf64Imm - If the given fp immediate can be 142 /// materialized with a VMOV.f32 / VMOV.f64 (i.e. fconsts / fconstd) 143 /// instruction, returns its 8-bit integer representation. Otherwise, 144 /// returns -1. 145 int getVFPf32Imm(const APFloat &FPImm); 146 int getVFPf64Imm(const APFloat &FPImm); |
147 } 148 149 //===--------------------------------------------------------------------===// 150 // ARMTargetLowering - ARM Implementation of the TargetLowering interface 151 152 class ARMTargetLowering : public TargetLowering { 153 int VarArgsFrameIndex; // FrameIndex for start of varargs area. 154 public: --- 71 unchanged lines hidden (view full) --- 226 return Subtarget; 227 } 228 229 /// getFunctionAlignment - Return the Log2 alignment of this function. 230 virtual unsigned getFunctionAlignment(const Function *F) const; 231 232 bool isShuffleMaskLegal(const SmallVectorImpl<int> &M, EVT VT) const; 233 bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; |
234 235 /// isFPImmLegal - Returns true if the target can instruction select the 236 /// specified FP immediate natively. If false, the legalizer will 237 /// materialize the FP immediate as a load from a constant pool. 238 virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const; 239 |
240 private: 241 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can 242 /// make the right decision when generating code for different targets. 243 const ARMSubtarget *Subtarget; 244 245 /// ARMPCLabelIndex - Keep track of the number of ARM PC labels created. 246 /// 247 unsigned ARMPCLabelIndex; --- 15 unchanged lines hidden (view full) --- 263 264 CCAssignFn *CCAssignFnForNode(CallingConv::ID CC, bool Return, bool isVarArg) const; 265 SDValue LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg, 266 DebugLoc dl, SelectionDAG &DAG, 267 const CCValAssign &VA, 268 ISD::ArgFlagsTy Flags); 269 SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG); 270 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG); |
271 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG); |
272 SDValue LowerGlobalAddressDarwin(SDValue Op, SelectionDAG &DAG); 273 SDValue LowerGlobalAddressELF(SDValue Op, SelectionDAG &DAG); 274 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG); 275 SDValue LowerToTLSGeneralDynamicModel(GlobalAddressSDNode *GA, 276 SelectionDAG &DAG); 277 SDValue LowerToTLSExecModels(GlobalAddressSDNode *GA, 278 SelectionDAG &DAG); 279 SDValue LowerGLOBAL_OFFSET_TABLE(SDValue Op, SelectionDAG &DAG); --- 42 unchanged lines hidden --- |