| ARMISelDAGToDAG.cpp (251662) | ARMISelDAGToDAG.cpp (255804) |
|---|---|
| 1//===-- ARMISelDAGToDAG.cpp - A dag to dag inst selector for ARM ----------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 2532 unchanged lines hidden (view full) --- 2541 Ops); 2542 cast<MachineSDNode>(ResNode)->setMemRefs(MemOp, MemOp + 1); 2543 return ResNode; 2544} 2545 2546SDNode *ARMDAGToDAGISel::Select(SDNode *N) { 2547 DebugLoc dl = N->getDebugLoc(); 2548 | 1//===-- ARMISelDAGToDAG.cpp - A dag to dag inst selector for ARM ----------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 2532 unchanged lines hidden (view full) --- 2541 Ops); 2542 cast<MachineSDNode>(ResNode)->setMemRefs(MemOp, MemOp + 1); 2543 return ResNode; 2544} 2545 2546SDNode *ARMDAGToDAGISel::Select(SDNode *N) { 2547 DebugLoc dl = N->getDebugLoc(); 2548 |
| 2549 if (N->isMachineOpcode()) | 2549 if (N->isMachineOpcode()) { 2550 N->setNodeId(-1); |
| 2550 return NULL; // Already selected. | 2551 return NULL; // Already selected. |
| 2552 } |
|
| 2551 2552 switch (N->getOpcode()) { 2553 default: break; 2554 case ISD::INLINEASM: { 2555 SDNode *ResNode = SelectInlineAsm(N); 2556 if (ResNode) 2557 return ResNode; 2558 break; --- 1037 unchanged lines hidden --- | 2553 2554 switch (N->getOpcode()) { 2555 default: break; 2556 case ISD::INLINEASM: { 2557 SDNode *ResNode = SelectInlineAsm(N); 2558 if (ResNode) 2559 return ResNode; 2560 break; --- 1037 unchanged lines hidden --- |