1//===- ARM.td - Describe the ARM Target Machine -----------------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
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84def : ProcNoItin<"arm968e-s", [ArchV5TE]>;
85def : ProcNoItin<"arm10e", [ArchV5TE]>;
86def : ProcNoItin<"arm1020e", [ArchV5TE]>;
87def : ProcNoItin<"arm1022e", [ArchV5TE]>;
88def : ProcNoItin<"xscale", [ArchV5TE]>;
89def : ProcNoItin<"iwmmxt", [ArchV5TE]>;
90
91// V6 Processors.
92def : ProcNoItin<"arm1136j-s", [ArchV6]>;
93def : ProcNoItin<"arm1136jf-s", [ArchV6, FeatureVFP2]>;
94def : ProcNoItin<"arm1176jz-s", [ArchV6]>;
95def : ProcNoItin<"arm1176jzf-s", [ArchV6, FeatureVFP2]>;
96def : ProcNoItin<"mpcorenovfp", [ArchV6]>;
97def : ProcNoItin<"mpcore", [ArchV6, FeatureVFP2]>;
98
99// V6T2 Processors.
100def : ProcNoItin<"arm1156t2-s", [ArchV6T2, FeatureThumb2]>;
101def : ProcNoItin<"arm1156t2f-s", [ArchV6T2, FeatureThumb2, FeatureVFP2]>;
102
103// V7 Processors.
104def : Processor<"cortex-a8", CortexA8Itineraries,
105 [ArchV7A, FeatureThumb2, FeatureNEON]>;
106def : ProcNoItin<"cortex-a9", [ArchV7A, FeatureThumb2, FeatureNEON]>;
107
108//===----------------------------------------------------------------------===//
109// Register File Description
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2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
--- 75 unchanged lines hidden (view full) ---
84def : ProcNoItin<"arm968e-s", [ArchV5TE]>;
85def : ProcNoItin<"arm10e", [ArchV5TE]>;
86def : ProcNoItin<"arm1020e", [ArchV5TE]>;
87def : ProcNoItin<"arm1022e", [ArchV5TE]>;
88def : ProcNoItin<"xscale", [ArchV5TE]>;
89def : ProcNoItin<"iwmmxt", [ArchV5TE]>;
90
91// V6 Processors.
92def : ProcNoItin<"arm1136j-s", [ArchV6]>;
93def : ProcNoItin<"arm1136jf-s", [ArchV6, FeatureVFP2]>;
94def : ProcNoItin<"arm1176jz-s", [ArchV6]>;
95def : ProcNoItin<"arm1176jzf-s", [ArchV6, FeatureVFP2]>;
96def : ProcNoItin<"mpcorenovfp", [ArchV6]>;
97def : ProcNoItin<"mpcore", [ArchV6, FeatureVFP2]>;
98
99// V6T2 Processors.
100def : ProcNoItin<"arm1156t2-s", [ArchV6T2, FeatureThumb2]>;
101def : ProcNoItin<"arm1156t2f-s", [ArchV6T2, FeatureThumb2, FeatureVFP2]>;
102
103// V7 Processors.
104def : Processor<"cortex-a8", CortexA8Itineraries,
105 [ArchV7A, FeatureThumb2, FeatureNEON]>;
106def : ProcNoItin<"cortex-a9", [ArchV7A, FeatureThumb2, FeatureNEON]>;
107
108//===----------------------------------------------------------------------===//
109// Register File Description
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