AArch64ISelDAGToDAG.cpp (251662) | AArch64ISelDAGToDAG.cpp (255804) |
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1//===-- AArch64ISelDAGToDAG.cpp - A dag to dag inst selector for AArch64 --===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 381 unchanged lines hidden (view full) --- 390} 391 392SDNode *AArch64DAGToDAGISel::Select(SDNode *Node) { 393 // Dump information about the Node being selected 394 DEBUG(dbgs() << "Selecting: "; Node->dump(CurDAG); dbgs() << "\n"); 395 396 if (Node->isMachineOpcode()) { 397 DEBUG(dbgs() << "== "; Node->dump(CurDAG); dbgs() << "\n"); | 1//===-- AArch64ISelDAGToDAG.cpp - A dag to dag inst selector for AArch64 --===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 381 unchanged lines hidden (view full) --- 390} 391 392SDNode *AArch64DAGToDAGISel::Select(SDNode *Node) { 393 // Dump information about the Node being selected 394 DEBUG(dbgs() << "Selecting: "; Node->dump(CurDAG); dbgs() << "\n"); 395 396 if (Node->isMachineOpcode()) { 397 DEBUG(dbgs() << "== "; Node->dump(CurDAG); dbgs() << "\n"); |
398 Node->setNodeId(-1); |
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398 return NULL; 399 } 400 401 switch (Node->getOpcode()) { 402 case ISD::ATOMIC_LOAD_ADD: 403 return SelectAtomic(Node, 404 AArch64::ATOMIC_LOAD_ADD_I8, 405 AArch64::ATOMIC_LOAD_ADD_I16, --- 153 unchanged lines hidden --- | 399 return NULL; 400 } 401 402 switch (Node->getOpcode()) { 403 case ISD::ATOMIC_LOAD_ADD: 404 return SelectAtomic(Node, 405 AArch64::ATOMIC_LOAD_ADD_I8, 406 AArch64::ATOMIC_LOAD_ADD_I16, --- 153 unchanged lines hidden --- |