Deleted Added
full compact
RegAllocPBQP.cpp (198090) RegAllocPBQP.cpp (198892)
1//===------ RegAllocPBQP.cpp ---- PBQP Register Allocator -------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

--- 56 unchanged lines hidden (view full) ---

65 cl::init(false), cl::Hidden);
66
67namespace {
68
69 ///
70 /// PBQP based allocators solve the register allocation problem by mapping
71 /// register allocation problems to Partitioned Boolean Quadratic
72 /// Programming problems.
1//===------ RegAllocPBQP.cpp ---- PBQP Register Allocator -------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

--- 56 unchanged lines hidden (view full) ---

65 cl::init(false), cl::Hidden);
66
67namespace {
68
69 ///
70 /// PBQP based allocators solve the register allocation problem by mapping
71 /// register allocation problems to Partitioned Boolean Quadratic
72 /// Programming problems.
73 class VISIBILITY_HIDDEN PBQPRegAlloc : public MachineFunctionPass {
73 class PBQPRegAlloc : public MachineFunctionPass {
74 public:
75
76 static char ID;
77
78 /// Construct a PBQP register allocator.
79 PBQPRegAlloc() : MachineFunctionPass(&ID) {}
80
81 /// Return the pass name.
82 virtual const char* getPassName() const {
83 return "PBQP Register Allocator";
84 }
85
86 /// PBQP analysis usage.
87 virtual void getAnalysisUsage(AnalysisUsage &au) const {
74 public:
75
76 static char ID;
77
78 /// Construct a PBQP register allocator.
79 PBQPRegAlloc() : MachineFunctionPass(&ID) {}
80
81 /// Return the pass name.
82 virtual const char* getPassName() const {
83 return "PBQP Register Allocator";
84 }
85
86 /// PBQP analysis usage.
87 virtual void getAnalysisUsage(AnalysisUsage &au) const {
88 au.addRequired<SlotIndexes>();
89 au.addPreserved<SlotIndexes>();
88 au.addRequired<LiveIntervals>();
89 //au.addRequiredID(SplitCriticalEdgesID);
90 au.addRequired<RegisterCoalescer>();
91 au.addRequired<LiveStacks>();
92 au.addPreserved<LiveStacks>();
93 au.addRequired<MachineLoopInfo>();
94 au.addPreserved<MachineLoopInfo>();
95 au.addRequired<VirtRegMap>();

--- 583 unchanged lines hidden (view full) ---

679 const TargetRegisterClass *RC = mri->getRegClass(spilled->reg);
680 LiveInterval &stackInterval = lss->getOrCreateInterval(stackSlot, RC);
681
682 VNInfo *vni;
683 if (stackInterval.getNumValNums() != 0)
684 vni = stackInterval.getValNumInfo(0);
685 else
686 vni = stackInterval.getNextValue(
90 au.addRequired<LiveIntervals>();
91 //au.addRequiredID(SplitCriticalEdgesID);
92 au.addRequired<RegisterCoalescer>();
93 au.addRequired<LiveStacks>();
94 au.addPreserved<LiveStacks>();
95 au.addRequired<MachineLoopInfo>();
96 au.addPreserved<MachineLoopInfo>();
97 au.addRequired<VirtRegMap>();

--- 583 unchanged lines hidden (view full) ---

681 const TargetRegisterClass *RC = mri->getRegClass(spilled->reg);
682 LiveInterval &stackInterval = lss->getOrCreateInterval(stackSlot, RC);
683
684 VNInfo *vni;
685 if (stackInterval.getNumValNums() != 0)
686 vni = stackInterval.getValNumInfo(0);
687 else
688 vni = stackInterval.getNextValue(
687 LiveIndex(), 0, false, lss->getVNInfoAllocator());
689 SlotIndex(), 0, false, lss->getVNInfoAllocator());
688
689 LiveInterval &rhsInterval = lis->getInterval(spilled->reg);
690 stackInterval.MergeRangesInAsValue(rhsInterval, vni);
691}
692
693bool PBQPRegAlloc::mapPBQPToRegAlloc(const PBQP::Solution &solution) {
694 // Set to true if we have any spills
695 bool anotherRoundNeeded = false;

--- 131 unchanged lines hidden (view full) ---

827}
828
829bool PBQPRegAlloc::runOnMachineFunction(MachineFunction &MF) {
830
831 mf = &MF;
832 tm = &mf->getTarget();
833 tri = tm->getRegisterInfo();
834 tii = tm->getInstrInfo();
690
691 LiveInterval &rhsInterval = lis->getInterval(spilled->reg);
692 stackInterval.MergeRangesInAsValue(rhsInterval, vni);
693}
694
695bool PBQPRegAlloc::mapPBQPToRegAlloc(const PBQP::Solution &solution) {
696 // Set to true if we have any spills
697 bool anotherRoundNeeded = false;

--- 131 unchanged lines hidden (view full) ---

829}
830
831bool PBQPRegAlloc::runOnMachineFunction(MachineFunction &MF) {
832
833 mf = &MF;
834 tm = &mf->getTarget();
835 tri = tm->getRegisterInfo();
836 tii = tm->getInstrInfo();
835 mri = &mf->getRegInfo();
837 mri = &mf->getRegInfo();
836
837 lis = &getAnalysis<LiveIntervals>();
838 lss = &getAnalysis<LiveStacks>();
839 loopInfo = &getAnalysis<MachineLoopInfo>();
840
841 vrm = &getAnalysis<VirtRegMap>();
842
843 DEBUG(errs() << "PBQP2 Register Allocating for " << mf->getFunction()->getName() << "\n");

--- 62 unchanged lines hidden ---
838
839 lis = &getAnalysis<LiveIntervals>();
840 lss = &getAnalysis<LiveStacks>();
841 loopInfo = &getAnalysis<MachineLoopInfo>();
842
843 vrm = &getAnalysis<VirtRegMap>();
844
845 DEBUG(errs() << "PBQP2 Register Allocating for " << mf->getFunction()->getName() << "\n");

--- 62 unchanged lines hidden ---