1//===-- MachineVerifier.cpp - Machine Code Verifier -------------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

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37#include "llvm/ADT/SetOperations.h"
38#include "llvm/ADT/SmallVector.h"
39#include "llvm/Support/Debug.h"
40#include "llvm/Support/ErrorHandling.h"
41#include "llvm/Support/raw_ostream.h"
42using namespace llvm;
43
44namespace {
45 struct MachineVerifier : public MachineFunctionPass {
46 static char ID; // Pass ID, replacement for typeid
47
48 MachineVerifier(bool allowDoubleDefs = false) :
49 MachineFunctionPass(&ID),
50 allowVirtDoubleDefs(allowDoubleDefs),
51 allowPhysDoubleDefs(allowDoubleDefs),
52 OutFileName(getenv("LLVM_VERIFY_MACHINEINSTRS"))
53 {}
54
55 void getAnalysisUsage(AnalysisUsage &AU) const {
56 AU.setPreservesAll();
57 MachineFunctionPass::getAnalysisUsage(AU);
58 }
59
60 bool runOnMachineFunction(MachineFunction &MF);
61
62 const bool allowVirtDoubleDefs;
63 const bool allowPhysDoubleDefs;
64
65 const char *const OutFileName;
66 raw_ostream *OS;
67 const MachineFunction *MF;
68 const TargetMachine *TM;
69 const TargetRegisterInfo *TRI;

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107 // Regs defined in MBB and live out. Note that vregs passing through may
108 // be live out without being mentioned here.
109 RegSet regsLiveOut;
110
111 // Vregs that pass through MBB untouched. This set is disjoint from
112 // regsKilled and regsLiveOut.
113 RegSet vregsPassed;
114
115 BBInfo() : reachable(false) {}
116
117 // Add register to vregsPassed if it belongs there. Return true if
118 // anything changed.
119 bool addPassed(unsigned Reg) {
120 if (!TargetRegisterInfo::isVirtualRegister(Reg))
121 return false;
122 if (regsKilled.count(Reg) || regsLiveOut.count(Reg))

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128 bool addPassed(const RegSet &RS) {
129 bool changed = false;
130 for (RegSet::const_iterator I = RS.begin(), E = RS.end(); I != E; ++I)
131 if (addPassed(*I))
132 changed = true;
133 return changed;
134 }
135
136 // Live-out registers are either in regsLiveOut or vregsPassed.
137 bool isLiveOut(unsigned Reg) const {
138 return regsLiveOut.count(Reg) || vregsPassed.count(Reg);
139 }
140 };
141
142 // Extra register info per MBB.
143 DenseMap<const MachineBasicBlock*, BBInfo> MBBInfoMap;
144
145 bool isReserved(unsigned Reg) {
146 return Reg < regsReserved.size() && regsReserved.test(Reg);
147 }
148
149 void visitMachineFunctionBefore();
150 void visitMachineBasicBlockBefore(const MachineBasicBlock *MBB);
151 void visitMachineInstrBefore(const MachineInstr *MI);
152 void visitMachineOperand(const MachineOperand *MO, unsigned MONum);
153 void visitMachineInstrAfter(const MachineInstr *MI);
154 void visitMachineBasicBlockAfter(const MachineBasicBlock *MBB);
155 void visitMachineFunctionAfter();
156
157 void report(const char *msg, const MachineFunction *MF);
158 void report(const char *msg, const MachineBasicBlock *MBB);
159 void report(const char *msg, const MachineInstr *MI);
160 void report(const char *msg, const MachineOperand *MO, unsigned MONum);
161
162 void markReachable(const MachineBasicBlock *MBB);
163 void calcMaxRegsPassed();
164 void calcMinRegsPassed();
165 void checkPHIOps(const MachineBasicBlock *MBB);
166 };
167}
168
169char MachineVerifier::ID = 0;
170static RegisterPass
171MachineVer("machineverifier", "Verify generated machine code");
172static const PassInfo *const MachineVerifyID = &MachineVer;
173
174FunctionPass *llvm::createMachineVerifierPass(bool allowPhysDoubleDefs) {
175 return new MachineVerifier(allowPhysDoubleDefs);
176}
177
178void MachineFunction::verify() const {
179 MachineVerifier().runOnMachineFunction(const_cast<MachineFunction&>(*this));
180}
181
182bool MachineVerifier::runOnMachineFunction(MachineFunction &MF) {
183 raw_ostream *OutFile = 0;
184 if (OutFileName) {
185 std::string ErrorInfo;
186 OutFile = new raw_fd_ostream(OutFileName, ErrorInfo,
187 raw_fd_ostream::F_Append);

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197
198 foundErrors = 0;
199
200 this->MF = &MF;
201 TM = &MF.getTarget();
202 TRI = TM->getRegisterInfo();
203 MRI = &MF.getRegInfo();
204
205 visitMachineFunctionBefore();
206 for (MachineFunction::const_iterator MFI = MF.begin(), MFE = MF.end();
207 MFI!=MFE; ++MFI) {
208 visitMachineBasicBlockBefore(MFI);
209 for (MachineBasicBlock::const_iterator MBBI = MFI->begin(),
210 MBBE = MFI->end(); MBBI != MBBE; ++MBBI) {
211 visitMachineInstrBefore(MBBI);
212 for (unsigned I = 0, E = MBBI->getNumOperands(); I != E; ++I)

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513 return;
514
515 // Check Live Variables.
516 if (MO->isUndef()) {
517 // An <undef> doesn't refer to any register, so just skip it.
518 } else if (MO->isUse()) {
519 regsLiveInButUnused.erase(Reg);
520
521 if (MO->isKill()) {
522 addRegWithSubRegs(regsKilled, Reg);
523 // Tied operands on two-address instuctions MUST NOT have a <kill> flag.
524 if (MI->isRegTiedToDefOperand(MONum))
525 report("Illegal kill flag on two-address instruction operand",
526 MO, MONum);
527 } else {
528 // TwoAddress instr modifying a reg is treated as kill+def.
529 unsigned defIdx;
530 if (MI->isRegTiedToDefOperand(MONum, &defIdx) &&
531 MI->getOperand(defIdx).getReg() == Reg)
532 addRegWithSubRegs(regsKilled, Reg);
533 }
534 // Use of a dead register.
535 if (!regsLive.count(Reg)) {
536 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
537 // Reserved registers may be used even when 'dead'.
538 if (!isReserved(Reg))
539 report("Using an undefined physical register", MO, MONum);
540 } else {
541 BBInfo &MInfo = MBBInfoMap[MI->getParent()];

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729 // If any regs removed, we need to recheck successors.
730 if (!dead.empty()) {
731 set_subtract(MInfo.vregsPassed, dead);
732 todo.insert(MBB->succ_begin(), MBB->succ_end());
733 }
734 }
735}
736
737// Check PHI instructions at the beginning of MBB. It is assumed that
738// calcMinRegsPassed has been run so BBInfo::isLiveOut is valid.
739void MachineVerifier::checkPHIOps(const MachineBasicBlock *MBB) {
740 for (MachineBasicBlock::const_iterator BBI = MBB->begin(), BBE = MBB->end();
741 BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI) {
742 DenseSet<const MachineBasicBlock*> seen;
743
744 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) {

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844 *OS << "Register %reg" << I->first
845 << " is not live-out from predecessor MBB #"
846 << (*PrI)->getNumber()
847 << ".\n";
848 }
849 }
850 }
851 }
852}