1//===-- MachineLICM.cpp - Machine Loop Invariant Code Motion Pass ---------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

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19// constructs that are not exposed before lowering and instruction selection.
20//
21//===----------------------------------------------------------------------===//
22
23#define DEBUG_TYPE "machine-licm"
24#include "llvm/CodeGen/Passes.h"
25#include "llvm/CodeGen/MachineDominators.h"
26#include "llvm/CodeGen/MachineLoopInfo.h"
27#include "llvm/CodeGen/MachineRegisterInfo.h"
28#include "llvm/Target/TargetRegisterInfo.h"
29#include "llvm/Target/TargetInstrInfo.h"
30#include "llvm/Target/TargetMachine.h"
31#include "llvm/Analysis/AliasAnalysis.h"
32#include "llvm/ADT/DenseMap.h"
33#include "llvm/ADT/Statistic.h"
34#include "llvm/Support/Compiler.h"
35#include "llvm/Support/Debug.h"
36#include "llvm/Support/raw_ostream.h"
37
38using namespace llvm;
39
40STATISTIC(NumHoisted, "Number of machine instructions hoisted out of loops");
41STATISTIC(NumCSEed, "Number of hoisted machine instructions CSEed");
42
43namespace {
44 class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass {
45 const TargetMachine *TM;
46 const TargetInstrInfo *TII;
47 const TargetRegisterInfo *TRI;
48 BitVector AllocatableSet;
49
50 // Various analyses that we use...
51 AliasAnalysis *AA; // Alias analysis info.
52 MachineLoopInfo *LI; // Current MachineLoopInfo
53 MachineDominatorTree *DT; // Machine dominator tree for the cur loop
54 MachineRegisterInfo *RegInfo; // Machine register information
55
56 // State that is updated as we process loops
57 bool Changed; // True if a loop is changed.
58 MachineLoop *CurLoop; // The current loop we are working on.
59 MachineBasicBlock *CurPreheader; // The preheader for CurLoop.
60
61 // For each BB and opcode pair, keep a list of hoisted instructions.
62 DenseMap<std::pair<unsigned, unsigned>,
63 std::vector<const MachineInstr*> > CSEMap;
64 public:
65 static char ID; // Pass identification, replacement for typeid
66 MachineLICM() : MachineFunctionPass(&ID) {}
67
68 virtual bool runOnMachineFunction(MachineFunction &MF);
69
70 const char *getPassName() const { return "Machine Instruction LICM"; }
71

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99 /// HoistRegion - Walk the specified region of the CFG (defined by all
100 /// blocks dominated by the specified block, and that are in the current
101 /// loop) in depth first order w.r.t the DominatorTree. This allows us to
102 /// visit definitions before uses, allowing us to hoist a loop body in one
103 /// pass without iteration.
104 ///
105 void HoistRegion(MachineDomTreeNode *N);
106
107 /// Hoist - When an instruction is found to only use loop invariant operands
108 /// that is safe to hoist, this instruction is called to do the dirty work.
109 ///
110 void Hoist(MachineInstr &MI);
111 };
112} // end anonymous namespace
113
114char MachineLICM::ID = 0;
115static RegisterPass<MachineLICM>
116X("machinelicm", "Machine Loop Invariant Code Motion");
117
118FunctionPass *llvm::createMachineLICMPass() { return new MachineLICM(); }

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128
129/// Hoist expressions out of the specified loop. Note, alias info for inner loop
130/// is not preserved so it is not a good idea to run LICM multiple times on one
131/// loop.
132///
133bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
134 DEBUG(errs() << "******** Machine LICM ********\n");
135
136 Changed = false;
137 TM = &MF.getTarget();
138 TII = TM->getInstrInfo();
139 TRI = TM->getRegisterInfo();
140 RegInfo = &MF.getRegInfo();
141 AllocatableSet = TRI->getAllocatableSet(MF);
142
143 // Get our Loop information...
144 LI = &getAnalysis<MachineLoopInfo>();
145 DT = &getAnalysis<MachineDominatorTree>();
146 AA = &getAnalysis<AliasAnalysis>();
147
148 for (MachineLoopInfo::iterator
149 I = LI->begin(), E = LI->end(); I != E; ++I) {
150 CurLoop = *I;
151
152 // Only visit outer-most preheader-sporting loops.
153 if (!LoopIsOuterMostWithPreheader(CurLoop))
154 continue;
155
156 // Determine the block to which to hoist instructions. If we can't find a
157 // suitable loop preheader, we can't do any hoisting.
158 //
159 // FIXME: We are only hoisting if the basic block coming into this loop
160 // has only one successor. This isn't the case in general because we haven't
161 // broken critical edges or added preheaders.
162 CurPreheader = CurLoop->getLoopPreheader();
163 if (!CurPreheader)
164 continue;
165
166 HoistRegion(DT->getNode(CurLoop->getHeader()));
167 }
168
169 return Changed;
170}
171
172/// HoistRegion - Walk the specified region of the CFG (defined by all blocks
173/// dominated by the specified block, and that are in the current loop) in depth
174/// first order w.r.t the DominatorTree. This allows us to visit definitions

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179 MachineBasicBlock *BB = N->getBlock();
180
181 // If this subregion is not in the top level loop at all, exit.
182 if (!CurLoop->contains(BB)) return;
183
184 for (MachineBasicBlock::iterator
185 MII = BB->begin(), E = BB->end(); MII != E; ) {
186 MachineBasicBlock::iterator NextMII = MII; ++NextMII;
187 MachineInstr &MI = *MII;
188
189 Hoist(MI);
190
191 MII = NextMII;
192 }
193
194 const std::vector<MachineDomTreeNode*> &Children = N->getChildren();
195
196 for (unsigned I = 0, E = Children.size(); I != E; ++I)
197 HoistRegion(Children[I]);
198}

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363 }
364 }
365 if (IsSame)
366 return PrevMI;
367 }
368 return 0;
369}
370
371/// Hoist - When an instruction is found to use only loop invariant operands
372/// that are safe to hoist, this instruction is called to do the dirty work.
373///
374void MachineLICM::Hoist(MachineInstr &MI) {
375 if (!IsLoopInvariantInst(MI)) return;
376 if (!IsProfitableToHoist(MI)) return;
377
378 // Now move the instructions to the predecessor, inserting it before any
379 // terminator instructions.
380 DEBUG({
381 errs() << "Hoisting " << MI;
382 if (CurPreheader->getBasicBlock())
383 errs() << " to MachineBasicBlock "
384 << CurPreheader->getBasicBlock()->getName();
385 if (MI.getParent()->getBasicBlock())
386 errs() << " from MachineBasicBlock "
387 << MI.getParent()->getBasicBlock()->getName();
388 errs() << "\n";
389 });
390
391 // Look for opportunity to CSE the hoisted instruction.
392 std::pair<unsigned, unsigned> BBOpcPair =
393 std::make_pair(CurPreheader->getNumber(), MI.getOpcode());
394 DenseMap<std::pair<unsigned, unsigned>,
395 std::vector<const MachineInstr*> >::iterator CI = CSEMap.find(BBOpcPair);
396 bool DoneCSE = false;
397 if (CI != CSEMap.end()) {
398 const MachineInstr *Dup = LookForDuplicate(&MI, CI->second, RegInfo);
399 if (Dup) {
400 DEBUG(errs() << "CSEing " << MI << " with " << *Dup);
401 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
402 const MachineOperand &MO = MI.getOperand(i);
403 if (MO.isReg() && MO.isDef())
404 RegInfo->replaceRegWith(MO.getReg(), Dup->getOperand(i).getReg());
405 }
406 MI.eraseFromParent();
407 DoneCSE = true;
408 ++NumCSEed;
409 }
410 }
411
412 // Otherwise, splice the instruction to the preheader.
413 if (!DoneCSE) {
414 CurPreheader->splice(CurPreheader->getFirstTerminator(),
415 MI.getParent(), &MI);
416 // Add to the CSE map.
417 if (CI != CSEMap.end())
418 CI->second.push_back(&MI);
419 else {
420 std::vector<const MachineInstr*> CSEMIs;
421 CSEMIs.push_back(&MI);
422 CSEMap.insert(std::make_pair(BBOpcPair, CSEMIs));
423 }
424 }
425
426 ++NumHoisted;
427 Changed = true;
428}