1/* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 2, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING. If not, write to the Free
19Software Foundation, 59 Temple Place - Suite 330, Boston, MA
2002111-1307, USA. */
21
22/* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
24
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
30
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
35
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
38
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
42
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
46
47#include "config.h"
48#include "system.h"
49
50#include "tree.h"
51#include "rtl.h"
52#include "tm_p.h"
53#include "regs.h"
54#include "insn-config.h"
55#include "insn-attr.h"
56#include "recog.h"
57#include "conditions.h"
58#include "flags.h"
59#include "real.h"
60#include "hard-reg-set.h"
61#include "output.h"
62#include "except.h"
63#include "function.h"
64#include "toplev.h"
65#include "reload.h"
66#include "intl.h"
67#include "basic-block.h"
68#include "target.h"
69#include "debug.h"
70#include "expr.h"
| 1/* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 2, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING. If not, write to the Free
19Software Foundation, 59 Temple Place - Suite 330, Boston, MA
2002111-1307, USA. */
21
22/* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
24
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
30
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
35
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
38
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
42
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
46
47#include "config.h"
48#include "system.h"
49
50#include "tree.h"
51#include "rtl.h"
52#include "tm_p.h"
53#include "regs.h"
54#include "insn-config.h"
55#include "insn-attr.h"
56#include "recog.h"
57#include "conditions.h"
58#include "flags.h"
59#include "real.h"
60#include "hard-reg-set.h"
61#include "output.h"
62#include "except.h"
63#include "function.h"
64#include "toplev.h"
65#include "reload.h"
66#include "intl.h"
67#include "basic-block.h"
68#include "target.h"
69#include "debug.h"
70#include "expr.h"
|
| 71#include "profile.h"
72#include "cfglayout.h"
|
71
72#ifdef XCOFF_DEBUGGING_INFO
73#include "xcoffout.h" /* Needed for external data
74 declarations for e.g. AIX 4.x. */
75#endif
76
77#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
78#include "dwarf2out.h"
79#endif
80
81/* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
82 null default for it to save conditionalization later. */
83#ifndef CC_STATUS_INIT
84#define CC_STATUS_INIT
85#endif
86
87/* How to start an assembler comment. */
88#ifndef ASM_COMMENT_START
89#define ASM_COMMENT_START ";#"
90#endif
91
92/* Is the given character a logical line separator for the assembler? */
93#ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
94#define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
95#endif
96
97#ifndef JUMP_TABLES_IN_TEXT_SECTION
98#define JUMP_TABLES_IN_TEXT_SECTION 0
99#endif
100
| 73
74#ifdef XCOFF_DEBUGGING_INFO
75#include "xcoffout.h" /* Needed for external data
76 declarations for e.g. AIX 4.x. */
77#endif
78
79#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
80#include "dwarf2out.h"
81#endif
82
83/* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
84 null default for it to save conditionalization later. */
85#ifndef CC_STATUS_INIT
86#define CC_STATUS_INIT
87#endif
88
89/* How to start an assembler comment. */
90#ifndef ASM_COMMENT_START
91#define ASM_COMMENT_START ";#"
92#endif
93
94/* Is the given character a logical line separator for the assembler? */
95#ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
96#define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
97#endif
98
99#ifndef JUMP_TABLES_IN_TEXT_SECTION
100#define JUMP_TABLES_IN_TEXT_SECTION 0
101#endif
102
|
| 103#if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
104#define HAVE_READONLY_DATA_SECTION 1
105#else
106#define HAVE_READONLY_DATA_SECTION 0
107#endif
108
|
101/* Last insn processed by final_scan_insn. */
102static rtx debug_insn;
103rtx current_output_insn;
104
105/* Line number of last NOTE. */
106static int last_linenum;
107
108/* Highest line number in current block. */
109static int high_block_linenum;
110
111/* Likewise for function. */
112static int high_function_linenum;
113
114/* Filename of last NOTE. */
115static const char *last_filename;
116
| 109/* Last insn processed by final_scan_insn. */
110static rtx debug_insn;
111rtx current_output_insn;
112
113/* Line number of last NOTE. */
114static int last_linenum;
115
116/* Highest line number in current block. */
117static int high_block_linenum;
118
119/* Likewise for function. */
120static int high_function_linenum;
121
122/* Filename of last NOTE. */
123static const char *last_filename;
124
|
117/* Number of instrumented arcs when profile_arc_flag is set. */
118extern int count_instrumented_edges;
119
| |
120extern int length_unit_log; /* This is defined in insn-attrtab.c. */
121
122/* Nonzero while outputting an `asm' with operands.
123 This means that inconsistencies are the user's fault, so don't abort.
124 The precise value is the insn being output, to pass to error_for_asm. */
| 125extern int length_unit_log; /* This is defined in insn-attrtab.c. */
126
127/* Nonzero while outputting an `asm' with operands.
128 This means that inconsistencies are the user's fault, so don't abort.
129 The precise value is the insn being output, to pass to error_for_asm. */
|
125static rtx this_is_asm_operands;
| 130rtx this_is_asm_operands;
|
126
127/* Number of operands of this insn, for an `asm' with operands. */
128static unsigned int insn_noperands;
129
130/* Compare optimization flag. */
131
132static rtx last_ignored_compare = 0;
133
134/* Flag indicating this insn is the start of a new basic block. */
135
136static int new_block = 1;
137
138/* Assign a unique number to each insn that is output.
139 This can be used to generate unique local labels. */
140
141static int insn_counter = 0;
142
143#ifdef HAVE_cc0
144/* This variable contains machine-dependent flags (defined in tm.h)
145 set and examined by output routines
146 that describe how to interpret the condition codes properly. */
147
148CC_STATUS cc_status;
149
150/* During output of an insn, this contains a copy of cc_status
151 from before the insn. */
152
153CC_STATUS cc_prev_status;
154#endif
155
156/* Indexed by hardware reg number, is 1 if that register is ever
157 used in the current function.
158
159 In life_analysis, or in stupid_life_analysis, this is set
160 up to record the hard regs used explicitly. Reload adds
161 in the hard regs used for holding pseudo regs. Final uses
162 it to generate the code in the function prologue and epilogue
163 to save and restore registers as needed. */
164
165char regs_ever_live[FIRST_PSEUDO_REGISTER];
166
167/* Nonzero means current function must be given a frame pointer.
168 Set in stmt.c if anything is allocated on the stack there.
169 Set in reload1.c if anything is allocated on the stack there. */
170
171int frame_pointer_needed;
172
173/* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
174
175static int block_depth;
176
177/* Nonzero if have enabled APP processing of our assembler output. */
178
179static int app_on;
180
181/* If we are outputting an insn sequence, this contains the sequence rtx.
182 Zero otherwise. */
183
184rtx final_sequence;
185
186#ifdef ASSEMBLER_DIALECT
187
188/* Number of the assembler dialect to use, starting at 0. */
189static int dialect_number;
190#endif
191
192/* Indexed by line number, nonzero if there is a note for that line. */
193
194static char *line_note_exists;
195
196#ifdef HAVE_conditional_execution
197/* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
198rtx current_insn_predicate;
199#endif
200
| 131
132/* Number of operands of this insn, for an `asm' with operands. */
133static unsigned int insn_noperands;
134
135/* Compare optimization flag. */
136
137static rtx last_ignored_compare = 0;
138
139/* Flag indicating this insn is the start of a new basic block. */
140
141static int new_block = 1;
142
143/* Assign a unique number to each insn that is output.
144 This can be used to generate unique local labels. */
145
146static int insn_counter = 0;
147
148#ifdef HAVE_cc0
149/* This variable contains machine-dependent flags (defined in tm.h)
150 set and examined by output routines
151 that describe how to interpret the condition codes properly. */
152
153CC_STATUS cc_status;
154
155/* During output of an insn, this contains a copy of cc_status
156 from before the insn. */
157
158CC_STATUS cc_prev_status;
159#endif
160
161/* Indexed by hardware reg number, is 1 if that register is ever
162 used in the current function.
163
164 In life_analysis, or in stupid_life_analysis, this is set
165 up to record the hard regs used explicitly. Reload adds
166 in the hard regs used for holding pseudo regs. Final uses
167 it to generate the code in the function prologue and epilogue
168 to save and restore registers as needed. */
169
170char regs_ever_live[FIRST_PSEUDO_REGISTER];
171
172/* Nonzero means current function must be given a frame pointer.
173 Set in stmt.c if anything is allocated on the stack there.
174 Set in reload1.c if anything is allocated on the stack there. */
175
176int frame_pointer_needed;
177
178/* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
179
180static int block_depth;
181
182/* Nonzero if have enabled APP processing of our assembler output. */
183
184static int app_on;
185
186/* If we are outputting an insn sequence, this contains the sequence rtx.
187 Zero otherwise. */
188
189rtx final_sequence;
190
191#ifdef ASSEMBLER_DIALECT
192
193/* Number of the assembler dialect to use, starting at 0. */
194static int dialect_number;
195#endif
196
197/* Indexed by line number, nonzero if there is a note for that line. */
198
199static char *line_note_exists;
200
201#ifdef HAVE_conditional_execution
202/* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
203rtx current_insn_predicate;
204#endif
205
|
| 206struct function_list
207{
208 struct function_list *next; /* next function */
209 const char *name; /* function name */
210 long cfg_checksum; /* function checksum */
211 long count_edges; /* number of intrumented edges in this function */
212};
213
214static struct function_list *functions_head = 0;
215static struct function_list **functions_tail = &functions_head;
216
|
201#ifdef HAVE_ATTR_length
202static int asm_insn_count PARAMS ((rtx));
203#endif
204static void profile_function PARAMS ((FILE *));
205static void profile_after_prologue PARAMS ((FILE *));
206static void notice_source_line PARAMS ((rtx));
207static rtx walk_alter_subreg PARAMS ((rtx *));
208static void output_asm_name PARAMS ((void));
| 217#ifdef HAVE_ATTR_length
218static int asm_insn_count PARAMS ((rtx));
219#endif
220static void profile_function PARAMS ((FILE *));
221static void profile_after_prologue PARAMS ((FILE *));
222static void notice_source_line PARAMS ((rtx));
223static rtx walk_alter_subreg PARAMS ((rtx *));
224static void output_asm_name PARAMS ((void));
|
| 225static void output_alternate_entry_point PARAMS ((FILE *, rtx));
|
209static tree get_mem_expr_from_op PARAMS ((rtx, int *));
210static void output_asm_operand_names PARAMS ((rtx *, int *, int));
211static void output_operand PARAMS ((rtx, int));
212#ifdef LEAF_REGISTERS
213static void leaf_renumber_regs PARAMS ((rtx));
214#endif
215#ifdef HAVE_cc0
216static int alter_cond PARAMS ((rtx));
217#endif
218#ifndef ADDR_VEC_ALIGN
219static int final_addr_vec_align PARAMS ((rtx));
220#endif
221#ifdef HAVE_ATTR_length
222static int align_fuzz PARAMS ((rtx, rtx, int, unsigned));
223#endif
224
225/* Initialize data in final at the beginning of a compilation. */
226
227void
228init_final (filename)
229 const char *filename ATTRIBUTE_UNUSED;
230{
231 app_on = 0;
232 final_sequence = 0;
233
234#ifdef ASSEMBLER_DIALECT
235 dialect_number = ASSEMBLER_DIALECT;
236#endif
237}
238
239/* Called at end of source file,
| 226static tree get_mem_expr_from_op PARAMS ((rtx, int *));
227static void output_asm_operand_names PARAMS ((rtx *, int *, int));
228static void output_operand PARAMS ((rtx, int));
229#ifdef LEAF_REGISTERS
230static void leaf_renumber_regs PARAMS ((rtx));
231#endif
232#ifdef HAVE_cc0
233static int alter_cond PARAMS ((rtx));
234#endif
235#ifndef ADDR_VEC_ALIGN
236static int final_addr_vec_align PARAMS ((rtx));
237#endif
238#ifdef HAVE_ATTR_length
239static int align_fuzz PARAMS ((rtx, rtx, int, unsigned));
240#endif
241
242/* Initialize data in final at the beginning of a compilation. */
243
244void
245init_final (filename)
246 const char *filename ATTRIBUTE_UNUSED;
247{
248 app_on = 0;
249 final_sequence = 0;
250
251#ifdef ASSEMBLER_DIALECT
252 dialect_number = ASSEMBLER_DIALECT;
253#endif
254}
255
256/* Called at end of source file,
|
240 to output the block-profiling table for this entire compilation. */
| 257 to output the arc-profiling table for this entire compilation. */
|
241
242void
243end_final (filename)
244 const char *filename;
245{
| 258
259void
260end_final (filename)
261 const char *filename;
262{
|
246 if (profile_arc_flag)
| 263 if (profile_arc_flag && profile_info.count_instrumented_edges)
|
247 {
248 char name[20];
| 264 {
265 char name[20];
|
249 int align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
250 int size, rounded;
251 int long_bytes = LONG_TYPE_SIZE / BITS_PER_UNIT;
252 int gcov_type_bytes = GCOV_TYPE_SIZE / BITS_PER_UNIT;
253 int pointer_bytes = POINTER_SIZE / BITS_PER_UNIT;
254 unsigned int align2 = LONG_TYPE_SIZE;
| 266 tree string_type, string_cst;
267 tree structure_decl, structure_value, structure_pointer_type;
268 tree field_decl, decl_chain, value_chain;
269 tree sizeof_field_value, domain_type;
|
255
| 270
|
256 size = gcov_type_bytes * count_instrumented_edges;
257 rounded = size;
| 271 /* Build types. */
272 string_type = build_pointer_type (char_type_node);
|
258
| 273
|
259 rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1;
260 rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT)
261 * (BIGGEST_ALIGNMENT / BITS_PER_UNIT));
| 274 /* Libgcc2 bb structure. */
275 structure_decl = make_node (RECORD_TYPE);
276 structure_pointer_type = build_pointer_type (structure_decl);
|
262
| 277
|
263 /* ??? This _really_ ought to be done with a structure layout
264 and with assemble_constructor. If long_bytes != pointer_bytes
265 we'll be emitting unaligned data at some point. */
266 if (long_bytes != pointer_bytes)
267 abort ();
| 278 /* Output the main header, of 7 words:
279 0: 1 if this file is initialized, else 0.
280 1: address of file name (LPBX1).
281 2: address of table of counts (LPBX2).
282 3: number of counts in the table.
283 4: always 0, libgcc2 uses this as a pointer to next ``struct bb''
|
268
| 284
|
269 data_section ();
| 285 The following are GNU extensions:
|
270
| 286
|
271 /* Output the main header, of 11 words:
272 0: 1 if this file is initialized, else 0.
273 1: address of file name (LPBX1).
274 2: address of table of counts (LPBX2).
275 3: number of counts in the table.
276 4: always 0, for compatibility with Sun.
| 287 5: Number of bytes in this header.
288 6: address of table of function checksums (LPBX7). */
|
277
| 289
|
278 The following are GNU extensions:
| 290 /* The zero word. */
291 decl_chain =
292 build_decl (FIELD_DECL, get_identifier ("zero_word"),
293 long_integer_type_node);
294 value_chain = build_tree_list (decl_chain,
295 convert (long_integer_type_node,
296 integer_zero_node));
|
279
| 297
|
280 5: address of table of start addrs of basic blocks (LPBX3).
281 6: Number of bytes in this header.
282 7: address of table of function names (LPBX4).
283 8: address of table of line numbers (LPBX5) or 0.
284 9: address of table of file names (LPBX6) or 0.
285 10: space reserved for basic block profiling. */
| 298 /* Address of filename. */
299 {
300 char *cwd, *da_filename;
301 int da_filename_len;
|
286
| 302
|
287 ASM_OUTPUT_ALIGN (asm_out_file, align);
| 303 field_decl =
304 build_decl (FIELD_DECL, get_identifier ("filename"), string_type);
305 TREE_CHAIN (field_decl) = decl_chain;
306 decl_chain = field_decl;
|
288
| 307
|
289 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 0);
| 308 cwd = getpwd ();
309 da_filename_len = strlen (filename) + strlen (cwd) + 4 + 1;
310 da_filename = (char *) alloca (da_filename_len);
311 strcpy (da_filename, cwd);
312 strcat (da_filename, "/");
313 strcat (da_filename, filename);
314 strcat (da_filename, ".da");
315 da_filename_len = strlen (da_filename);
316 string_cst = build_string (da_filename_len + 1, da_filename);
317 domain_type = build_index_type (build_int_2 (da_filename_len, 0));
318 TREE_TYPE (string_cst)
319 = build_array_type (char_type_node, domain_type);
320 value_chain = tree_cons (field_decl,
321 build1 (ADDR_EXPR, string_type, string_cst),
322 value_chain);
323 }
|
290
| 324
|
291 /* Zero word. */
292 assemble_integer (const0_rtx, long_bytes, align2, 1);
| 325 /* Table of counts. */
326 {
327 tree gcov_type_type = make_unsigned_type (GCOV_TYPE_SIZE);
328 tree gcov_type_pointer_type = build_pointer_type (gcov_type_type);
329 tree domain_tree
330 = build_index_type (build_int_2 (profile_info.
331 count_instrumented_edges - 1, 0));
332 tree gcov_type_array_type
333 = build_array_type (gcov_type_type, domain_tree);
334 tree gcov_type_array_pointer_type
335 = build_pointer_type (gcov_type_array_type);
336 tree counts_table;
|
293
| 337
|
294 /* Address of filename. */
295 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 1);
296 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
297 align2, 1);
| 338 field_decl =
339 build_decl (FIELD_DECL, get_identifier ("counts"),
340 gcov_type_pointer_type);
341 TREE_CHAIN (field_decl) = decl_chain;
342 decl_chain = field_decl;
|
298
| 343
|
299 /* Address of count table. */
300 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
301 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
302 align2, 1);
| 344 /* No values. */
345 counts_table
346 = build (VAR_DECL, gcov_type_array_type, NULL_TREE, NULL_TREE);
347 TREE_STATIC (counts_table) = 1;
348 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
349 DECL_NAME (counts_table) = get_identifier (name);
350 assemble_variable (counts_table, 0, 0, 0);
|
303
| 351
|
| 352 value_chain = tree_cons (field_decl,
353 build1 (ADDR_EXPR,
354 gcov_type_array_pointer_type,
355 counts_table), value_chain);
356 }
357
|
304 /* Count of the # of instrumented arcs. */
| 358 /* Count of the # of instrumented arcs. */
|
305 assemble_integer (GEN_INT (count_instrumented_edges),
306 long_bytes, align2, 1);
| 359 field_decl
360 = build_decl (FIELD_DECL, get_identifier ("ncounts"),
361 long_integer_type_node);
362 TREE_CHAIN (field_decl) = decl_chain;
363 decl_chain = field_decl;
|
307
| 364
|
308 /* Zero word (link field). */
309 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
| 365 value_chain = tree_cons (field_decl,
366 convert (long_integer_type_node,
367 build_int_2 (profile_info.
368 count_instrumented_edges,
369 0)), value_chain);
370 /* Pointer to the next bb. */
371 field_decl
372 = build_decl (FIELD_DECL, get_identifier ("next"),
373 structure_pointer_type);
374 TREE_CHAIN (field_decl) = decl_chain;
375 decl_chain = field_decl;
|
310
| 376
|
311 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
| 377 value_chain = tree_cons (field_decl, null_pointer_node, value_chain);
|
312
| 378
|
313 /* Byte count for extended structure. */
314 assemble_integer (GEN_INT (11 * UNITS_PER_WORD), long_bytes, align2, 1);
| 379 /* sizeof(struct bb). We'll set this after entire structure
380 is laid out. */
381 field_decl
382 = build_decl (FIELD_DECL, get_identifier ("sizeof_bb"),
383 long_integer_type_node);
384 TREE_CHAIN (field_decl) = decl_chain;
385 decl_chain = field_decl;
|
315
| 386
|
316 /* Address of function name table. */
317 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
| 387 sizeof_field_value = tree_cons (field_decl, NULL, value_chain);
388 value_chain = sizeof_field_value;
|
318
| 389
|
319 /* Address of line number and filename tables if debugging. */
320 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
321 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
| 390 /* struct bb_function []. */
391 {
392 struct function_list *item;
393 int num_nodes;
394 tree checksum_field, arc_count_field, name_field;
395 tree domain;
396 tree array_value_chain = NULL_TREE;
397 tree bb_fn_struct_type;
398 tree bb_fn_struct_array_type;
399 tree bb_fn_struct_array_pointer_type;
400 tree bb_fn_struct_pointer_type;
401 tree field_value, field_value_chain;
|
322
| 402
|
323 /* Space for extension ptr (link field). */
324 assemble_integer (const0_rtx, UNITS_PER_WORD, align2, 1);
| 403 bb_fn_struct_type = make_node (RECORD_TYPE);
|
325
| 404
|
326 /* Output the file name changing the suffix to .d for
327 Sun tcov compatibility. */
328 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 1);
329 {
330 char *cwd = getpwd ();
331 int len = strlen (filename) + strlen (cwd) + 1;
332 char *data_file = (char *) alloca (len + 4);
| 405 checksum_field = build_decl (FIELD_DECL, get_identifier ("checksum"),
406 long_integer_type_node);
|
333
| 407
|
334 strcpy (data_file, cwd);
335 strcat (data_file, "/");
336 strcat (data_file, filename);
337 strip_off_ending (data_file, len);
338 strcat (data_file, ".da");
339 assemble_string (data_file, strlen (data_file) + 1);
| 408 arc_count_field
409 = build_decl (FIELD_DECL, get_identifier ("arc_count"),
410 integer_type_node);
411 TREE_CHAIN (checksum_field) = arc_count_field;
412
413 name_field
414 = build_decl (FIELD_DECL, get_identifier ("name"), string_type);
415 TREE_CHAIN (arc_count_field) = name_field;
416
417 TYPE_FIELDS (bb_fn_struct_type) = checksum_field;
418
419 num_nodes = 0;
420
421 for (item = functions_head; item != 0; item = item->next)
422 num_nodes++;
423
424 /* Note that the array contains a terminator, hence no - 1. */
425 domain = build_index_type (build_int_2 (num_nodes, 0));
426
427 bb_fn_struct_pointer_type = build_pointer_type (bb_fn_struct_type);
428 bb_fn_struct_array_type
429 = build_array_type (bb_fn_struct_type, domain);
430 bb_fn_struct_array_pointer_type
431 = build_pointer_type (bb_fn_struct_array_type);
432
433 layout_type (bb_fn_struct_type);
434 layout_type (bb_fn_struct_pointer_type);
435 layout_type (bb_fn_struct_array_type);
436 layout_type (bb_fn_struct_array_pointer_type);
437
438 for (item = functions_head; item != 0; item = item->next)
439 {
440 size_t name_len;
441
442 /* create constructor for structure. */
443 field_value_chain
444 = build_tree_list (checksum_field,
445 convert (long_integer_type_node,
446 build_int_2 (item->cfg_checksum, 0)));
447 field_value_chain
448 = tree_cons (arc_count_field,
449 convert (integer_type_node,
450 build_int_2 (item->count_edges, 0)),
451 field_value_chain);
452
453 name_len = strlen (item->name);
454 string_cst = build_string (name_len + 1, item->name);
455 domain_type = build_index_type (build_int_2 (name_len, 0));
456 TREE_TYPE (string_cst)
457 = build_array_type (char_type_node, domain_type);
458 field_value_chain = tree_cons (name_field,
459 build1 (ADDR_EXPR, string_type,
460 string_cst),
461 field_value_chain);
462
463 /* Add to chain. */
464 array_value_chain
465 = tree_cons (NULL_TREE, build (CONSTRUCTOR,
466 bb_fn_struct_type, NULL_TREE,
467 nreverse (field_value_chain)),
468 array_value_chain);
469 }
470
471 /* Add terminator. */
472 field_value = build_tree_list (arc_count_field,
473 convert (integer_type_node,
474 build_int_2 (-1, 0)));
475
476 array_value_chain = tree_cons (NULL_TREE,
477 build (CONSTRUCTOR, bb_fn_struct_type,
478 NULL_TREE, field_value),
479 array_value_chain);
480
481
482 /* Create constructor for array. */
483 field_decl
484 = build_decl (FIELD_DECL, get_identifier ("function_infos"),
485 bb_fn_struct_pointer_type);
486 value_chain = tree_cons (field_decl,
487 build1 (ADDR_EXPR,
488 bb_fn_struct_array_pointer_type,
489 build (CONSTRUCTOR,
490 bb_fn_struct_array_type,
491 NULL_TREE,
492 nreverse
493 (array_value_chain))),
494 value_chain);
495 TREE_CHAIN (field_decl) = decl_chain;
496 decl_chain = field_decl;
|
340 }
341
| 497 }
498
|
342 /* Make space for the table of counts. */
343 if (size == 0)
344 {
345 /* Realign data section. */
346 ASM_OUTPUT_ALIGN (asm_out_file, align);
347 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 2);
348 if (size != 0)
349 assemble_zeros (size);
350 }
351 else
352 {
353 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
354#ifdef ASM_OUTPUT_SHARED_LOCAL
355 if (flag_shared_data)
356 ASM_OUTPUT_SHARED_LOCAL (asm_out_file, name, size, rounded);
357 else
358#endif
359#ifdef ASM_OUTPUT_ALIGNED_DECL_LOCAL
360 ASM_OUTPUT_ALIGNED_DECL_LOCAL (asm_out_file, NULL_TREE, name,
361 size, BIGGEST_ALIGNMENT);
362#else
363#ifdef ASM_OUTPUT_ALIGNED_LOCAL
364 ASM_OUTPUT_ALIGNED_LOCAL (asm_out_file, name, size,
365 BIGGEST_ALIGNMENT);
366#else
367 ASM_OUTPUT_LOCAL (asm_out_file, name, size, rounded);
368#endif
369#endif
370 }
| 499 /* Finish structure. */
500 TYPE_FIELDS (structure_decl) = nreverse (decl_chain);
501 layout_type (structure_decl);
502
503 structure_value
504 = build (VAR_DECL, structure_decl, NULL_TREE, NULL_TREE);
505 DECL_INITIAL (structure_value)
506 = build (CONSTRUCTOR, structure_decl, NULL_TREE,
507 nreverse (value_chain));
508 TREE_STATIC (structure_value) = 1;
509 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 0);
510 DECL_NAME (structure_value) = get_identifier (name);
511
512 /* Size of this structure. */
513 TREE_VALUE (sizeof_field_value)
514 = convert (long_integer_type_node,
515 build_int_2 (int_size_in_bytes (structure_decl), 0));
516
517 /* Build structure. */
518 assemble_variable (structure_value, 0, 0, 0);
|
371 }
372}
373
374/* Default target function prologue and epilogue assembler output.
375
376 If not overridden for epilogue code, then the function body itself
377 contains return instructions wherever needed. */
378void
379default_function_pro_epilogue (file, size)
380 FILE *file ATTRIBUTE_UNUSED;
381 HOST_WIDE_INT size ATTRIBUTE_UNUSED;
382{
383}
384
385/* Default target hook that outputs nothing to a stream. */
386void
387no_asm_to_stream (file)
388 FILE *file ATTRIBUTE_UNUSED;
389{
390}
391
392/* Enable APP processing of subsequent output.
393 Used before the output from an `asm' statement. */
394
395void
396app_enable ()
397{
398 if (! app_on)
399 {
400 fputs (ASM_APP_ON, asm_out_file);
401 app_on = 1;
402 }
403}
404
405/* Disable APP processing of subsequent output.
406 Called from varasm.c before most kinds of output. */
407
408void
409app_disable ()
410{
411 if (app_on)
412 {
413 fputs (ASM_APP_OFF, asm_out_file);
414 app_on = 0;
415 }
416}
417
418/* Return the number of slots filled in the current
419 delayed branch sequence (we don't count the insn needing the
420 delay slot). Zero if not in a delayed branch sequence. */
421
422#ifdef DELAY_SLOTS
423int
424dbr_sequence_length ()
425{
426 if (final_sequence != 0)
427 return XVECLEN (final_sequence, 0) - 1;
428 else
429 return 0;
430}
431#endif
432
433/* The next two pages contain routines used to compute the length of an insn
434 and to shorten branches. */
435
436/* Arrays for insn lengths, and addresses. The latter is referenced by
437 `insn_current_length'. */
438
439static int *insn_lengths;
440
| 519 }
520}
521
522/* Default target function prologue and epilogue assembler output.
523
524 If not overridden for epilogue code, then the function body itself
525 contains return instructions wherever needed. */
526void
527default_function_pro_epilogue (file, size)
528 FILE *file ATTRIBUTE_UNUSED;
529 HOST_WIDE_INT size ATTRIBUTE_UNUSED;
530{
531}
532
533/* Default target hook that outputs nothing to a stream. */
534void
535no_asm_to_stream (file)
536 FILE *file ATTRIBUTE_UNUSED;
537{
538}
539
540/* Enable APP processing of subsequent output.
541 Used before the output from an `asm' statement. */
542
543void
544app_enable ()
545{
546 if (! app_on)
547 {
548 fputs (ASM_APP_ON, asm_out_file);
549 app_on = 1;
550 }
551}
552
553/* Disable APP processing of subsequent output.
554 Called from varasm.c before most kinds of output. */
555
556void
557app_disable ()
558{
559 if (app_on)
560 {
561 fputs (ASM_APP_OFF, asm_out_file);
562 app_on = 0;
563 }
564}
565
566/* Return the number of slots filled in the current
567 delayed branch sequence (we don't count the insn needing the
568 delay slot). Zero if not in a delayed branch sequence. */
569
570#ifdef DELAY_SLOTS
571int
572dbr_sequence_length ()
573{
574 if (final_sequence != 0)
575 return XVECLEN (final_sequence, 0) - 1;
576 else
577 return 0;
578}
579#endif
580
581/* The next two pages contain routines used to compute the length of an insn
582 and to shorten branches. */
583
584/* Arrays for insn lengths, and addresses. The latter is referenced by
585 `insn_current_length'. */
586
587static int *insn_lengths;
588
|
441#ifdef HAVE_ATTR_length
| |
442varray_type insn_addresses_;
| 589varray_type insn_addresses_;
|
443#endif
| |
444
445/* Max uid for which the above arrays are valid. */
446static int insn_lengths_max_uid;
447
448/* Address of insn being processed. Used by `insn_current_length'. */
449int insn_current_address;
450
451/* Address of insn being processed in previous iteration. */
452int insn_last_address;
453
454/* known invariant alignment of insn being processed. */
455int insn_current_align;
456
457/* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
458 gives the next following alignment insn that increases the known
459 alignment, or NULL_RTX if there is no such insn.
460 For any alignment obtained this way, we can again index uid_align with
461 its uid to obtain the next following align that in turn increases the
462 alignment, till we reach NULL_RTX; the sequence obtained this way
463 for each insn we'll call the alignment chain of this insn in the following
464 comments. */
465
466struct label_alignment
467{
468 short alignment;
469 short max_skip;
470};
471
472static rtx *uid_align;
473static int *uid_shuid;
474static struct label_alignment *label_align;
475
476/* Indicate that branch shortening hasn't yet been done. */
477
478void
479init_insn_lengths ()
480{
481 if (uid_shuid)
482 {
483 free (uid_shuid);
484 uid_shuid = 0;
485 }
486 if (insn_lengths)
487 {
488 free (insn_lengths);
489 insn_lengths = 0;
490 insn_lengths_max_uid = 0;
491 }
492#ifdef HAVE_ATTR_length
493 INSN_ADDRESSES_FREE ();
494#endif
495 if (uid_align)
496 {
497 free (uid_align);
498 uid_align = 0;
499 }
500}
501
502/* Obtain the current length of an insn. If branch shortening has been done,
503 get its actual length. Otherwise, get its maximum length. */
504
505int
506get_attr_length (insn)
507 rtx insn ATTRIBUTE_UNUSED;
508{
509#ifdef HAVE_ATTR_length
510 rtx body;
511 int i;
512 int length = 0;
513
514 if (insn_lengths_max_uid > INSN_UID (insn))
515 return insn_lengths[INSN_UID (insn)];
516 else
517 switch (GET_CODE (insn))
518 {
519 case NOTE:
520 case BARRIER:
521 case CODE_LABEL:
522 return 0;
523
524 case CALL_INSN:
525 length = insn_default_length (insn);
526 break;
527
528 case JUMP_INSN:
529 body = PATTERN (insn);
| 590
591/* Max uid for which the above arrays are valid. */
592static int insn_lengths_max_uid;
593
594/* Address of insn being processed. Used by `insn_current_length'. */
595int insn_current_address;
596
597/* Address of insn being processed in previous iteration. */
598int insn_last_address;
599
600/* known invariant alignment of insn being processed. */
601int insn_current_align;
602
603/* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
604 gives the next following alignment insn that increases the known
605 alignment, or NULL_RTX if there is no such insn.
606 For any alignment obtained this way, we can again index uid_align with
607 its uid to obtain the next following align that in turn increases the
608 alignment, till we reach NULL_RTX; the sequence obtained this way
609 for each insn we'll call the alignment chain of this insn in the following
610 comments. */
611
612struct label_alignment
613{
614 short alignment;
615 short max_skip;
616};
617
618static rtx *uid_align;
619static int *uid_shuid;
620static struct label_alignment *label_align;
621
622/* Indicate that branch shortening hasn't yet been done. */
623
624void
625init_insn_lengths ()
626{
627 if (uid_shuid)
628 {
629 free (uid_shuid);
630 uid_shuid = 0;
631 }
632 if (insn_lengths)
633 {
634 free (insn_lengths);
635 insn_lengths = 0;
636 insn_lengths_max_uid = 0;
637 }
638#ifdef HAVE_ATTR_length
639 INSN_ADDRESSES_FREE ();
640#endif
641 if (uid_align)
642 {
643 free (uid_align);
644 uid_align = 0;
645 }
646}
647
648/* Obtain the current length of an insn. If branch shortening has been done,
649 get its actual length. Otherwise, get its maximum length. */
650
651int
652get_attr_length (insn)
653 rtx insn ATTRIBUTE_UNUSED;
654{
655#ifdef HAVE_ATTR_length
656 rtx body;
657 int i;
658 int length = 0;
659
660 if (insn_lengths_max_uid > INSN_UID (insn))
661 return insn_lengths[INSN_UID (insn)];
662 else
663 switch (GET_CODE (insn))
664 {
665 case NOTE:
666 case BARRIER:
667 case CODE_LABEL:
668 return 0;
669
670 case CALL_INSN:
671 length = insn_default_length (insn);
672 break;
673
674 case JUMP_INSN:
675 body = PATTERN (insn);
|
530 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
| 676 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
|
531 {
532 /* Alignment is machine-dependent and should be handled by
533 ADDR_VEC_ALIGN. */
534 }
535 else
536 length = insn_default_length (insn);
537 break;
538
539 case INSN:
540 body = PATTERN (insn);
541 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
542 return 0;
543
544 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
545 length = asm_insn_count (body) * insn_default_length (insn);
546 else if (GET_CODE (body) == SEQUENCE)
547 for (i = 0; i < XVECLEN (body, 0); i++)
548 length += get_attr_length (XVECEXP (body, 0, i));
549 else
550 length = insn_default_length (insn);
551 break;
552
553 default:
554 break;
555 }
556
557#ifdef ADJUST_INSN_LENGTH
558 ADJUST_INSN_LENGTH (insn, length);
559#endif
560 return length;
561#else /* not HAVE_ATTR_length */
562 return 0;
563#endif /* not HAVE_ATTR_length */
564}
565
566/* Code to handle alignment inside shorten_branches. */
567
568/* Here is an explanation how the algorithm in align_fuzz can give
569 proper results:
570
571 Call a sequence of instructions beginning with alignment point X
572 and continuing until the next alignment point `block X'. When `X'
573 is used in an expression, it means the alignment value of the
574 alignment point.
575
576 Call the distance between the start of the first insn of block X, and
577 the end of the last insn of block X `IX', for the `inner size of X'.
578 This is clearly the sum of the instruction lengths.
579
580 Likewise with the next alignment-delimited block following X, which we
581 shall call block Y.
582
583 Call the distance between the start of the first insn of block X, and
584 the start of the first insn of block Y `OX', for the `outer size of X'.
585
586 The estimated padding is then OX - IX.
587
588 OX can be safely estimated as
589
590 if (X >= Y)
591 OX = round_up(IX, Y)
592 else
593 OX = round_up(IX, X) + Y - X
594
595 Clearly est(IX) >= real(IX), because that only depends on the
596 instruction lengths, and those being overestimated is a given.
597
598 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
599 we needn't worry about that when thinking about OX.
600
601 When X >= Y, the alignment provided by Y adds no uncertainty factor
602 for branch ranges starting before X, so we can just round what we have.
603 But when X < Y, we don't know anything about the, so to speak,
604 `middle bits', so we have to assume the worst when aligning up from an
605 address mod X to one mod Y, which is Y - X. */
606
607#ifndef LABEL_ALIGN
608#define LABEL_ALIGN(LABEL) align_labels_log
609#endif
610
611#ifndef LABEL_ALIGN_MAX_SKIP
612#define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
613#endif
614
615#ifndef LOOP_ALIGN
616#define LOOP_ALIGN(LABEL) align_loops_log
617#endif
618
619#ifndef LOOP_ALIGN_MAX_SKIP
620#define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
621#endif
622
623#ifndef LABEL_ALIGN_AFTER_BARRIER
624#define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
625#endif
626
627#ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
628#define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
629#endif
630
631#ifndef JUMP_ALIGN
632#define JUMP_ALIGN(LABEL) align_jumps_log
633#endif
634
635#ifndef JUMP_ALIGN_MAX_SKIP
636#define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
637#endif
638
639#ifndef ADDR_VEC_ALIGN
640static int
641final_addr_vec_align (addr_vec)
642 rtx addr_vec;
643{
644 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
645
646 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
647 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
648 return exact_log2 (align);
649
650}
651
652#define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
653#endif
654
655#ifndef INSN_LENGTH_ALIGNMENT
656#define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
657#endif
658
659#define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
660
661static int min_labelno, max_labelno;
662
663#define LABEL_TO_ALIGNMENT(LABEL) \
664 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
665
666#define LABEL_TO_MAX_SKIP(LABEL) \
667 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
668
669/* For the benefit of port specific code do this also as a function. */
670
671int
672label_to_alignment (label)
673 rtx label;
674{
675 return LABEL_TO_ALIGNMENT (label);
676}
677
678#ifdef HAVE_ATTR_length
679/* The differences in addresses
680 between a branch and its target might grow or shrink depending on
681 the alignment the start insn of the range (the branch for a forward
682 branch or the label for a backward branch) starts out on; if these
683 differences are used naively, they can even oscillate infinitely.
684 We therefore want to compute a 'worst case' address difference that
685 is independent of the alignment the start insn of the range end
686 up on, and that is at least as large as the actual difference.
687 The function align_fuzz calculates the amount we have to add to the
688 naively computed difference, by traversing the part of the alignment
689 chain of the start insn of the range that is in front of the end insn
690 of the range, and considering for each alignment the maximum amount
691 that it might contribute to a size increase.
692
693 For casesi tables, we also want to know worst case minimum amounts of
694 address difference, in case a machine description wants to introduce
695 some common offset that is added to all offsets in a table.
696 For this purpose, align_fuzz with a growth argument of 0 computes the
697 appropriate adjustment. */
698
699/* Compute the maximum delta by which the difference of the addresses of
700 START and END might grow / shrink due to a different address for start
701 which changes the size of alignment insns between START and END.
702 KNOWN_ALIGN_LOG is the alignment known for START.
703 GROWTH should be ~0 if the objective is to compute potential code size
704 increase, and 0 if the objective is to compute potential shrink.
705 The return value is undefined for any other value of GROWTH. */
706
707static int
708align_fuzz (start, end, known_align_log, growth)
709 rtx start, end;
710 int known_align_log;
711 unsigned growth;
712{
713 int uid = INSN_UID (start);
714 rtx align_label;
715 int known_align = 1 << known_align_log;
716 int end_shuid = INSN_SHUID (end);
717 int fuzz = 0;
718
719 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
720 {
721 int align_addr, new_align;
722
723 uid = INSN_UID (align_label);
724 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
725 if (uid_shuid[uid] > end_shuid)
726 break;
727 known_align_log = LABEL_TO_ALIGNMENT (align_label);
728 new_align = 1 << known_align_log;
729 if (new_align < known_align)
730 continue;
731 fuzz += (-align_addr ^ growth) & (new_align - known_align);
732 known_align = new_align;
733 }
734 return fuzz;
735}
736
737/* Compute a worst-case reference address of a branch so that it
738 can be safely used in the presence of aligned labels. Since the
739 size of the branch itself is unknown, the size of the branch is
740 not included in the range. I.e. for a forward branch, the reference
741 address is the end address of the branch as known from the previous
742 branch shortening pass, minus a value to account for possible size
743 increase due to alignment. For a backward branch, it is the start
744 address of the branch as known from the current pass, plus a value
745 to account for possible size increase due to alignment.
746 NB.: Therefore, the maximum offset allowed for backward branches needs
747 to exclude the branch size. */
748
749int
750insn_current_reference_address (branch)
751 rtx branch;
752{
753 rtx dest, seq;
754 int seq_uid;
755
756 if (! INSN_ADDRESSES_SET_P ())
757 return 0;
758
759 seq = NEXT_INSN (PREV_INSN (branch));
760 seq_uid = INSN_UID (seq);
761 if (GET_CODE (branch) != JUMP_INSN)
762 /* This can happen for example on the PA; the objective is to know the
763 offset to address something in front of the start of the function.
764 Thus, we can treat it like a backward branch.
765 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
766 any alignment we'd encounter, so we skip the call to align_fuzz. */
767 return insn_current_address;
768 dest = JUMP_LABEL (branch);
769
770 /* BRANCH has no proper alignment chain set, so use SEQ.
771 BRANCH also has no INSN_SHUID. */
772 if (INSN_SHUID (seq) < INSN_SHUID (dest))
773 {
774 /* Forward branch. */
775 return (insn_last_address + insn_lengths[seq_uid]
776 - align_fuzz (seq, dest, length_unit_log, ~0));
777 }
778 else
779 {
780 /* Backward branch. */
781 return (insn_current_address
782 + align_fuzz (dest, seq, length_unit_log, ~0));
783 }
784}
785#endif /* HAVE_ATTR_length */
786
787void
788compute_alignments ()
789{
| 677 {
678 /* Alignment is machine-dependent and should be handled by
679 ADDR_VEC_ALIGN. */
680 }
681 else
682 length = insn_default_length (insn);
683 break;
684
685 case INSN:
686 body = PATTERN (insn);
687 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
688 return 0;
689
690 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
691 length = asm_insn_count (body) * insn_default_length (insn);
692 else if (GET_CODE (body) == SEQUENCE)
693 for (i = 0; i < XVECLEN (body, 0); i++)
694 length += get_attr_length (XVECEXP (body, 0, i));
695 else
696 length = insn_default_length (insn);
697 break;
698
699 default:
700 break;
701 }
702
703#ifdef ADJUST_INSN_LENGTH
704 ADJUST_INSN_LENGTH (insn, length);
705#endif
706 return length;
707#else /* not HAVE_ATTR_length */
708 return 0;
709#endif /* not HAVE_ATTR_length */
710}
711
712/* Code to handle alignment inside shorten_branches. */
713
714/* Here is an explanation how the algorithm in align_fuzz can give
715 proper results:
716
717 Call a sequence of instructions beginning with alignment point X
718 and continuing until the next alignment point `block X'. When `X'
719 is used in an expression, it means the alignment value of the
720 alignment point.
721
722 Call the distance between the start of the first insn of block X, and
723 the end of the last insn of block X `IX', for the `inner size of X'.
724 This is clearly the sum of the instruction lengths.
725
726 Likewise with the next alignment-delimited block following X, which we
727 shall call block Y.
728
729 Call the distance between the start of the first insn of block X, and
730 the start of the first insn of block Y `OX', for the `outer size of X'.
731
732 The estimated padding is then OX - IX.
733
734 OX can be safely estimated as
735
736 if (X >= Y)
737 OX = round_up(IX, Y)
738 else
739 OX = round_up(IX, X) + Y - X
740
741 Clearly est(IX) >= real(IX), because that only depends on the
742 instruction lengths, and those being overestimated is a given.
743
744 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
745 we needn't worry about that when thinking about OX.
746
747 When X >= Y, the alignment provided by Y adds no uncertainty factor
748 for branch ranges starting before X, so we can just round what we have.
749 But when X < Y, we don't know anything about the, so to speak,
750 `middle bits', so we have to assume the worst when aligning up from an
751 address mod X to one mod Y, which is Y - X. */
752
753#ifndef LABEL_ALIGN
754#define LABEL_ALIGN(LABEL) align_labels_log
755#endif
756
757#ifndef LABEL_ALIGN_MAX_SKIP
758#define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
759#endif
760
761#ifndef LOOP_ALIGN
762#define LOOP_ALIGN(LABEL) align_loops_log
763#endif
764
765#ifndef LOOP_ALIGN_MAX_SKIP
766#define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
767#endif
768
769#ifndef LABEL_ALIGN_AFTER_BARRIER
770#define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
771#endif
772
773#ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
774#define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
775#endif
776
777#ifndef JUMP_ALIGN
778#define JUMP_ALIGN(LABEL) align_jumps_log
779#endif
780
781#ifndef JUMP_ALIGN_MAX_SKIP
782#define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
783#endif
784
785#ifndef ADDR_VEC_ALIGN
786static int
787final_addr_vec_align (addr_vec)
788 rtx addr_vec;
789{
790 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
791
792 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
793 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
794 return exact_log2 (align);
795
796}
797
798#define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
799#endif
800
801#ifndef INSN_LENGTH_ALIGNMENT
802#define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
803#endif
804
805#define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
806
807static int min_labelno, max_labelno;
808
809#define LABEL_TO_ALIGNMENT(LABEL) \
810 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
811
812#define LABEL_TO_MAX_SKIP(LABEL) \
813 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
814
815/* For the benefit of port specific code do this also as a function. */
816
817int
818label_to_alignment (label)
819 rtx label;
820{
821 return LABEL_TO_ALIGNMENT (label);
822}
823
824#ifdef HAVE_ATTR_length
825/* The differences in addresses
826 between a branch and its target might grow or shrink depending on
827 the alignment the start insn of the range (the branch for a forward
828 branch or the label for a backward branch) starts out on; if these
829 differences are used naively, they can even oscillate infinitely.
830 We therefore want to compute a 'worst case' address difference that
831 is independent of the alignment the start insn of the range end
832 up on, and that is at least as large as the actual difference.
833 The function align_fuzz calculates the amount we have to add to the
834 naively computed difference, by traversing the part of the alignment
835 chain of the start insn of the range that is in front of the end insn
836 of the range, and considering for each alignment the maximum amount
837 that it might contribute to a size increase.
838
839 For casesi tables, we also want to know worst case minimum amounts of
840 address difference, in case a machine description wants to introduce
841 some common offset that is added to all offsets in a table.
842 For this purpose, align_fuzz with a growth argument of 0 computes the
843 appropriate adjustment. */
844
845/* Compute the maximum delta by which the difference of the addresses of
846 START and END might grow / shrink due to a different address for start
847 which changes the size of alignment insns between START and END.
848 KNOWN_ALIGN_LOG is the alignment known for START.
849 GROWTH should be ~0 if the objective is to compute potential code size
850 increase, and 0 if the objective is to compute potential shrink.
851 The return value is undefined for any other value of GROWTH. */
852
853static int
854align_fuzz (start, end, known_align_log, growth)
855 rtx start, end;
856 int known_align_log;
857 unsigned growth;
858{
859 int uid = INSN_UID (start);
860 rtx align_label;
861 int known_align = 1 << known_align_log;
862 int end_shuid = INSN_SHUID (end);
863 int fuzz = 0;
864
865 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
866 {
867 int align_addr, new_align;
868
869 uid = INSN_UID (align_label);
870 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
871 if (uid_shuid[uid] > end_shuid)
872 break;
873 known_align_log = LABEL_TO_ALIGNMENT (align_label);
874 new_align = 1 << known_align_log;
875 if (new_align < known_align)
876 continue;
877 fuzz += (-align_addr ^ growth) & (new_align - known_align);
878 known_align = new_align;
879 }
880 return fuzz;
881}
882
883/* Compute a worst-case reference address of a branch so that it
884 can be safely used in the presence of aligned labels. Since the
885 size of the branch itself is unknown, the size of the branch is
886 not included in the range. I.e. for a forward branch, the reference
887 address is the end address of the branch as known from the previous
888 branch shortening pass, minus a value to account for possible size
889 increase due to alignment. For a backward branch, it is the start
890 address of the branch as known from the current pass, plus a value
891 to account for possible size increase due to alignment.
892 NB.: Therefore, the maximum offset allowed for backward branches needs
893 to exclude the branch size. */
894
895int
896insn_current_reference_address (branch)
897 rtx branch;
898{
899 rtx dest, seq;
900 int seq_uid;
901
902 if (! INSN_ADDRESSES_SET_P ())
903 return 0;
904
905 seq = NEXT_INSN (PREV_INSN (branch));
906 seq_uid = INSN_UID (seq);
907 if (GET_CODE (branch) != JUMP_INSN)
908 /* This can happen for example on the PA; the objective is to know the
909 offset to address something in front of the start of the function.
910 Thus, we can treat it like a backward branch.
911 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
912 any alignment we'd encounter, so we skip the call to align_fuzz. */
913 return insn_current_address;
914 dest = JUMP_LABEL (branch);
915
916 /* BRANCH has no proper alignment chain set, so use SEQ.
917 BRANCH also has no INSN_SHUID. */
918 if (INSN_SHUID (seq) < INSN_SHUID (dest))
919 {
920 /* Forward branch. */
921 return (insn_last_address + insn_lengths[seq_uid]
922 - align_fuzz (seq, dest, length_unit_log, ~0));
923 }
924 else
925 {
926 /* Backward branch. */
927 return (insn_current_address
928 + align_fuzz (dest, seq, length_unit_log, ~0));
929 }
930}
931#endif /* HAVE_ATTR_length */
932
933void
934compute_alignments ()
935{
|
790 int i;
| |
791 int log, max_skip, max_log;
| 936 int log, max_skip, max_log;
|
| 937 basic_block bb;
|
792
793 if (label_align)
794 {
795 free (label_align);
796 label_align = 0;
797 }
798
799 max_labelno = max_label_num ();
800 min_labelno = get_first_label_num ();
801 label_align = (struct label_alignment *)
802 xcalloc (max_labelno - min_labelno + 1, sizeof (struct label_alignment));
803
804 /* If not optimizing or optimizing for size, don't assign any alignments. */
805 if (! optimize || optimize_size)
806 return;
807
| 938
939 if (label_align)
940 {
941 free (label_align);
942 label_align = 0;
943 }
944
945 max_labelno = max_label_num ();
946 min_labelno = get_first_label_num ();
947 label_align = (struct label_alignment *)
948 xcalloc (max_labelno - min_labelno + 1, sizeof (struct label_alignment));
949
950 /* If not optimizing or optimizing for size, don't assign any alignments. */
951 if (! optimize || optimize_size)
952 return;
953
|
808 for (i = 0; i < n_basic_blocks; i++)
| 954 FOR_EACH_BB (bb)
|
809 {
| 955 {
|
810 basic_block bb = BASIC_BLOCK (i);
| |
811 rtx label = bb->head;
812 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
813 edge e;
814
815 if (GET_CODE (label) != CODE_LABEL)
816 continue;
817 max_log = LABEL_ALIGN (label);
818 max_skip = LABEL_ALIGN_MAX_SKIP;
819
820 for (e = bb->pred; e; e = e->pred_next)
821 {
822 if (e->flags & EDGE_FALLTHRU)
823 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
824 else
825 branch_frequency += EDGE_FREQUENCY (e);
826 }
827
828 /* There are two purposes to align block with no fallthru incoming edge:
829 1) to avoid fetch stalls when branch destination is near cache boundary
830 2) to improve cache efficiency in case the previous block is not executed
831 (so it does not need to be in the cache).
832
833 We to catch first case, we align frequently executed blocks.
834 To catch the second, we align blocks that are executed more frequently
835 than the predecessor and the predecessor is likely to not be executed
836 when function is called. */
837
838 if (!has_fallthru
839 && (branch_frequency > BB_FREQ_MAX / 10
| 956 rtx label = bb->head;
957 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
958 edge e;
959
960 if (GET_CODE (label) != CODE_LABEL)
961 continue;
962 max_log = LABEL_ALIGN (label);
963 max_skip = LABEL_ALIGN_MAX_SKIP;
964
965 for (e = bb->pred; e; e = e->pred_next)
966 {
967 if (e->flags & EDGE_FALLTHRU)
968 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
969 else
970 branch_frequency += EDGE_FREQUENCY (e);
971 }
972
973 /* There are two purposes to align block with no fallthru incoming edge:
974 1) to avoid fetch stalls when branch destination is near cache boundary
975 2) to improve cache efficiency in case the previous block is not executed
976 (so it does not need to be in the cache).
977
978 We to catch first case, we align frequently executed blocks.
979 To catch the second, we align blocks that are executed more frequently
980 than the predecessor and the predecessor is likely to not be executed
981 when function is called. */
982
983 if (!has_fallthru
984 && (branch_frequency > BB_FREQ_MAX / 10
|
840 || (bb->frequency > BASIC_BLOCK (i - 1)->frequency * 10
841 && (BASIC_BLOCK (i - 1)->frequency
| 985 || (bb->frequency > bb->prev_bb->frequency * 10
986 && (bb->prev_bb->frequency
|
842 <= ENTRY_BLOCK_PTR->frequency / 2))))
843 {
844 log = JUMP_ALIGN (label);
845 if (max_log < log)
846 {
847 max_log = log;
848 max_skip = JUMP_ALIGN_MAX_SKIP;
849 }
850 }
851 /* In case block is frequent and reached mostly by non-fallthru edge,
| 987 <= ENTRY_BLOCK_PTR->frequency / 2))))
988 {
989 log = JUMP_ALIGN (label);
990 if (max_log < log)
991 {
992 max_log = log;
993 max_skip = JUMP_ALIGN_MAX_SKIP;
994 }
995 }
996 /* In case block is frequent and reached mostly by non-fallthru edge,
|
852 align it. It is most likely an first block of loop. */
| 997 align it. It is most likely a first block of loop. */
|
853 if (has_fallthru
854 && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10
| 998 if (has_fallthru
999 && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10
|
855 && branch_frequency > fallthru_frequency * 5)
| 1000 && branch_frequency > fallthru_frequency * 2)
|
856 {
857 log = LOOP_ALIGN (label);
858 if (max_log < log)
859 {
860 max_log = log;
861 max_skip = LOOP_ALIGN_MAX_SKIP;
862 }
863 }
864 LABEL_TO_ALIGNMENT (label) = max_log;
865 LABEL_TO_MAX_SKIP (label) = max_skip;
866 }
867}
868
869/* Make a pass over all insns and compute their actual lengths by shortening
870 any branches of variable length if possible. */
871
872/* Give a default value for the lowest address in a function. */
873
874#ifndef FIRST_INSN_ADDRESS
875#define FIRST_INSN_ADDRESS 0
876#endif
877
878/* shorten_branches might be called multiple times: for example, the SH
879 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
880 In order to do this, it needs proper length information, which it obtains
881 by calling shorten_branches. This cannot be collapsed with
882 shorten_branches itself into a single pass unless we also want to integrate
883 reorg.c, since the branch splitting exposes new instructions with delay
884 slots. */
885
886void
887shorten_branches (first)
888 rtx first ATTRIBUTE_UNUSED;
889{
890 rtx insn;
891 int max_uid;
892 int i;
893 int max_log;
894 int max_skip;
895#ifdef HAVE_ATTR_length
896#define MAX_CODE_ALIGN 16
897 rtx seq;
898 int something_changed = 1;
899 char *varying_length;
900 rtx body;
901 int uid;
902 rtx align_tab[MAX_CODE_ALIGN];
903
904#endif
905
906 /* Compute maximum UID and allocate label_align / uid_shuid. */
907 max_uid = get_max_uid ();
908
909 uid_shuid = (int *) xmalloc (max_uid * sizeof *uid_shuid);
910
911 if (max_labelno != max_label_num ())
912 {
913 int old = max_labelno;
914 int n_labels;
915 int n_old_labels;
916
917 max_labelno = max_label_num ();
918
919 n_labels = max_labelno - min_labelno + 1;
920 n_old_labels = old - min_labelno + 1;
921
922 label_align = (struct label_alignment *) xrealloc
923 (label_align, n_labels * sizeof (struct label_alignment));
924
925 /* Range of labels grows monotonically in the function. Abort here
926 means that the initialization of array got lost. */
927 if (n_old_labels > n_labels)
928 abort ();
929
930 memset (label_align + n_old_labels, 0,
931 (n_labels - n_old_labels) * sizeof (struct label_alignment));
932 }
933
934 /* Initialize label_align and set up uid_shuid to be strictly
935 monotonically rising with insn order. */
936 /* We use max_log here to keep track of the maximum alignment we want to
937 impose on the next CODE_LABEL (or the current one if we are processing
938 the CODE_LABEL itself). */
939
940 max_log = 0;
941 max_skip = 0;
942
943 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
944 {
945 int log;
946
947 INSN_SHUID (insn) = i++;
948 if (INSN_P (insn))
949 {
950 /* reorg might make the first insn of a loop being run once only,
951 and delete the label in front of it. Then we want to apply
952 the loop alignment to the new label created by reorg, which
953 is separated by the former loop start insn from the
954 NOTE_INSN_LOOP_BEG. */
955 }
956 else if (GET_CODE (insn) == CODE_LABEL)
957 {
958 rtx next;
959
960 /* Merge in alignments computed by compute_alignments. */
961 log = LABEL_TO_ALIGNMENT (insn);
962 if (max_log < log)
963 {
964 max_log = log;
965 max_skip = LABEL_TO_MAX_SKIP (insn);
966 }
967
968 log = LABEL_ALIGN (insn);
969 if (max_log < log)
970 {
971 max_log = log;
972 max_skip = LABEL_ALIGN_MAX_SKIP;
973 }
974 next = NEXT_INSN (insn);
975 /* ADDR_VECs only take room if read-only data goes into the text
976 section. */
| 1001 {
1002 log = LOOP_ALIGN (label);
1003 if (max_log < log)
1004 {
1005 max_log = log;
1006 max_skip = LOOP_ALIGN_MAX_SKIP;
1007 }
1008 }
1009 LABEL_TO_ALIGNMENT (label) = max_log;
1010 LABEL_TO_MAX_SKIP (label) = max_skip;
1011 }
1012}
1013
1014/* Make a pass over all insns and compute their actual lengths by shortening
1015 any branches of variable length if possible. */
1016
1017/* Give a default value for the lowest address in a function. */
1018
1019#ifndef FIRST_INSN_ADDRESS
1020#define FIRST_INSN_ADDRESS 0
1021#endif
1022
1023/* shorten_branches might be called multiple times: for example, the SH
1024 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
1025 In order to do this, it needs proper length information, which it obtains
1026 by calling shorten_branches. This cannot be collapsed with
1027 shorten_branches itself into a single pass unless we also want to integrate
1028 reorg.c, since the branch splitting exposes new instructions with delay
1029 slots. */
1030
1031void
1032shorten_branches (first)
1033 rtx first ATTRIBUTE_UNUSED;
1034{
1035 rtx insn;
1036 int max_uid;
1037 int i;
1038 int max_log;
1039 int max_skip;
1040#ifdef HAVE_ATTR_length
1041#define MAX_CODE_ALIGN 16
1042 rtx seq;
1043 int something_changed = 1;
1044 char *varying_length;
1045 rtx body;
1046 int uid;
1047 rtx align_tab[MAX_CODE_ALIGN];
1048
1049#endif
1050
1051 /* Compute maximum UID and allocate label_align / uid_shuid. */
1052 max_uid = get_max_uid ();
1053
1054 uid_shuid = (int *) xmalloc (max_uid * sizeof *uid_shuid);
1055
1056 if (max_labelno != max_label_num ())
1057 {
1058 int old = max_labelno;
1059 int n_labels;
1060 int n_old_labels;
1061
1062 max_labelno = max_label_num ();
1063
1064 n_labels = max_labelno - min_labelno + 1;
1065 n_old_labels = old - min_labelno + 1;
1066
1067 label_align = (struct label_alignment *) xrealloc
1068 (label_align, n_labels * sizeof (struct label_alignment));
1069
1070 /* Range of labels grows monotonically in the function. Abort here
1071 means that the initialization of array got lost. */
1072 if (n_old_labels > n_labels)
1073 abort ();
1074
1075 memset (label_align + n_old_labels, 0,
1076 (n_labels - n_old_labels) * sizeof (struct label_alignment));
1077 }
1078
1079 /* Initialize label_align and set up uid_shuid to be strictly
1080 monotonically rising with insn order. */
1081 /* We use max_log here to keep track of the maximum alignment we want to
1082 impose on the next CODE_LABEL (or the current one if we are processing
1083 the CODE_LABEL itself). */
1084
1085 max_log = 0;
1086 max_skip = 0;
1087
1088 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
1089 {
1090 int log;
1091
1092 INSN_SHUID (insn) = i++;
1093 if (INSN_P (insn))
1094 {
1095 /* reorg might make the first insn of a loop being run once only,
1096 and delete the label in front of it. Then we want to apply
1097 the loop alignment to the new label created by reorg, which
1098 is separated by the former loop start insn from the
1099 NOTE_INSN_LOOP_BEG. */
1100 }
1101 else if (GET_CODE (insn) == CODE_LABEL)
1102 {
1103 rtx next;
1104
1105 /* Merge in alignments computed by compute_alignments. */
1106 log = LABEL_TO_ALIGNMENT (insn);
1107 if (max_log < log)
1108 {
1109 max_log = log;
1110 max_skip = LABEL_TO_MAX_SKIP (insn);
1111 }
1112
1113 log = LABEL_ALIGN (insn);
1114 if (max_log < log)
1115 {
1116 max_log = log;
1117 max_skip = LABEL_ALIGN_MAX_SKIP;
1118 }
1119 next = NEXT_INSN (insn);
1120 /* ADDR_VECs only take room if read-only data goes into the text
1121 section. */
|
977 if (JUMP_TABLES_IN_TEXT_SECTION
978#if !defined(READONLY_DATA_SECTION)
979 || 1
980#endif
981 )
| 1122 if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION)
|
982 if (next && GET_CODE (next) == JUMP_INSN)
983 {
984 rtx nextbody = PATTERN (next);
985 if (GET_CODE (nextbody) == ADDR_VEC
986 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
987 {
988 log = ADDR_VEC_ALIGN (next);
989 if (max_log < log)
990 {
991 max_log = log;
992 max_skip = LABEL_ALIGN_MAX_SKIP;
993 }
994 }
995 }
996 LABEL_TO_ALIGNMENT (insn) = max_log;
997 LABEL_TO_MAX_SKIP (insn) = max_skip;
998 max_log = 0;
999 max_skip = 0;
1000 }
1001 else if (GET_CODE (insn) == BARRIER)
1002 {
1003 rtx label;
1004
1005 for (label = insn; label && ! INSN_P (label);
1006 label = NEXT_INSN (label))
1007 if (GET_CODE (label) == CODE_LABEL)
1008 {
1009 log = LABEL_ALIGN_AFTER_BARRIER (insn);
1010 if (max_log < log)
1011 {
1012 max_log = log;
1013 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
1014 }
1015 break;
1016 }
1017 }
1018 }
1019#ifdef HAVE_ATTR_length
1020
1021 /* Allocate the rest of the arrays. */
1022 insn_lengths = (int *) xmalloc (max_uid * sizeof (*insn_lengths));
1023 insn_lengths_max_uid = max_uid;
1024 /* Syntax errors can lead to labels being outside of the main insn stream.
1025 Initialize insn_addresses, so that we get reproducible results. */
1026 INSN_ADDRESSES_ALLOC (max_uid);
1027
1028 varying_length = (char *) xcalloc (max_uid, sizeof (char));
1029
1030 /* Initialize uid_align. We scan instructions
1031 from end to start, and keep in align_tab[n] the last seen insn
1032 that does an alignment of at least n+1, i.e. the successor
1033 in the alignment chain for an insn that does / has a known
1034 alignment of n. */
1035 uid_align = (rtx *) xcalloc (max_uid, sizeof *uid_align);
1036
1037 for (i = MAX_CODE_ALIGN; --i >= 0;)
1038 align_tab[i] = NULL_RTX;
1039 seq = get_last_insn ();
1040 for (; seq; seq = PREV_INSN (seq))
1041 {
1042 int uid = INSN_UID (seq);
1043 int log;
1044 log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0);
1045 uid_align[uid] = align_tab[0];
1046 if (log)
1047 {
1048 /* Found an alignment label. */
1049 uid_align[uid] = align_tab[log];
1050 for (i = log - 1; i >= 0; i--)
1051 align_tab[i] = seq;
1052 }
1053 }
1054#ifdef CASE_VECTOR_SHORTEN_MODE
1055 if (optimize)
1056 {
1057 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1058 label fields. */
1059
1060 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1061 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1062 int rel;
1063
1064 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1065 {
1066 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1067 int len, i, min, max, insn_shuid;
1068 int min_align;
1069 addr_diff_vec_flags flags;
1070
1071 if (GET_CODE (insn) != JUMP_INSN
1072 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1073 continue;
1074 pat = PATTERN (insn);
1075 len = XVECLEN (pat, 1);
1076 if (len <= 0)
1077 abort ();
1078 min_align = MAX_CODE_ALIGN;
1079 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1080 {
1081 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1082 int shuid = INSN_SHUID (lab);
1083 if (shuid < min)
1084 {
1085 min = shuid;
1086 min_lab = lab;
1087 }
1088 if (shuid > max)
1089 {
1090 max = shuid;
1091 max_lab = lab;
1092 }
1093 if (min_align > LABEL_TO_ALIGNMENT (lab))
1094 min_align = LABEL_TO_ALIGNMENT (lab);
1095 }
1096 XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab);
1097 XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab);
1098 insn_shuid = INSN_SHUID (insn);
1099 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1100 flags.min_align = min_align;
1101 flags.base_after_vec = rel > insn_shuid;
1102 flags.min_after_vec = min > insn_shuid;
1103 flags.max_after_vec = max > insn_shuid;
1104 flags.min_after_base = min > rel;
1105 flags.max_after_base = max > rel;
1106 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1107 }
1108 }
1109#endif /* CASE_VECTOR_SHORTEN_MODE */
1110
1111 /* Compute initial lengths, addresses, and varying flags for each insn. */
1112 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1113 insn != 0;
1114 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1115 {
1116 uid = INSN_UID (insn);
1117
1118 insn_lengths[uid] = 0;
1119
1120 if (GET_CODE (insn) == CODE_LABEL)
1121 {
1122 int log = LABEL_TO_ALIGNMENT (insn);
1123 if (log)
1124 {
1125 int align = 1 << log;
1126 int new_address = (insn_current_address + align - 1) & -align;
1127 insn_lengths[uid] = new_address - insn_current_address;
1128 }
1129 }
1130
| 1123 if (next && GET_CODE (next) == JUMP_INSN)
1124 {
1125 rtx nextbody = PATTERN (next);
1126 if (GET_CODE (nextbody) == ADDR_VEC
1127 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1128 {
1129 log = ADDR_VEC_ALIGN (next);
1130 if (max_log < log)
1131 {
1132 max_log = log;
1133 max_skip = LABEL_ALIGN_MAX_SKIP;
1134 }
1135 }
1136 }
1137 LABEL_TO_ALIGNMENT (insn) = max_log;
1138 LABEL_TO_MAX_SKIP (insn) = max_skip;
1139 max_log = 0;
1140 max_skip = 0;
1141 }
1142 else if (GET_CODE (insn) == BARRIER)
1143 {
1144 rtx label;
1145
1146 for (label = insn; label && ! INSN_P (label);
1147 label = NEXT_INSN (label))
1148 if (GET_CODE (label) == CODE_LABEL)
1149 {
1150 log = LABEL_ALIGN_AFTER_BARRIER (insn);
1151 if (max_log < log)
1152 {
1153 max_log = log;
1154 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
1155 }
1156 break;
1157 }
1158 }
1159 }
1160#ifdef HAVE_ATTR_length
1161
1162 /* Allocate the rest of the arrays. */
1163 insn_lengths = (int *) xmalloc (max_uid * sizeof (*insn_lengths));
1164 insn_lengths_max_uid = max_uid;
1165 /* Syntax errors can lead to labels being outside of the main insn stream.
1166 Initialize insn_addresses, so that we get reproducible results. */
1167 INSN_ADDRESSES_ALLOC (max_uid);
1168
1169 varying_length = (char *) xcalloc (max_uid, sizeof (char));
1170
1171 /* Initialize uid_align. We scan instructions
1172 from end to start, and keep in align_tab[n] the last seen insn
1173 that does an alignment of at least n+1, i.e. the successor
1174 in the alignment chain for an insn that does / has a known
1175 alignment of n. */
1176 uid_align = (rtx *) xcalloc (max_uid, sizeof *uid_align);
1177
1178 for (i = MAX_CODE_ALIGN; --i >= 0;)
1179 align_tab[i] = NULL_RTX;
1180 seq = get_last_insn ();
1181 for (; seq; seq = PREV_INSN (seq))
1182 {
1183 int uid = INSN_UID (seq);
1184 int log;
1185 log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0);
1186 uid_align[uid] = align_tab[0];
1187 if (log)
1188 {
1189 /* Found an alignment label. */
1190 uid_align[uid] = align_tab[log];
1191 for (i = log - 1; i >= 0; i--)
1192 align_tab[i] = seq;
1193 }
1194 }
1195#ifdef CASE_VECTOR_SHORTEN_MODE
1196 if (optimize)
1197 {
1198 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1199 label fields. */
1200
1201 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1202 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1203 int rel;
1204
1205 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1206 {
1207 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1208 int len, i, min, max, insn_shuid;
1209 int min_align;
1210 addr_diff_vec_flags flags;
1211
1212 if (GET_CODE (insn) != JUMP_INSN
1213 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1214 continue;
1215 pat = PATTERN (insn);
1216 len = XVECLEN (pat, 1);
1217 if (len <= 0)
1218 abort ();
1219 min_align = MAX_CODE_ALIGN;
1220 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1221 {
1222 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1223 int shuid = INSN_SHUID (lab);
1224 if (shuid < min)
1225 {
1226 min = shuid;
1227 min_lab = lab;
1228 }
1229 if (shuid > max)
1230 {
1231 max = shuid;
1232 max_lab = lab;
1233 }
1234 if (min_align > LABEL_TO_ALIGNMENT (lab))
1235 min_align = LABEL_TO_ALIGNMENT (lab);
1236 }
1237 XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab);
1238 XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab);
1239 insn_shuid = INSN_SHUID (insn);
1240 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1241 flags.min_align = min_align;
1242 flags.base_after_vec = rel > insn_shuid;
1243 flags.min_after_vec = min > insn_shuid;
1244 flags.max_after_vec = max > insn_shuid;
1245 flags.min_after_base = min > rel;
1246 flags.max_after_base = max > rel;
1247 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1248 }
1249 }
1250#endif /* CASE_VECTOR_SHORTEN_MODE */
1251
1252 /* Compute initial lengths, addresses, and varying flags for each insn. */
1253 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1254 insn != 0;
1255 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1256 {
1257 uid = INSN_UID (insn);
1258
1259 insn_lengths[uid] = 0;
1260
1261 if (GET_CODE (insn) == CODE_LABEL)
1262 {
1263 int log = LABEL_TO_ALIGNMENT (insn);
1264 if (log)
1265 {
1266 int align = 1 << log;
1267 int new_address = (insn_current_address + align - 1) & -align;
1268 insn_lengths[uid] = new_address - insn_current_address;
1269 }
1270 }
1271
|
1131 INSN_ADDRESSES (uid) = insn_current_address;
| 1272 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
|
1132
1133 if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER
1134 || GET_CODE (insn) == CODE_LABEL)
1135 continue;
1136 if (INSN_DELETED_P (insn))
1137 continue;
1138
1139 body = PATTERN (insn);
1140 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1141 {
1142 /* This only takes room if read-only data goes into the text
1143 section. */
| 1273
1274 if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER
1275 || GET_CODE (insn) == CODE_LABEL)
1276 continue;
1277 if (INSN_DELETED_P (insn))
1278 continue;
1279
1280 body = PATTERN (insn);
1281 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1282 {
1283 /* This only takes room if read-only data goes into the text
1284 section. */
|
1144 if (JUMP_TABLES_IN_TEXT_SECTION
1145#if !defined(READONLY_DATA_SECTION)
1146 || 1
1147#endif
1148 )
| 1285 if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION)
|
1149 insn_lengths[uid] = (XVECLEN (body,
1150 GET_CODE (body) == ADDR_DIFF_VEC)
1151 * GET_MODE_SIZE (GET_MODE (body)));
1152 /* Alignment is handled by ADDR_VEC_ALIGN. */
1153 }
1154 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1155 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1156 else if (GET_CODE (body) == SEQUENCE)
1157 {
1158 int i;
1159 int const_delay_slots;
1160#ifdef DELAY_SLOTS
1161 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1162#else
1163 const_delay_slots = 0;
1164#endif
1165 /* Inside a delay slot sequence, we do not do any branch shortening
1166 if the shortening could change the number of delay slots
1167 of the branch. */
1168 for (i = 0; i < XVECLEN (body, 0); i++)
1169 {
1170 rtx inner_insn = XVECEXP (body, 0, i);
1171 int inner_uid = INSN_UID (inner_insn);
1172 int inner_length;
1173
1174 if (GET_CODE (body) == ASM_INPUT
1175 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1176 inner_length = (asm_insn_count (PATTERN (inner_insn))
1177 * insn_default_length (inner_insn));
1178 else
1179 inner_length = insn_default_length (inner_insn);
1180
1181 insn_lengths[inner_uid] = inner_length;
1182 if (const_delay_slots)
1183 {
1184 if ((varying_length[inner_uid]
1185 = insn_variable_length_p (inner_insn)) != 0)
1186 varying_length[uid] = 1;
1187 INSN_ADDRESSES (inner_uid) = (insn_current_address
1188 + insn_lengths[uid]);
1189 }
1190 else
1191 varying_length[inner_uid] = 0;
1192 insn_lengths[uid] += inner_length;
1193 }
1194 }
1195 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1196 {
1197 insn_lengths[uid] = insn_default_length (insn);
1198 varying_length[uid] = insn_variable_length_p (insn);
1199 }
1200
1201 /* If needed, do any adjustment. */
1202#ifdef ADJUST_INSN_LENGTH
1203 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1204 if (insn_lengths[uid] < 0)
1205 fatal_insn ("negative insn length", insn);
1206#endif
1207 }
1208
1209 /* Now loop over all the insns finding varying length insns. For each,
1210 get the current insn length. If it has changed, reflect the change.
1211 When nothing changes for a full pass, we are done. */
1212
1213 while (something_changed)
1214 {
1215 something_changed = 0;
1216 insn_current_align = MAX_CODE_ALIGN - 1;
1217 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1218 insn != 0;
1219 insn = NEXT_INSN (insn))
1220 {
1221 int new_length;
1222#ifdef ADJUST_INSN_LENGTH
1223 int tmp_length;
1224#endif
1225 int length_align;
1226
1227 uid = INSN_UID (insn);
1228
1229 if (GET_CODE (insn) == CODE_LABEL)
1230 {
1231 int log = LABEL_TO_ALIGNMENT (insn);
1232 if (log > insn_current_align)
1233 {
1234 int align = 1 << log;
1235 int new_address= (insn_current_address + align - 1) & -align;
1236 insn_lengths[uid] = new_address - insn_current_address;
1237 insn_current_align = log;
1238 insn_current_address = new_address;
1239 }
1240 else
1241 insn_lengths[uid] = 0;
1242 INSN_ADDRESSES (uid) = insn_current_address;
1243 continue;
1244 }
1245
1246 length_align = INSN_LENGTH_ALIGNMENT (insn);
1247 if (length_align < insn_current_align)
1248 insn_current_align = length_align;
1249
1250 insn_last_address = INSN_ADDRESSES (uid);
1251 INSN_ADDRESSES (uid) = insn_current_address;
1252
1253#ifdef CASE_VECTOR_SHORTEN_MODE
1254 if (optimize && GET_CODE (insn) == JUMP_INSN
1255 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1256 {
1257 rtx body = PATTERN (insn);
1258 int old_length = insn_lengths[uid];
1259 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1260 rtx min_lab = XEXP (XEXP (body, 2), 0);
1261 rtx max_lab = XEXP (XEXP (body, 3), 0);
1262 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1263 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1264 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1265 rtx prev;
1266 int rel_align = 0;
1267 addr_diff_vec_flags flags;
1268
1269 /* Avoid automatic aggregate initialization. */
1270 flags = ADDR_DIFF_VEC_FLAGS (body);
1271
1272 /* Try to find a known alignment for rel_lab. */
1273 for (prev = rel_lab;
1274 prev
1275 && ! insn_lengths[INSN_UID (prev)]
1276 && ! (varying_length[INSN_UID (prev)] & 1);
1277 prev = PREV_INSN (prev))
1278 if (varying_length[INSN_UID (prev)] & 2)
1279 {
1280 rel_align = LABEL_TO_ALIGNMENT (prev);
1281 break;
1282 }
1283
1284 /* See the comment on addr_diff_vec_flags in rtl.h for the
1285 meaning of the flags values. base: REL_LAB vec: INSN */
1286 /* Anything after INSN has still addresses from the last
1287 pass; adjust these so that they reflect our current
1288 estimate for this pass. */
1289 if (flags.base_after_vec)
1290 rel_addr += insn_current_address - insn_last_address;
1291 if (flags.min_after_vec)
1292 min_addr += insn_current_address - insn_last_address;
1293 if (flags.max_after_vec)
1294 max_addr += insn_current_address - insn_last_address;
1295 /* We want to know the worst case, i.e. lowest possible value
1296 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1297 its offset is positive, and we have to be wary of code shrink;
1298 otherwise, it is negative, and we have to be vary of code
1299 size increase. */
1300 if (flags.min_after_base)
1301 {
1302 /* If INSN is between REL_LAB and MIN_LAB, the size
1303 changes we are about to make can change the alignment
1304 within the observed offset, therefore we have to break
1305 it up into two parts that are independent. */
1306 if (! flags.base_after_vec && flags.min_after_vec)
1307 {
1308 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1309 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1310 }
1311 else
1312 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1313 }
1314 else
1315 {
1316 if (flags.base_after_vec && ! flags.min_after_vec)
1317 {
1318 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1319 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1320 }
1321 else
1322 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1323 }
1324 /* Likewise, determine the highest lowest possible value
1325 for the offset of MAX_LAB. */
1326 if (flags.max_after_base)
1327 {
1328 if (! flags.base_after_vec && flags.max_after_vec)
1329 {
1330 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1331 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1332 }
1333 else
1334 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1335 }
1336 else
1337 {
1338 if (flags.base_after_vec && ! flags.max_after_vec)
1339 {
1340 max_addr += align_fuzz (max_lab, insn, 0, 0);
1341 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1342 }
1343 else
1344 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1345 }
1346 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1347 max_addr - rel_addr,
1348 body));
| 1286 insn_lengths[uid] = (XVECLEN (body,
1287 GET_CODE (body) == ADDR_DIFF_VEC)
1288 * GET_MODE_SIZE (GET_MODE (body)));
1289 /* Alignment is handled by ADDR_VEC_ALIGN. */
1290 }
1291 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1292 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1293 else if (GET_CODE (body) == SEQUENCE)
1294 {
1295 int i;
1296 int const_delay_slots;
1297#ifdef DELAY_SLOTS
1298 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1299#else
1300 const_delay_slots = 0;
1301#endif
1302 /* Inside a delay slot sequence, we do not do any branch shortening
1303 if the shortening could change the number of delay slots
1304 of the branch. */
1305 for (i = 0; i < XVECLEN (body, 0); i++)
1306 {
1307 rtx inner_insn = XVECEXP (body, 0, i);
1308 int inner_uid = INSN_UID (inner_insn);
1309 int inner_length;
1310
1311 if (GET_CODE (body) == ASM_INPUT
1312 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1313 inner_length = (asm_insn_count (PATTERN (inner_insn))
1314 * insn_default_length (inner_insn));
1315 else
1316 inner_length = insn_default_length (inner_insn);
1317
1318 insn_lengths[inner_uid] = inner_length;
1319 if (const_delay_slots)
1320 {
1321 if ((varying_length[inner_uid]
1322 = insn_variable_length_p (inner_insn)) != 0)
1323 varying_length[uid] = 1;
1324 INSN_ADDRESSES (inner_uid) = (insn_current_address
1325 + insn_lengths[uid]);
1326 }
1327 else
1328 varying_length[inner_uid] = 0;
1329 insn_lengths[uid] += inner_length;
1330 }
1331 }
1332 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1333 {
1334 insn_lengths[uid] = insn_default_length (insn);
1335 varying_length[uid] = insn_variable_length_p (insn);
1336 }
1337
1338 /* If needed, do any adjustment. */
1339#ifdef ADJUST_INSN_LENGTH
1340 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1341 if (insn_lengths[uid] < 0)
1342 fatal_insn ("negative insn length", insn);
1343#endif
1344 }
1345
1346 /* Now loop over all the insns finding varying length insns. For each,
1347 get the current insn length. If it has changed, reflect the change.
1348 When nothing changes for a full pass, we are done. */
1349
1350 while (something_changed)
1351 {
1352 something_changed = 0;
1353 insn_current_align = MAX_CODE_ALIGN - 1;
1354 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1355 insn != 0;
1356 insn = NEXT_INSN (insn))
1357 {
1358 int new_length;
1359#ifdef ADJUST_INSN_LENGTH
1360 int tmp_length;
1361#endif
1362 int length_align;
1363
1364 uid = INSN_UID (insn);
1365
1366 if (GET_CODE (insn) == CODE_LABEL)
1367 {
1368 int log = LABEL_TO_ALIGNMENT (insn);
1369 if (log > insn_current_align)
1370 {
1371 int align = 1 << log;
1372 int new_address= (insn_current_address + align - 1) & -align;
1373 insn_lengths[uid] = new_address - insn_current_address;
1374 insn_current_align = log;
1375 insn_current_address = new_address;
1376 }
1377 else
1378 insn_lengths[uid] = 0;
1379 INSN_ADDRESSES (uid) = insn_current_address;
1380 continue;
1381 }
1382
1383 length_align = INSN_LENGTH_ALIGNMENT (insn);
1384 if (length_align < insn_current_align)
1385 insn_current_align = length_align;
1386
1387 insn_last_address = INSN_ADDRESSES (uid);
1388 INSN_ADDRESSES (uid) = insn_current_address;
1389
1390#ifdef CASE_VECTOR_SHORTEN_MODE
1391 if (optimize && GET_CODE (insn) == JUMP_INSN
1392 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1393 {
1394 rtx body = PATTERN (insn);
1395 int old_length = insn_lengths[uid];
1396 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1397 rtx min_lab = XEXP (XEXP (body, 2), 0);
1398 rtx max_lab = XEXP (XEXP (body, 3), 0);
1399 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1400 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1401 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1402 rtx prev;
1403 int rel_align = 0;
1404 addr_diff_vec_flags flags;
1405
1406 /* Avoid automatic aggregate initialization. */
1407 flags = ADDR_DIFF_VEC_FLAGS (body);
1408
1409 /* Try to find a known alignment for rel_lab. */
1410 for (prev = rel_lab;
1411 prev
1412 && ! insn_lengths[INSN_UID (prev)]
1413 && ! (varying_length[INSN_UID (prev)] & 1);
1414 prev = PREV_INSN (prev))
1415 if (varying_length[INSN_UID (prev)] & 2)
1416 {
1417 rel_align = LABEL_TO_ALIGNMENT (prev);
1418 break;
1419 }
1420
1421 /* See the comment on addr_diff_vec_flags in rtl.h for the
1422 meaning of the flags values. base: REL_LAB vec: INSN */
1423 /* Anything after INSN has still addresses from the last
1424 pass; adjust these so that they reflect our current
1425 estimate for this pass. */
1426 if (flags.base_after_vec)
1427 rel_addr += insn_current_address - insn_last_address;
1428 if (flags.min_after_vec)
1429 min_addr += insn_current_address - insn_last_address;
1430 if (flags.max_after_vec)
1431 max_addr += insn_current_address - insn_last_address;
1432 /* We want to know the worst case, i.e. lowest possible value
1433 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1434 its offset is positive, and we have to be wary of code shrink;
1435 otherwise, it is negative, and we have to be vary of code
1436 size increase. */
1437 if (flags.min_after_base)
1438 {
1439 /* If INSN is between REL_LAB and MIN_LAB, the size
1440 changes we are about to make can change the alignment
1441 within the observed offset, therefore we have to break
1442 it up into two parts that are independent. */
1443 if (! flags.base_after_vec && flags.min_after_vec)
1444 {
1445 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1446 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1447 }
1448 else
1449 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1450 }
1451 else
1452 {
1453 if (flags.base_after_vec && ! flags.min_after_vec)
1454 {
1455 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1456 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1457 }
1458 else
1459 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1460 }
1461 /* Likewise, determine the highest lowest possible value
1462 for the offset of MAX_LAB. */
1463 if (flags.max_after_base)
1464 {
1465 if (! flags.base_after_vec && flags.max_after_vec)
1466 {
1467 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1468 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1469 }
1470 else
1471 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1472 }
1473 else
1474 {
1475 if (flags.base_after_vec && ! flags.max_after_vec)
1476 {
1477 max_addr += align_fuzz (max_lab, insn, 0, 0);
1478 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1479 }
1480 else
1481 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1482 }
1483 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1484 max_addr - rel_addr,
1485 body));
|
1349 if (JUMP_TABLES_IN_TEXT_SECTION
1350#if !defined(READONLY_DATA_SECTION)
1351 || 1
1352#endif
1353 )
| 1486 if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION)
|
1354 {
1355 insn_lengths[uid]
1356 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1357 insn_current_address += insn_lengths[uid];
1358 if (insn_lengths[uid] != old_length)
1359 something_changed = 1;
1360 }
1361
1362 continue;
1363 }
1364#endif /* CASE_VECTOR_SHORTEN_MODE */
1365
1366 if (! (varying_length[uid]))
1367 {
1368 if (GET_CODE (insn) == INSN
1369 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1370 {
1371 int i;
1372
1373 body = PATTERN (insn);
1374 for (i = 0; i < XVECLEN (body, 0); i++)
1375 {
1376 rtx inner_insn = XVECEXP (body, 0, i);
1377 int inner_uid = INSN_UID (inner_insn);
1378
1379 INSN_ADDRESSES (inner_uid) = insn_current_address;
1380
1381 insn_current_address += insn_lengths[inner_uid];
1382 }
| 1487 {
1488 insn_lengths[uid]
1489 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1490 insn_current_address += insn_lengths[uid];
1491 if (insn_lengths[uid] != old_length)
1492 something_changed = 1;
1493 }
1494
1495 continue;
1496 }
1497#endif /* CASE_VECTOR_SHORTEN_MODE */
1498
1499 if (! (varying_length[uid]))
1500 {
1501 if (GET_CODE (insn) == INSN
1502 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1503 {
1504 int i;
1505
1506 body = PATTERN (insn);
1507 for (i = 0; i < XVECLEN (body, 0); i++)
1508 {
1509 rtx inner_insn = XVECEXP (body, 0, i);
1510 int inner_uid = INSN_UID (inner_insn);
1511
1512 INSN_ADDRESSES (inner_uid) = insn_current_address;
1513
1514 insn_current_address += insn_lengths[inner_uid];
1515 }
|
1383 }
| 1516 }
|
1384 else
1385 insn_current_address += insn_lengths[uid];
1386
1387 continue;
1388 }
1389
1390 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1391 {
1392 int i;
1393
1394 body = PATTERN (insn);
1395 new_length = 0;
1396 for (i = 0; i < XVECLEN (body, 0); i++)
1397 {
1398 rtx inner_insn = XVECEXP (body, 0, i);
1399 int inner_uid = INSN_UID (inner_insn);
1400 int inner_length;
1401
1402 INSN_ADDRESSES (inner_uid) = insn_current_address;
1403
1404 /* insn_current_length returns 0 for insns with a
1405 non-varying length. */
1406 if (! varying_length[inner_uid])
1407 inner_length = insn_lengths[inner_uid];
1408 else
1409 inner_length = insn_current_length (inner_insn);
1410
1411 if (inner_length != insn_lengths[inner_uid])
1412 {
1413 insn_lengths[inner_uid] = inner_length;
1414 something_changed = 1;
1415 }
1416 insn_current_address += insn_lengths[inner_uid];
1417 new_length += inner_length;
1418 }
1419 }
1420 else
1421 {
1422 new_length = insn_current_length (insn);
1423 insn_current_address += new_length;
1424 }
1425
1426#ifdef ADJUST_INSN_LENGTH
1427 /* If needed, do any adjustment. */
1428 tmp_length = new_length;
1429 ADJUST_INSN_LENGTH (insn, new_length);
1430 insn_current_address += (new_length - tmp_length);
1431#endif
1432
1433 if (new_length != insn_lengths[uid])
1434 {
1435 insn_lengths[uid] = new_length;
1436 something_changed = 1;
1437 }
1438 }
1439 /* For a non-optimizing compile, do only a single pass. */
1440 if (!optimize)
1441 break;
1442 }
1443
1444 free (varying_length);
1445
1446#endif /* HAVE_ATTR_length */
1447}
1448
1449#ifdef HAVE_ATTR_length
1450/* Given the body of an INSN known to be generated by an ASM statement, return
1451 the number of machine instructions likely to be generated for this insn.
1452 This is used to compute its length. */
1453
1454static int
1455asm_insn_count (body)
1456 rtx body;
1457{
1458 const char *template;
1459 int count = 1;
1460
1461 if (GET_CODE (body) == ASM_INPUT)
1462 template = XSTR (body, 0);
1463 else
1464 template = decode_asm_operands (body, NULL, NULL, NULL, NULL);
1465
1466 for (; *template; template++)
1467 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1468 count++;
1469
1470 return count;
1471}
1472#endif
1473
1474/* Output assembler code for the start of a function,
1475 and initialize some of the variables in this file
1476 for the new function. The label for the function and associated
1477 assembler pseudo-ops have already been output in `assemble_start_function'.
1478
1479 FIRST is the first insn of the rtl for the function being compiled.
1480 FILE is the file to write assembler code to.
1481 OPTIMIZE is nonzero if we should eliminate redundant
1482 test and compare insns. */
1483
1484void
1485final_start_function (first, file, optimize)
1486 rtx first;
1487 FILE *file;
1488 int optimize ATTRIBUTE_UNUSED;
1489{
1490 block_depth = 0;
1491
1492 this_is_asm_operands = 0;
1493
1494#ifdef NON_SAVING_SETJMP
1495 /* A function that calls setjmp should save and restore all the
1496 call-saved registers on a system where longjmp clobbers them. */
1497 if (NON_SAVING_SETJMP && current_function_calls_setjmp)
1498 {
1499 int i;
1500
1501 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1502 if (!call_used_regs[i])
1503 regs_ever_live[i] = 1;
1504 }
1505#endif
1506
1507 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
1508 notice_source_line (first);
1509 high_block_linenum = high_function_linenum = last_linenum;
1510
1511 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1512
1513#if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1514 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1515 dwarf2out_begin_prologue (0, NULL);
1516#endif
1517
1518#ifdef LEAF_REG_REMAP
1519 if (current_function_uses_only_leaf_regs)
1520 leaf_renumber_regs (first);
1521#endif
1522
1523 /* The Sun386i and perhaps other machines don't work right
1524 if the profiling code comes after the prologue. */
1525#ifdef PROFILE_BEFORE_PROLOGUE
1526 if (current_function_profile)
1527 profile_function (file);
1528#endif /* PROFILE_BEFORE_PROLOGUE */
1529
1530#if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1531 if (dwarf2out_do_frame ())
1532 dwarf2out_frame_debug (NULL_RTX);
1533#endif
1534
1535 /* If debugging, assign block numbers to all of the blocks in this
1536 function. */
1537 if (write_symbols)
1538 {
1539 remove_unnecessary_notes ();
| 1517 else
1518 insn_current_address += insn_lengths[uid];
1519
1520 continue;
1521 }
1522
1523 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1524 {
1525 int i;
1526
1527 body = PATTERN (insn);
1528 new_length = 0;
1529 for (i = 0; i < XVECLEN (body, 0); i++)
1530 {
1531 rtx inner_insn = XVECEXP (body, 0, i);
1532 int inner_uid = INSN_UID (inner_insn);
1533 int inner_length;
1534
1535 INSN_ADDRESSES (inner_uid) = insn_current_address;
1536
1537 /* insn_current_length returns 0 for insns with a
1538 non-varying length. */
1539 if (! varying_length[inner_uid])
1540 inner_length = insn_lengths[inner_uid];
1541 else
1542 inner_length = insn_current_length (inner_insn);
1543
1544 if (inner_length != insn_lengths[inner_uid])
1545 {
1546 insn_lengths[inner_uid] = inner_length;
1547 something_changed = 1;
1548 }
1549 insn_current_address += insn_lengths[inner_uid];
1550 new_length += inner_length;
1551 }
1552 }
1553 else
1554 {
1555 new_length = insn_current_length (insn);
1556 insn_current_address += new_length;
1557 }
1558
1559#ifdef ADJUST_INSN_LENGTH
1560 /* If needed, do any adjustment. */
1561 tmp_length = new_length;
1562 ADJUST_INSN_LENGTH (insn, new_length);
1563 insn_current_address += (new_length - tmp_length);
1564#endif
1565
1566 if (new_length != insn_lengths[uid])
1567 {
1568 insn_lengths[uid] = new_length;
1569 something_changed = 1;
1570 }
1571 }
1572 /* For a non-optimizing compile, do only a single pass. */
1573 if (!optimize)
1574 break;
1575 }
1576
1577 free (varying_length);
1578
1579#endif /* HAVE_ATTR_length */
1580}
1581
1582#ifdef HAVE_ATTR_length
1583/* Given the body of an INSN known to be generated by an ASM statement, return
1584 the number of machine instructions likely to be generated for this insn.
1585 This is used to compute its length. */
1586
1587static int
1588asm_insn_count (body)
1589 rtx body;
1590{
1591 const char *template;
1592 int count = 1;
1593
1594 if (GET_CODE (body) == ASM_INPUT)
1595 template = XSTR (body, 0);
1596 else
1597 template = decode_asm_operands (body, NULL, NULL, NULL, NULL);
1598
1599 for (; *template; template++)
1600 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1601 count++;
1602
1603 return count;
1604}
1605#endif
1606
1607/* Output assembler code for the start of a function,
1608 and initialize some of the variables in this file
1609 for the new function. The label for the function and associated
1610 assembler pseudo-ops have already been output in `assemble_start_function'.
1611
1612 FIRST is the first insn of the rtl for the function being compiled.
1613 FILE is the file to write assembler code to.
1614 OPTIMIZE is nonzero if we should eliminate redundant
1615 test and compare insns. */
1616
1617void
1618final_start_function (first, file, optimize)
1619 rtx first;
1620 FILE *file;
1621 int optimize ATTRIBUTE_UNUSED;
1622{
1623 block_depth = 0;
1624
1625 this_is_asm_operands = 0;
1626
1627#ifdef NON_SAVING_SETJMP
1628 /* A function that calls setjmp should save and restore all the
1629 call-saved registers on a system where longjmp clobbers them. */
1630 if (NON_SAVING_SETJMP && current_function_calls_setjmp)
1631 {
1632 int i;
1633
1634 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1635 if (!call_used_regs[i])
1636 regs_ever_live[i] = 1;
1637 }
1638#endif
1639
1640 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
1641 notice_source_line (first);
1642 high_block_linenum = high_function_linenum = last_linenum;
1643
1644 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1645
1646#if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1647 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1648 dwarf2out_begin_prologue (0, NULL);
1649#endif
1650
1651#ifdef LEAF_REG_REMAP
1652 if (current_function_uses_only_leaf_regs)
1653 leaf_renumber_regs (first);
1654#endif
1655
1656 /* The Sun386i and perhaps other machines don't work right
1657 if the profiling code comes after the prologue. */
1658#ifdef PROFILE_BEFORE_PROLOGUE
1659 if (current_function_profile)
1660 profile_function (file);
1661#endif /* PROFILE_BEFORE_PROLOGUE */
1662
1663#if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1664 if (dwarf2out_do_frame ())
1665 dwarf2out_frame_debug (NULL_RTX);
1666#endif
1667
1668 /* If debugging, assign block numbers to all of the blocks in this
1669 function. */
1670 if (write_symbols)
1671 {
1672 remove_unnecessary_notes ();
|
1540 reorder_blocks ();
| 1673 scope_to_insns_finalize ();
|
1541 number_blocks (current_function_decl);
1542 /* We never actually put out begin/end notes for the top-level
1543 block in the function. But, conceptually, that block is
1544 always needed. */
1545 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1546 }
1547
1548 /* First output the function prologue: code to set up the stack frame. */
1549 (*targetm.asm_out.function_prologue) (file, get_frame_size ());
1550
| 1674 number_blocks (current_function_decl);
1675 /* We never actually put out begin/end notes for the top-level
1676 block in the function. But, conceptually, that block is
1677 always needed. */
1678 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1679 }
1680
1681 /* First output the function prologue: code to set up the stack frame. */
1682 (*targetm.asm_out.function_prologue) (file, get_frame_size ());
1683
|
1551#ifdef VMS_DEBUGGING_INFO
1552 /* Output label after the prologue of the function. */
1553 if (write_symbols == VMS_DEBUG || write_symbols == VMS_AND_DWARF2_DEBUG)
1554 vmsdbgout_after_prologue ();
1555#endif
1556
| |
1557 /* If the machine represents the prologue as RTL, the profiling code must
1558 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1559#ifdef HAVE_prologue
1560 if (! HAVE_prologue)
1561#endif
1562 profile_after_prologue (file);
1563}
1564
1565static void
1566profile_after_prologue (file)
1567 FILE *file ATTRIBUTE_UNUSED;
1568{
1569#ifndef PROFILE_BEFORE_PROLOGUE
1570 if (current_function_profile)
1571 profile_function (file);
1572#endif /* not PROFILE_BEFORE_PROLOGUE */
1573}
1574
1575static void
1576profile_function (file)
1577 FILE *file ATTRIBUTE_UNUSED;
1578{
1579#ifndef NO_PROFILE_COUNTERS
1580 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1581#endif
1582#if defined(ASM_OUTPUT_REG_PUSH)
1583#if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1584 int sval = current_function_returns_struct;
1585#endif
1586#if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1587 int cxt = current_function_needs_context;
1588#endif
1589#endif /* ASM_OUTPUT_REG_PUSH */
1590
1591#ifndef NO_PROFILE_COUNTERS
1592 data_section ();
1593 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
| 1684 /* If the machine represents the prologue as RTL, the profiling code must
1685 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1686#ifdef HAVE_prologue
1687 if (! HAVE_prologue)
1688#endif
1689 profile_after_prologue (file);
1690}
1691
1692static void
1693profile_after_prologue (file)
1694 FILE *file ATTRIBUTE_UNUSED;
1695{
1696#ifndef PROFILE_BEFORE_PROLOGUE
1697 if (current_function_profile)
1698 profile_function (file);
1699#endif /* not PROFILE_BEFORE_PROLOGUE */
1700}
1701
1702static void
1703profile_function (file)
1704 FILE *file ATTRIBUTE_UNUSED;
1705{
1706#ifndef NO_PROFILE_COUNTERS
1707 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1708#endif
1709#if defined(ASM_OUTPUT_REG_PUSH)
1710#if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1711 int sval = current_function_returns_struct;
1712#endif
1713#if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1714 int cxt = current_function_needs_context;
1715#endif
1716#endif /* ASM_OUTPUT_REG_PUSH */
1717
1718#ifndef NO_PROFILE_COUNTERS
1719 data_section ();
1720 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
|
1594 ASM_OUTPUT_INTERNAL_LABEL (file, "LP", current_function_profile_label_no);
| 1721 ASM_OUTPUT_INTERNAL_LABEL (file, "LP", current_function_funcdef_no);
|
1595 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1596#endif
1597
1598 function_section (current_function_decl);
1599
1600#if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1601 if (sval)
1602 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM);
1603#else
1604#if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1605 if (sval)
1606 {
1607 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM);
1608 }
1609#endif
1610#endif
1611
1612#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1613 if (cxt)
1614 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1615#else
1616#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1617 if (cxt)
1618 {
1619 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1620 }
1621#endif
1622#endif
1623
| 1722 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1723#endif
1724
1725 function_section (current_function_decl);
1726
1727#if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1728 if (sval)
1729 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM);
1730#else
1731#if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1732 if (sval)
1733 {
1734 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM);
1735 }
1736#endif
1737#endif
1738
1739#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1740 if (cxt)
1741 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1742#else
1743#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1744 if (cxt)
1745 {
1746 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1747 }
1748#endif
1749#endif
1750
|
1624 FUNCTION_PROFILER (file, current_function_profile_label_no);
| 1751 FUNCTION_PROFILER (file, current_function_funcdef_no);
|
1625
1626#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1627 if (cxt)
1628 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1629#else
1630#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1631 if (cxt)
1632 {
1633 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1634 }
1635#endif
1636#endif
1637
1638#if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1639 if (sval)
1640 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM);
1641#else
1642#if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1643 if (sval)
1644 {
1645 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM);
1646 }
1647#endif
1648#endif
1649}
1650
1651/* Output assembler code for the end of a function.
1652 For clarity, args are same as those of `final_start_function'
1653 even though not all of them are needed. */
1654
1655void
1656final_end_function ()
1657{
1658 app_disable ();
1659
1660 (*debug_hooks->end_function) (high_function_linenum);
1661
1662 /* Finally, output the function epilogue:
1663 code to restore the stack frame and return to the caller. */
1664 (*targetm.asm_out.function_epilogue) (asm_out_file, get_frame_size ());
1665
1666 /* And debug output. */
| 1752
1753#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1754 if (cxt)
1755 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1756#else
1757#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1758 if (cxt)
1759 {
1760 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1761 }
1762#endif
1763#endif
1764
1765#if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1766 if (sval)
1767 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM);
1768#else
1769#if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1770 if (sval)
1771 {
1772 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM);
1773 }
1774#endif
1775#endif
1776}
1777
1778/* Output assembler code for the end of a function.
1779 For clarity, args are same as those of `final_start_function'
1780 even though not all of them are needed. */
1781
1782void
1783final_end_function ()
1784{
1785 app_disable ();
1786
1787 (*debug_hooks->end_function) (high_function_linenum);
1788
1789 /* Finally, output the function epilogue:
1790 code to restore the stack frame and return to the caller. */
1791 (*targetm.asm_out.function_epilogue) (asm_out_file, get_frame_size ());
1792
1793 /* And debug output. */
|
1667 (*debug_hooks->end_epilogue) ();
| 1794 (*debug_hooks->end_epilogue) (last_linenum, last_filename);
|
1668
1669#if defined (DWARF2_UNWIND_INFO)
1670 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG
1671 && dwarf2out_do_frame ())
| 1795
1796#if defined (DWARF2_UNWIND_INFO)
1797 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG
1798 && dwarf2out_do_frame ())
|
1672 dwarf2out_end_epilogue ();
| 1799 dwarf2out_end_epilogue (last_linenum, last_filename);
|
1673#endif
1674}
1675
1676/* Output assembler code for some insns: all or part of a function.
1677 For description of args, see `final_start_function', above.
1678
1679 PRESCAN is 1 if we are not really outputting,
1680 just scanning as if we were outputting.
1681 Prescanning deletes and rearranges insns just like ordinary output.
1682 PRESCAN is -2 if we are outputting after having prescanned.
1683 In this case, don't try to delete or rearrange insns
1684 because that has already been done.
1685 Prescanning is done only on certain machines. */
1686
1687void
1688final (first, file, optimize, prescan)
1689 rtx first;
1690 FILE *file;
1691 int optimize;
1692 int prescan;
1693{
1694 rtx insn;
1695 int max_line = 0;
1696 int max_uid = 0;
1697
1698 last_ignored_compare = 0;
1699 new_block = 1;
1700
1701 /* Make a map indicating which line numbers appear in this function.
1702 When producing SDB debugging info, delete troublesome line number
1703 notes from inlined functions in other files as well as duplicate
1704 line number notes. */
1705#ifdef SDB_DEBUGGING_INFO
1706 if (write_symbols == SDB_DEBUG)
1707 {
1708 rtx last = 0;
1709 for (insn = first; insn; insn = NEXT_INSN (insn))
1710 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1711 {
1712 if ((RTX_INTEGRATED_P (insn)
1713 && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0)
1714 || (last != 0
1715 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1716 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)))
1717 {
1718 delete_insn (insn); /* Use delete_note. */
1719 continue;
1720 }
1721 last = insn;
1722 if (NOTE_LINE_NUMBER (insn) > max_line)
1723 max_line = NOTE_LINE_NUMBER (insn);
1724 }
1725 }
1726 else
1727#endif
1728 {
1729 for (insn = first; insn; insn = NEXT_INSN (insn))
1730 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line)
1731 max_line = NOTE_LINE_NUMBER (insn);
1732 }
1733
1734 line_note_exists = (char *) xcalloc (max_line + 1, sizeof (char));
1735
1736 for (insn = first; insn; insn = NEXT_INSN (insn))
1737 {
1738 if (INSN_UID (insn) > max_uid) /* find largest UID */
1739 max_uid = INSN_UID (insn);
1740 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1741 line_note_exists[NOTE_LINE_NUMBER (insn)] = 1;
1742#ifdef HAVE_cc0
1743 /* If CC tracking across branches is enabled, record the insn which
1744 jumps to each branch only reached from one place. */
1745 if (optimize && GET_CODE (insn) == JUMP_INSN)
1746 {
1747 rtx lab = JUMP_LABEL (insn);
1748 if (lab && LABEL_NUSES (lab) == 1)
1749 {
1750 LABEL_REFS (lab) = insn;
1751 }
1752 }
1753#endif
1754 }
1755
1756 init_recog ();
1757
1758 CC_STATUS_INIT;
1759
1760 /* Output the insns. */
1761 for (insn = NEXT_INSN (first); insn;)
1762 {
1763#ifdef HAVE_ATTR_length
1764 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1765 {
| 1800#endif
1801}
1802
1803/* Output assembler code for some insns: all or part of a function.
1804 For description of args, see `final_start_function', above.
1805
1806 PRESCAN is 1 if we are not really outputting,
1807 just scanning as if we were outputting.
1808 Prescanning deletes and rearranges insns just like ordinary output.
1809 PRESCAN is -2 if we are outputting after having prescanned.
1810 In this case, don't try to delete or rearrange insns
1811 because that has already been done.
1812 Prescanning is done only on certain machines. */
1813
1814void
1815final (first, file, optimize, prescan)
1816 rtx first;
1817 FILE *file;
1818 int optimize;
1819 int prescan;
1820{
1821 rtx insn;
1822 int max_line = 0;
1823 int max_uid = 0;
1824
1825 last_ignored_compare = 0;
1826 new_block = 1;
1827
1828 /* Make a map indicating which line numbers appear in this function.
1829 When producing SDB debugging info, delete troublesome line number
1830 notes from inlined functions in other files as well as duplicate
1831 line number notes. */
1832#ifdef SDB_DEBUGGING_INFO
1833 if (write_symbols == SDB_DEBUG)
1834 {
1835 rtx last = 0;
1836 for (insn = first; insn; insn = NEXT_INSN (insn))
1837 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1838 {
1839 if ((RTX_INTEGRATED_P (insn)
1840 && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0)
1841 || (last != 0
1842 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1843 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)))
1844 {
1845 delete_insn (insn); /* Use delete_note. */
1846 continue;
1847 }
1848 last = insn;
1849 if (NOTE_LINE_NUMBER (insn) > max_line)
1850 max_line = NOTE_LINE_NUMBER (insn);
1851 }
1852 }
1853 else
1854#endif
1855 {
1856 for (insn = first; insn; insn = NEXT_INSN (insn))
1857 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line)
1858 max_line = NOTE_LINE_NUMBER (insn);
1859 }
1860
1861 line_note_exists = (char *) xcalloc (max_line + 1, sizeof (char));
1862
1863 for (insn = first; insn; insn = NEXT_INSN (insn))
1864 {
1865 if (INSN_UID (insn) > max_uid) /* find largest UID */
1866 max_uid = INSN_UID (insn);
1867 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1868 line_note_exists[NOTE_LINE_NUMBER (insn)] = 1;
1869#ifdef HAVE_cc0
1870 /* If CC tracking across branches is enabled, record the insn which
1871 jumps to each branch only reached from one place. */
1872 if (optimize && GET_CODE (insn) == JUMP_INSN)
1873 {
1874 rtx lab = JUMP_LABEL (insn);
1875 if (lab && LABEL_NUSES (lab) == 1)
1876 {
1877 LABEL_REFS (lab) = insn;
1878 }
1879 }
1880#endif
1881 }
1882
1883 init_recog ();
1884
1885 CC_STATUS_INIT;
1886
1887 /* Output the insns. */
1888 for (insn = NEXT_INSN (first); insn;)
1889 {
1890#ifdef HAVE_ATTR_length
1891 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1892 {
|
1766#ifdef STACK_REGS
1767 /* Irritatingly, the reg-stack pass is creating new instructions
1768 and because of REG_DEAD note abuse it has to run after
1769 shorten_branches. Fake address of -1 then. */
1770 insn_current_address = -1;
1771#else
| |
1772 /* This can be triggered by bugs elsewhere in the compiler if
1773 new insns are created after init_insn_lengths is called. */
| 1893 /* This can be triggered by bugs elsewhere in the compiler if
1894 new insns are created after init_insn_lengths is called. */
|
1774 abort ();
1775#endif
| 1895 if (GET_CODE (insn) == NOTE)
1896 insn_current_address = -1;
1897 else
1898 abort ();
|
1776 }
1777 else
1778 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1779#endif /* HAVE_ATTR_length */
1780
1781 insn = final_scan_insn (insn, file, optimize, prescan, 0);
1782 }
1783
| 1899 }
1900 else
1901 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1902#endif /* HAVE_ATTR_length */
1903
1904 insn = final_scan_insn (insn, file, optimize, prescan, 0);
1905 }
1906
|
| 1907 /* Store function names for edge-profiling. */
1908 /* ??? Probably should re-use the existing struct function. */
1909
1910 if (cfun->arc_profile)
1911 {
1912 struct function_list *new_item = xmalloc (sizeof (struct function_list));
1913
1914 *functions_tail = new_item;
1915 functions_tail = &new_item->next;
1916
1917 new_item->next = 0;
1918 new_item->name = xstrdup (IDENTIFIER_POINTER
1919 (DECL_ASSEMBLER_NAME (current_function_decl)));
1920 new_item->cfg_checksum = profile_info.current_function_cfg_checksum;
1921 new_item->count_edges = profile_info.count_edges_instrumented_now;
1922 }
1923
|
1784 free (line_note_exists);
1785 line_note_exists = NULL;
1786}
1787
1788const char *
1789get_insn_template (code, insn)
1790 int code;
1791 rtx insn;
1792{
1793 const void *output = insn_data[code].output;
1794 switch (insn_data[code].output_format)
1795 {
1796 case INSN_OUTPUT_FORMAT_SINGLE:
1797 return (const char *) output;
1798 case INSN_OUTPUT_FORMAT_MULTI:
1799 return ((const char *const *) output)[which_alternative];
1800 case INSN_OUTPUT_FORMAT_FUNCTION:
1801 if (insn == NULL)
1802 abort ();
1803 return (*(insn_output_fn) output) (recog_data.operand, insn);
1804
1805 default:
1806 abort ();
1807 }
1808}
1809
| 1924 free (line_note_exists);
1925 line_note_exists = NULL;
1926}
1927
1928const char *
1929get_insn_template (code, insn)
1930 int code;
1931 rtx insn;
1932{
1933 const void *output = insn_data[code].output;
1934 switch (insn_data[code].output_format)
1935 {
1936 case INSN_OUTPUT_FORMAT_SINGLE:
1937 return (const char *) output;
1938 case INSN_OUTPUT_FORMAT_MULTI:
1939 return ((const char *const *) output)[which_alternative];
1940 case INSN_OUTPUT_FORMAT_FUNCTION:
1941 if (insn == NULL)
1942 abort ();
1943 return (*(insn_output_fn) output) (recog_data.operand, insn);
1944
1945 default:
1946 abort ();
1947 }
1948}
1949
|
| 1950/* Emit the appropriate declaration for an alternate-entry-point
1951 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1952 LABEL_KIND != LABEL_NORMAL.
1953
1954 The case fall-through in this function is intentional. */
1955static void
1956output_alternate_entry_point (file, insn)
1957 FILE *file;
1958 rtx insn;
1959{
1960 const char *name = LABEL_NAME (insn);
1961
1962 switch (LABEL_KIND (insn))
1963 {
1964 case LABEL_WEAK_ENTRY:
1965#ifdef ASM_WEAKEN_LABEL
1966 ASM_WEAKEN_LABEL (file, name);
1967#endif
1968 case LABEL_GLOBAL_ENTRY:
1969 (*targetm.asm_out.globalize_label) (file, name);
1970 case LABEL_STATIC_ENTRY:
1971#ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1972 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1973#endif
1974 ASM_OUTPUT_LABEL (file, name);
1975 break;
1976
1977 case LABEL_NORMAL:
1978 default:
1979 abort ();
1980 }
1981}
1982
|
1810/* The final scan for one insn, INSN.
1811 Args are same as in `final', except that INSN
1812 is the insn being scanned.
1813 Value returned is the next insn to be scanned.
1814
1815 NOPEEPHOLES is the flag to disallow peephole processing (currently
1816 used for within delayed branch sequence output). */
1817
1818rtx
1819final_scan_insn (insn, file, optimize, prescan, nopeepholes)
1820 rtx insn;
1821 FILE *file;
1822 int optimize ATTRIBUTE_UNUSED;
1823 int prescan;
1824 int nopeepholes ATTRIBUTE_UNUSED;
1825{
1826#ifdef HAVE_cc0
1827 rtx set;
1828#endif
1829
1830 insn_counter++;
1831
1832 /* Ignore deleted insns. These can occur when we split insns (due to a
1833 template of "#") while not optimizing. */
1834 if (INSN_DELETED_P (insn))
1835 return NEXT_INSN (insn);
1836
1837 switch (GET_CODE (insn))
1838 {
1839 case NOTE:
1840 if (prescan > 0)
1841 break;
1842
1843 switch (NOTE_LINE_NUMBER (insn))
1844 {
1845 case NOTE_INSN_DELETED:
1846 case NOTE_INSN_LOOP_BEG:
1847 case NOTE_INSN_LOOP_END:
1848 case NOTE_INSN_LOOP_END_TOP_COND:
1849 case NOTE_INSN_LOOP_CONT:
1850 case NOTE_INSN_LOOP_VTOP:
1851 case NOTE_INSN_FUNCTION_END:
1852 case NOTE_INSN_REPEATED_LINE_NUMBER:
| 1983/* The final scan for one insn, INSN.
1984 Args are same as in `final', except that INSN
1985 is the insn being scanned.
1986 Value returned is the next insn to be scanned.
1987
1988 NOPEEPHOLES is the flag to disallow peephole processing (currently
1989 used for within delayed branch sequence output). */
1990
1991rtx
1992final_scan_insn (insn, file, optimize, prescan, nopeepholes)
1993 rtx insn;
1994 FILE *file;
1995 int optimize ATTRIBUTE_UNUSED;
1996 int prescan;
1997 int nopeepholes ATTRIBUTE_UNUSED;
1998{
1999#ifdef HAVE_cc0
2000 rtx set;
2001#endif
2002
2003 insn_counter++;
2004
2005 /* Ignore deleted insns. These can occur when we split insns (due to a
2006 template of "#") while not optimizing. */
2007 if (INSN_DELETED_P (insn))
2008 return NEXT_INSN (insn);
2009
2010 switch (GET_CODE (insn))
2011 {
2012 case NOTE:
2013 if (prescan > 0)
2014 break;
2015
2016 switch (NOTE_LINE_NUMBER (insn))
2017 {
2018 case NOTE_INSN_DELETED:
2019 case NOTE_INSN_LOOP_BEG:
2020 case NOTE_INSN_LOOP_END:
2021 case NOTE_INSN_LOOP_END_TOP_COND:
2022 case NOTE_INSN_LOOP_CONT:
2023 case NOTE_INSN_LOOP_VTOP:
2024 case NOTE_INSN_FUNCTION_END:
2025 case NOTE_INSN_REPEATED_LINE_NUMBER:
|
1853 case NOTE_INSN_RANGE_BEG:
1854 case NOTE_INSN_RANGE_END:
1855 case NOTE_INSN_LIVE:
| |
1856 case NOTE_INSN_EXPECTED_VALUE:
1857 break;
1858
1859 case NOTE_INSN_BASIC_BLOCK:
1860#ifdef IA64_UNWIND_INFO
1861 IA64_UNWIND_EMIT (asm_out_file, insn);
1862#endif
1863 if (flag_debug_asm)
1864 fprintf (asm_out_file, "\t%s basic block %d\n",
1865 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1866 break;
1867
1868 case NOTE_INSN_EH_REGION_BEG:
1869 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1870 NOTE_EH_HANDLER (insn));
1871 break;
1872
1873 case NOTE_INSN_EH_REGION_END:
1874 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1875 NOTE_EH_HANDLER (insn));
1876 break;
1877
1878 case NOTE_INSN_PROLOGUE_END:
1879 (*targetm.asm_out.function_end_prologue) (file);
1880 profile_after_prologue (file);
1881 break;
1882
1883 case NOTE_INSN_EPILOGUE_BEG:
1884 (*targetm.asm_out.function_begin_epilogue) (file);
1885 break;
1886
1887 case NOTE_INSN_FUNCTION_BEG:
1888 app_disable ();
| 2026 case NOTE_INSN_EXPECTED_VALUE:
2027 break;
2028
2029 case NOTE_INSN_BASIC_BLOCK:
2030#ifdef IA64_UNWIND_INFO
2031 IA64_UNWIND_EMIT (asm_out_file, insn);
2032#endif
2033 if (flag_debug_asm)
2034 fprintf (asm_out_file, "\t%s basic block %d\n",
2035 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
2036 break;
2037
2038 case NOTE_INSN_EH_REGION_BEG:
2039 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2040 NOTE_EH_HANDLER (insn));
2041 break;
2042
2043 case NOTE_INSN_EH_REGION_END:
2044 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2045 NOTE_EH_HANDLER (insn));
2046 break;
2047
2048 case NOTE_INSN_PROLOGUE_END:
2049 (*targetm.asm_out.function_end_prologue) (file);
2050 profile_after_prologue (file);
2051 break;
2052
2053 case NOTE_INSN_EPILOGUE_BEG:
2054 (*targetm.asm_out.function_begin_epilogue) (file);
2055 break;
2056
2057 case NOTE_INSN_FUNCTION_BEG:
2058 app_disable ();
|
1889 (*debug_hooks->end_prologue) (last_linenum);
| 2059 (*debug_hooks->end_prologue) (last_linenum, last_filename);
|
1890 break;
1891
1892 case NOTE_INSN_BLOCK_BEG:
1893 if (debug_info_level == DINFO_LEVEL_NORMAL
1894 || debug_info_level == DINFO_LEVEL_VERBOSE
1895 || write_symbols == DWARF_DEBUG
1896 || write_symbols == DWARF2_DEBUG
1897 || write_symbols == VMS_AND_DWARF2_DEBUG
1898 || write_symbols == VMS_DEBUG)
1899 {
1900 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1901
1902 app_disable ();
1903 ++block_depth;
1904 high_block_linenum = last_linenum;
1905
1906 /* Output debugging info about the symbol-block beginning. */
1907 (*debug_hooks->begin_block) (last_linenum, n);
1908
1909 /* Mark this block as output. */
1910 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
1911 }
1912 break;
1913
1914 case NOTE_INSN_BLOCK_END:
1915 if (debug_info_level == DINFO_LEVEL_NORMAL
1916 || debug_info_level == DINFO_LEVEL_VERBOSE
1917 || write_symbols == DWARF_DEBUG
1918 || write_symbols == DWARF2_DEBUG
1919 || write_symbols == VMS_AND_DWARF2_DEBUG
1920 || write_symbols == VMS_DEBUG)
1921 {
1922 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1923
1924 app_disable ();
1925
1926 /* End of a symbol-block. */
1927 --block_depth;
1928 if (block_depth < 0)
1929 abort ();
1930
1931 (*debug_hooks->end_block) (high_block_linenum, n);
1932 }
1933 break;
1934
1935 case NOTE_INSN_DELETED_LABEL:
1936 /* Emit the label. We may have deleted the CODE_LABEL because
1937 the label could be proved to be unreachable, though still
1938 referenced (in the form of having its address taken. */
1939 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
1940 break;
1941
1942 case 0:
1943 break;
1944
1945 default:
1946 if (NOTE_LINE_NUMBER (insn) <= 0)
1947 abort ();
1948
1949 /* This note is a line-number. */
1950 {
1951 rtx note;
1952 int note_after = 0;
1953
1954 /* If there is anything real after this note, output it.
1955 If another line note follows, omit this one. */
1956 for (note = NEXT_INSN (insn); note; note = NEXT_INSN (note))
1957 {
1958 if (GET_CODE (note) != NOTE && GET_CODE (note) != CODE_LABEL)
1959 break;
1960
1961 /* These types of notes can be significant
1962 so make sure the preceding line number stays. */
1963 else if (GET_CODE (note) == NOTE
1964 && (NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_BEG
1965 || NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_END
1966 || NOTE_LINE_NUMBER (note) == NOTE_INSN_FUNCTION_BEG))
1967 break;
1968 else if (GET_CODE (note) == NOTE && NOTE_LINE_NUMBER (note) > 0)
1969 {
1970 /* Another line note follows; we can delete this note
1971 if no intervening line numbers have notes elsewhere. */
1972 int num;
1973 for (num = NOTE_LINE_NUMBER (insn) + 1;
1974 num < NOTE_LINE_NUMBER (note);
1975 num++)
1976 if (line_note_exists[num])
1977 break;
1978
1979 if (num >= NOTE_LINE_NUMBER (note))
1980 note_after = 1;
1981 break;
1982 }
1983 }
1984
1985 /* Output this line note if it is the first or the last line
1986 note in a row. */
1987 if (!note_after)
1988 {
1989 notice_source_line (insn);
1990 (*debug_hooks->source_line) (last_linenum, last_filename);
1991 }
1992 }
1993 break;
1994 }
1995 break;
1996
1997 case BARRIER:
1998#if defined (DWARF2_UNWIND_INFO)
1999 if (dwarf2out_do_frame ())
2000 dwarf2out_frame_debug (insn);
2001#endif
2002 break;
2003
2004 case CODE_LABEL:
2005 /* The target port might emit labels in the output function for
2006 some insn, e.g. sh.c output_branchy_insn. */
2007 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2008 {
2009 int align = LABEL_TO_ALIGNMENT (insn);
2010#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2011 int max_skip = LABEL_TO_MAX_SKIP (insn);
2012#endif
2013
2014 if (align && NEXT_INSN (insn))
2015 {
2016#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2017 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2018#else
| 2060 break;
2061
2062 case NOTE_INSN_BLOCK_BEG:
2063 if (debug_info_level == DINFO_LEVEL_NORMAL
2064 || debug_info_level == DINFO_LEVEL_VERBOSE
2065 || write_symbols == DWARF_DEBUG
2066 || write_symbols == DWARF2_DEBUG
2067 || write_symbols == VMS_AND_DWARF2_DEBUG
2068 || write_symbols == VMS_DEBUG)
2069 {
2070 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2071
2072 app_disable ();
2073 ++block_depth;
2074 high_block_linenum = last_linenum;
2075
2076 /* Output debugging info about the symbol-block beginning. */
2077 (*debug_hooks->begin_block) (last_linenum, n);
2078
2079 /* Mark this block as output. */
2080 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2081 }
2082 break;
2083
2084 case NOTE_INSN_BLOCK_END:
2085 if (debug_info_level == DINFO_LEVEL_NORMAL
2086 || debug_info_level == DINFO_LEVEL_VERBOSE
2087 || write_symbols == DWARF_DEBUG
2088 || write_symbols == DWARF2_DEBUG
2089 || write_symbols == VMS_AND_DWARF2_DEBUG
2090 || write_symbols == VMS_DEBUG)
2091 {
2092 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2093
2094 app_disable ();
2095
2096 /* End of a symbol-block. */
2097 --block_depth;
2098 if (block_depth < 0)
2099 abort ();
2100
2101 (*debug_hooks->end_block) (high_block_linenum, n);
2102 }
2103 break;
2104
2105 case NOTE_INSN_DELETED_LABEL:
2106 /* Emit the label. We may have deleted the CODE_LABEL because
2107 the label could be proved to be unreachable, though still
2108 referenced (in the form of having its address taken. */
2109 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2110 break;
2111
2112 case 0:
2113 break;
2114
2115 default:
2116 if (NOTE_LINE_NUMBER (insn) <= 0)
2117 abort ();
2118
2119 /* This note is a line-number. */
2120 {
2121 rtx note;
2122 int note_after = 0;
2123
2124 /* If there is anything real after this note, output it.
2125 If another line note follows, omit this one. */
2126 for (note = NEXT_INSN (insn); note; note = NEXT_INSN (note))
2127 {
2128 if (GET_CODE (note) != NOTE && GET_CODE (note) != CODE_LABEL)
2129 break;
2130
2131 /* These types of notes can be significant
2132 so make sure the preceding line number stays. */
2133 else if (GET_CODE (note) == NOTE
2134 && (NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_BEG
2135 || NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_END
2136 || NOTE_LINE_NUMBER (note) == NOTE_INSN_FUNCTION_BEG))
2137 break;
2138 else if (GET_CODE (note) == NOTE && NOTE_LINE_NUMBER (note) > 0)
2139 {
2140 /* Another line note follows; we can delete this note
2141 if no intervening line numbers have notes elsewhere. */
2142 int num;
2143 for (num = NOTE_LINE_NUMBER (insn) + 1;
2144 num < NOTE_LINE_NUMBER (note);
2145 num++)
2146 if (line_note_exists[num])
2147 break;
2148
2149 if (num >= NOTE_LINE_NUMBER (note))
2150 note_after = 1;
2151 break;
2152 }
2153 }
2154
2155 /* Output this line note if it is the first or the last line
2156 note in a row. */
2157 if (!note_after)
2158 {
2159 notice_source_line (insn);
2160 (*debug_hooks->source_line) (last_linenum, last_filename);
2161 }
2162 }
2163 break;
2164 }
2165 break;
2166
2167 case BARRIER:
2168#if defined (DWARF2_UNWIND_INFO)
2169 if (dwarf2out_do_frame ())
2170 dwarf2out_frame_debug (insn);
2171#endif
2172 break;
2173
2174 case CODE_LABEL:
2175 /* The target port might emit labels in the output function for
2176 some insn, e.g. sh.c output_branchy_insn. */
2177 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2178 {
2179 int align = LABEL_TO_ALIGNMENT (insn);
2180#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2181 int max_skip = LABEL_TO_MAX_SKIP (insn);
2182#endif
2183
2184 if (align && NEXT_INSN (insn))
2185 {
2186#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2187 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2188#else
|
| 2189#ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2190 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2191#else
|
2019 ASM_OUTPUT_ALIGN (file, align);
2020#endif
| 2192 ASM_OUTPUT_ALIGN (file, align);
2193#endif
|
| 2194#endif
|
2021 }
2022 }
2023#ifdef HAVE_cc0
2024 CC_STATUS_INIT;
2025 /* If this label is reached from only one place, set the condition
2026 codes from the instruction just before the branch. */
2027
2028 /* Disabled because some insns set cc_status in the C output code
2029 and NOTICE_UPDATE_CC alone can set incorrect status. */
2030 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
2031 {
2032 rtx jump = LABEL_REFS (insn);
2033 rtx barrier = prev_nonnote_insn (insn);
2034 rtx prev;
2035 /* If the LABEL_REFS field of this label has been set to point
2036 at a branch, the predecessor of the branch is a regular
2037 insn, and that branch is the only way to reach this label,
2038 set the condition codes based on the branch and its
2039 predecessor. */
2040 if (barrier && GET_CODE (barrier) == BARRIER
2041 && jump && GET_CODE (jump) == JUMP_INSN
2042 && (prev = prev_nonnote_insn (jump))
2043 && GET_CODE (prev) == INSN)
2044 {
2045 NOTICE_UPDATE_CC (PATTERN (prev), prev);
2046 NOTICE_UPDATE_CC (PATTERN (jump), jump);
2047 }
2048 }
2049#endif
2050 if (prescan > 0)
2051 break;
2052 new_block = 1;
2053
2054#ifdef FINAL_PRESCAN_LABEL
2055 FINAL_PRESCAN_INSN (insn, NULL, 0);
2056#endif
2057
2058 if (LABEL_NAME (insn))
2059 (*debug_hooks->label) (insn);
2060
2061 if (app_on)
2062 {
2063 fputs (ASM_APP_OFF, file);
2064 app_on = 0;
2065 }
2066 if (NEXT_INSN (insn) != 0
2067 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN)
2068 {
2069 rtx nextbody = PATTERN (NEXT_INSN (insn));
2070
2071 /* If this label is followed by a jump-table,
2072 make sure we put the label in the read-only section. Also
2073 possibly write the label and jump table together. */
2074
2075 if (GET_CODE (nextbody) == ADDR_VEC
2076 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
2077 {
2078#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2079 /* In this case, the case vector is being moved by the
2080 target, so don't output the label at all. Leave that
2081 to the back end macros. */
2082#else
2083 if (! JUMP_TABLES_IN_TEXT_SECTION)
2084 {
2085 int log_align;
2086
2087 readonly_data_section ();
2088
2089#ifdef ADDR_VEC_ALIGN
2090 log_align = ADDR_VEC_ALIGN (NEXT_INSN (insn));
2091#else
2092 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2093#endif
2094 ASM_OUTPUT_ALIGN (file, log_align);
2095 }
2096 else
2097 function_section (current_function_decl);
2098
2099#ifdef ASM_OUTPUT_CASE_LABEL
2100 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2101 NEXT_INSN (insn));
2102#else
| 2195 }
2196 }
2197#ifdef HAVE_cc0
2198 CC_STATUS_INIT;
2199 /* If this label is reached from only one place, set the condition
2200 codes from the instruction just before the branch. */
2201
2202 /* Disabled because some insns set cc_status in the C output code
2203 and NOTICE_UPDATE_CC alone can set incorrect status. */
2204 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
2205 {
2206 rtx jump = LABEL_REFS (insn);
2207 rtx barrier = prev_nonnote_insn (insn);
2208 rtx prev;
2209 /* If the LABEL_REFS field of this label has been set to point
2210 at a branch, the predecessor of the branch is a regular
2211 insn, and that branch is the only way to reach this label,
2212 set the condition codes based on the branch and its
2213 predecessor. */
2214 if (barrier && GET_CODE (barrier) == BARRIER
2215 && jump && GET_CODE (jump) == JUMP_INSN
2216 && (prev = prev_nonnote_insn (jump))
2217 && GET_CODE (prev) == INSN)
2218 {
2219 NOTICE_UPDATE_CC (PATTERN (prev), prev);
2220 NOTICE_UPDATE_CC (PATTERN (jump), jump);
2221 }
2222 }
2223#endif
2224 if (prescan > 0)
2225 break;
2226 new_block = 1;
2227
2228#ifdef FINAL_PRESCAN_LABEL
2229 FINAL_PRESCAN_INSN (insn, NULL, 0);
2230#endif
2231
2232 if (LABEL_NAME (insn))
2233 (*debug_hooks->label) (insn);
2234
2235 if (app_on)
2236 {
2237 fputs (ASM_APP_OFF, file);
2238 app_on = 0;
2239 }
2240 if (NEXT_INSN (insn) != 0
2241 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN)
2242 {
2243 rtx nextbody = PATTERN (NEXT_INSN (insn));
2244
2245 /* If this label is followed by a jump-table,
2246 make sure we put the label in the read-only section. Also
2247 possibly write the label and jump table together. */
2248
2249 if (GET_CODE (nextbody) == ADDR_VEC
2250 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
2251 {
2252#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2253 /* In this case, the case vector is being moved by the
2254 target, so don't output the label at all. Leave that
2255 to the back end macros. */
2256#else
2257 if (! JUMP_TABLES_IN_TEXT_SECTION)
2258 {
2259 int log_align;
2260
2261 readonly_data_section ();
2262
2263#ifdef ADDR_VEC_ALIGN
2264 log_align = ADDR_VEC_ALIGN (NEXT_INSN (insn));
2265#else
2266 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2267#endif
2268 ASM_OUTPUT_ALIGN (file, log_align);
2269 }
2270 else
2271 function_section (current_function_decl);
2272
2273#ifdef ASM_OUTPUT_CASE_LABEL
2274 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2275 NEXT_INSN (insn));
2276#else
|
2103 if (LABEL_ALTERNATE_NAME (insn))
2104 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2105 else
2106 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
| 2277 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
|
2107#endif
2108#endif
2109 break;
2110 }
2111 }
| 2278#endif
2279#endif
2280 break;
2281 }
2282 }
|
2112 if (LABEL_ALTERNATE_NAME (insn))
2113 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
| 2283 if (LABEL_ALT_ENTRY_P (insn))
2284 output_alternate_entry_point (file, insn);
|
2114 else
2115 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2116 break;
2117
2118 default:
2119 {
2120 rtx body = PATTERN (insn);
2121 int insn_code_number;
2122 const char *template;
2123 rtx note;
2124
2125 /* An INSN, JUMP_INSN or CALL_INSN.
2126 First check for special kinds that recog doesn't recognize. */
2127
2128 if (GET_CODE (body) == USE /* These are just declarations */
2129 || GET_CODE (body) == CLOBBER)
2130 break;
2131
2132#ifdef HAVE_cc0
2133 /* If there is a REG_CC_SETTER note on this insn, it means that
2134 the setting of the condition code was done in the delay slot
2135 of the insn that branched here. So recover the cc status
2136 from the insn that set it. */
2137
2138 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2139 if (note)
2140 {
2141 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2142 cc_prev_status = cc_status;
2143 }
2144#endif
2145
2146 /* Detect insns that are really jump-tables
2147 and output them as such. */
2148
2149 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2150 {
2151#if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2152 int vlen, idx;
2153#endif
2154
2155 if (prescan > 0)
2156 break;
2157
2158 if (app_on)
2159 {
2160 fputs (ASM_APP_OFF, file);
2161 app_on = 0;
2162 }
2163
2164#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2165 if (GET_CODE (body) == ADDR_VEC)
2166 {
2167#ifdef ASM_OUTPUT_ADDR_VEC
2168 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2169#else
2170 abort ();
2171#endif
2172 }
2173 else
2174 {
2175#ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2176 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2177#else
2178 abort ();
2179#endif
2180 }
2181#else
2182 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2183 for (idx = 0; idx < vlen; idx++)
2184 {
2185 if (GET_CODE (body) == ADDR_VEC)
2186 {
2187#ifdef ASM_OUTPUT_ADDR_VEC_ELT
2188 ASM_OUTPUT_ADDR_VEC_ELT
2189 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2190#else
2191 abort ();
2192#endif
2193 }
2194 else
2195 {
2196#ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2197 ASM_OUTPUT_ADDR_DIFF_ELT
2198 (file,
2199 body,
2200 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2201 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2202#else
2203 abort ();
2204#endif
2205 }
2206 }
2207#ifdef ASM_OUTPUT_CASE_END
2208 ASM_OUTPUT_CASE_END (file,
2209 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2210 insn);
2211#endif
2212#endif
2213
2214 function_section (current_function_decl);
2215
2216 break;
2217 }
2218
2219 if (GET_CODE (body) == ASM_INPUT)
2220 {
2221 const char *string = XSTR (body, 0);
2222
2223 /* There's no telling what that did to the condition codes. */
2224 CC_STATUS_INIT;
2225 if (prescan > 0)
2226 break;
2227
2228 if (string[0])
2229 {
2230 if (! app_on)
2231 {
2232 fputs (ASM_APP_ON, file);
2233 app_on = 1;
2234 }
2235 fprintf (asm_out_file, "\t%s\n", string);
2236 }
2237 break;
2238 }
2239
2240 /* Detect `asm' construct with operands. */
2241 if (asm_noperands (body) >= 0)
2242 {
2243 unsigned int noperands = asm_noperands (body);
2244 rtx *ops = (rtx *) alloca (noperands * sizeof (rtx));
2245 const char *string;
2246
2247 /* There's no telling what that did to the condition codes. */
2248 CC_STATUS_INIT;
2249 if (prescan > 0)
2250 break;
2251
2252 /* Get out the operand values. */
2253 string = decode_asm_operands (body, ops, NULL, NULL, NULL);
2254 /* Inhibit aborts on what would otherwise be compiler bugs. */
2255 insn_noperands = noperands;
2256 this_is_asm_operands = insn;
2257
2258 /* Output the insn using them. */
2259 if (string[0])
2260 {
2261 if (! app_on)
2262 {
2263 fputs (ASM_APP_ON, file);
2264 app_on = 1;
2265 }
2266 output_asm_insn (string, ops);
2267 }
2268
2269 this_is_asm_operands = 0;
2270 break;
2271 }
2272
2273 if (prescan <= 0 && app_on)
2274 {
2275 fputs (ASM_APP_OFF, file);
2276 app_on = 0;
2277 }
2278
2279 if (GET_CODE (body) == SEQUENCE)
2280 {
2281 /* A delayed-branch sequence */
2282 int i;
2283 rtx next;
2284
2285 if (prescan > 0)
2286 break;
2287 final_sequence = body;
2288
2289 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2290 force the restoration of a comparison that was previously
2291 thought unnecessary. If that happens, cancel this sequence
2292 and cause that insn to be restored. */
2293
2294 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1);
2295 if (next != XVECEXP (body, 0, 1))
2296 {
2297 final_sequence = 0;
2298 return next;
2299 }
2300
2301 for (i = 1; i < XVECLEN (body, 0); i++)
2302 {
2303 rtx insn = XVECEXP (body, 0, i);
2304 rtx next = NEXT_INSN (insn);
2305 /* We loop in case any instruction in a delay slot gets
2306 split. */
2307 do
2308 insn = final_scan_insn (insn, file, 0, prescan, 1);
2309 while (insn != next);
2310 }
2311#ifdef DBR_OUTPUT_SEQEND
2312 DBR_OUTPUT_SEQEND (file);
2313#endif
2314 final_sequence = 0;
2315
2316 /* If the insn requiring the delay slot was a CALL_INSN, the
2317 insns in the delay slot are actually executed before the
2318 called function. Hence we don't preserve any CC-setting
2319 actions in these insns and the CC must be marked as being
2320 clobbered by the function. */
2321 if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN)
2322 {
2323 CC_STATUS_INIT;
2324 }
2325 break;
2326 }
2327
2328 /* We have a real machine instruction as rtl. */
2329
2330 body = PATTERN (insn);
2331
2332#ifdef HAVE_cc0
2333 set = single_set (insn);
2334
2335 /* Check for redundant test and compare instructions
2336 (when the condition codes are already set up as desired).
2337 This is done only when optimizing; if not optimizing,
2338 it should be possible for the user to alter a variable
2339 with the debugger in between statements
2340 and the next statement should reexamine the variable
2341 to compute the condition codes. */
2342
2343 if (optimize)
2344 {
2345#if 0
2346 rtx set = single_set (insn);
2347#endif
2348
2349 if (set
2350 && GET_CODE (SET_DEST (set)) == CC0
2351 && insn != last_ignored_compare)
2352 {
2353 if (GET_CODE (SET_SRC (set)) == SUBREG)
2354 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2355 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2356 {
2357 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2358 XEXP (SET_SRC (set), 0)
2359 = alter_subreg (&XEXP (SET_SRC (set), 0));
2360 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2361 XEXP (SET_SRC (set), 1)
2362 = alter_subreg (&XEXP (SET_SRC (set), 1));
2363 }
2364 if ((cc_status.value1 != 0
2365 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2366 || (cc_status.value2 != 0
2367 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2368 {
2369 /* Don't delete insn if it has an addressing side-effect. */
2370 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2371 /* or if anything in it is volatile. */
2372 && ! volatile_refs_p (PATTERN (insn)))
2373 {
2374 /* We don't really delete the insn; just ignore it. */
2375 last_ignored_compare = insn;
2376 break;
2377 }
2378 }
2379 }
2380 }
2381#endif
2382
2383#ifndef STACK_REGS
2384 /* Don't bother outputting obvious no-ops, even without -O.
2385 This optimization is fast and doesn't interfere with debugging.
2386 Don't do this if the insn is in a delay slot, since this
2387 will cause an improper number of delay insns to be written. */
2388 if (final_sequence == 0
2389 && prescan >= 0
2390 && GET_CODE (insn) == INSN && GET_CODE (body) == SET
2391 && GET_CODE (SET_SRC (body)) == REG
2392 && GET_CODE (SET_DEST (body)) == REG
2393 && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body)))
2394 break;
2395#endif
2396
2397#ifdef HAVE_cc0
2398 /* If this is a conditional branch, maybe modify it
2399 if the cc's are in a nonstandard state
2400 so that it accomplishes the same thing that it would
2401 do straightforwardly if the cc's were set up normally. */
2402
2403 if (cc_status.flags != 0
2404 && GET_CODE (insn) == JUMP_INSN
2405 && GET_CODE (body) == SET
2406 && SET_DEST (body) == pc_rtx
2407 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2408 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<'
2409 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx
2410 /* This is done during prescan; it is not done again
2411 in final scan when prescan has been done. */
2412 && prescan >= 0)
2413 {
2414 /* This function may alter the contents of its argument
2415 and clear some of the cc_status.flags bits.
2416 It may also return 1 meaning condition now always true
2417 or -1 meaning condition now always false
2418 or 2 meaning condition nontrivial but altered. */
2419 int result = alter_cond (XEXP (SET_SRC (body), 0));
2420 /* If condition now has fixed value, replace the IF_THEN_ELSE
2421 with its then-operand or its else-operand. */
2422 if (result == 1)
2423 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2424 if (result == -1)
2425 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2426
2427 /* The jump is now either unconditional or a no-op.
2428 If it has become a no-op, don't try to output it.
2429 (It would not be recognized.) */
2430 if (SET_SRC (body) == pc_rtx)
2431 {
2432 delete_insn (insn);
2433 break;
2434 }
2435 else if (GET_CODE (SET_SRC (body)) == RETURN)
2436 /* Replace (set (pc) (return)) with (return). */
2437 PATTERN (insn) = body = SET_SRC (body);
2438
2439 /* Rerecognize the instruction if it has changed. */
2440 if (result != 0)
2441 INSN_CODE (insn) = -1;
2442 }
2443
2444 /* Make same adjustments to instructions that examine the
2445 condition codes without jumping and instructions that
2446 handle conditional moves (if this machine has either one). */
2447
2448 if (cc_status.flags != 0
2449 && set != 0)
2450 {
2451 rtx cond_rtx, then_rtx, else_rtx;
2452
2453 if (GET_CODE (insn) != JUMP_INSN
2454 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2455 {
2456 cond_rtx = XEXP (SET_SRC (set), 0);
2457 then_rtx = XEXP (SET_SRC (set), 1);
2458 else_rtx = XEXP (SET_SRC (set), 2);
2459 }
2460 else
2461 {
2462 cond_rtx = SET_SRC (set);
2463 then_rtx = const_true_rtx;
2464 else_rtx = const0_rtx;
2465 }
2466
2467 switch (GET_CODE (cond_rtx))
2468 {
2469 case GTU:
2470 case GT:
2471 case LTU:
2472 case LT:
2473 case GEU:
2474 case GE:
2475 case LEU:
2476 case LE:
2477 case EQ:
2478 case NE:
2479 {
2480 int result;
2481 if (XEXP (cond_rtx, 0) != cc0_rtx)
2482 break;
2483 result = alter_cond (cond_rtx);
2484 if (result == 1)
2485 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2486 else if (result == -1)
2487 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2488 else if (result == 2)
2489 INSN_CODE (insn) = -1;
2490 if (SET_DEST (set) == SET_SRC (set))
2491 delete_insn (insn);
2492 }
2493 break;
2494
2495 default:
2496 break;
2497 }
2498 }
2499
2500#endif
2501
2502#ifdef HAVE_peephole
2503 /* Do machine-specific peephole optimizations if desired. */
2504
2505 if (optimize && !flag_no_peephole && !nopeepholes)
2506 {
2507 rtx next = peephole (insn);
2508 /* When peepholing, if there were notes within the peephole,
2509 emit them before the peephole. */
2510 if (next != 0 && next != NEXT_INSN (insn))
2511 {
2512 rtx prev = PREV_INSN (insn);
2513
2514 for (note = NEXT_INSN (insn); note != next;
2515 note = NEXT_INSN (note))
2516 final_scan_insn (note, file, optimize, prescan, nopeepholes);
2517
2518 /* In case this is prescan, put the notes
2519 in proper position for later rescan. */
2520 note = NEXT_INSN (insn);
2521 PREV_INSN (note) = prev;
2522 NEXT_INSN (prev) = note;
2523 NEXT_INSN (PREV_INSN (next)) = insn;
2524 PREV_INSN (insn) = PREV_INSN (next);
2525 NEXT_INSN (insn) = next;
2526 PREV_INSN (next) = insn;
2527 }
2528
2529 /* PEEPHOLE might have changed this. */
2530 body = PATTERN (insn);
2531 }
2532#endif
2533
2534 /* Try to recognize the instruction.
2535 If successful, verify that the operands satisfy the
2536 constraints for the instruction. Crash if they don't,
2537 since `reload' should have changed them so that they do. */
2538
2539 insn_code_number = recog_memoized (insn);
2540 cleanup_subreg_operands (insn);
2541
| 2285 else
2286 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2287 break;
2288
2289 default:
2290 {
2291 rtx body = PATTERN (insn);
2292 int insn_code_number;
2293 const char *template;
2294 rtx note;
2295
2296 /* An INSN, JUMP_INSN or CALL_INSN.
2297 First check for special kinds that recog doesn't recognize. */
2298
2299 if (GET_CODE (body) == USE /* These are just declarations */
2300 || GET_CODE (body) == CLOBBER)
2301 break;
2302
2303#ifdef HAVE_cc0
2304 /* If there is a REG_CC_SETTER note on this insn, it means that
2305 the setting of the condition code was done in the delay slot
2306 of the insn that branched here. So recover the cc status
2307 from the insn that set it. */
2308
2309 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2310 if (note)
2311 {
2312 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2313 cc_prev_status = cc_status;
2314 }
2315#endif
2316
2317 /* Detect insns that are really jump-tables
2318 and output them as such. */
2319
2320 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2321 {
2322#if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2323 int vlen, idx;
2324#endif
2325
2326 if (prescan > 0)
2327 break;
2328
2329 if (app_on)
2330 {
2331 fputs (ASM_APP_OFF, file);
2332 app_on = 0;
2333 }
2334
2335#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2336 if (GET_CODE (body) == ADDR_VEC)
2337 {
2338#ifdef ASM_OUTPUT_ADDR_VEC
2339 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2340#else
2341 abort ();
2342#endif
2343 }
2344 else
2345 {
2346#ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2347 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2348#else
2349 abort ();
2350#endif
2351 }
2352#else
2353 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2354 for (idx = 0; idx < vlen; idx++)
2355 {
2356 if (GET_CODE (body) == ADDR_VEC)
2357 {
2358#ifdef ASM_OUTPUT_ADDR_VEC_ELT
2359 ASM_OUTPUT_ADDR_VEC_ELT
2360 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2361#else
2362 abort ();
2363#endif
2364 }
2365 else
2366 {
2367#ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2368 ASM_OUTPUT_ADDR_DIFF_ELT
2369 (file,
2370 body,
2371 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2372 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2373#else
2374 abort ();
2375#endif
2376 }
2377 }
2378#ifdef ASM_OUTPUT_CASE_END
2379 ASM_OUTPUT_CASE_END (file,
2380 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2381 insn);
2382#endif
2383#endif
2384
2385 function_section (current_function_decl);
2386
2387 break;
2388 }
2389
2390 if (GET_CODE (body) == ASM_INPUT)
2391 {
2392 const char *string = XSTR (body, 0);
2393
2394 /* There's no telling what that did to the condition codes. */
2395 CC_STATUS_INIT;
2396 if (prescan > 0)
2397 break;
2398
2399 if (string[0])
2400 {
2401 if (! app_on)
2402 {
2403 fputs (ASM_APP_ON, file);
2404 app_on = 1;
2405 }
2406 fprintf (asm_out_file, "\t%s\n", string);
2407 }
2408 break;
2409 }
2410
2411 /* Detect `asm' construct with operands. */
2412 if (asm_noperands (body) >= 0)
2413 {
2414 unsigned int noperands = asm_noperands (body);
2415 rtx *ops = (rtx *) alloca (noperands * sizeof (rtx));
2416 const char *string;
2417
2418 /* There's no telling what that did to the condition codes. */
2419 CC_STATUS_INIT;
2420 if (prescan > 0)
2421 break;
2422
2423 /* Get out the operand values. */
2424 string = decode_asm_operands (body, ops, NULL, NULL, NULL);
2425 /* Inhibit aborts on what would otherwise be compiler bugs. */
2426 insn_noperands = noperands;
2427 this_is_asm_operands = insn;
2428
2429 /* Output the insn using them. */
2430 if (string[0])
2431 {
2432 if (! app_on)
2433 {
2434 fputs (ASM_APP_ON, file);
2435 app_on = 1;
2436 }
2437 output_asm_insn (string, ops);
2438 }
2439
2440 this_is_asm_operands = 0;
2441 break;
2442 }
2443
2444 if (prescan <= 0 && app_on)
2445 {
2446 fputs (ASM_APP_OFF, file);
2447 app_on = 0;
2448 }
2449
2450 if (GET_CODE (body) == SEQUENCE)
2451 {
2452 /* A delayed-branch sequence */
2453 int i;
2454 rtx next;
2455
2456 if (prescan > 0)
2457 break;
2458 final_sequence = body;
2459
2460 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2461 force the restoration of a comparison that was previously
2462 thought unnecessary. If that happens, cancel this sequence
2463 and cause that insn to be restored. */
2464
2465 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1);
2466 if (next != XVECEXP (body, 0, 1))
2467 {
2468 final_sequence = 0;
2469 return next;
2470 }
2471
2472 for (i = 1; i < XVECLEN (body, 0); i++)
2473 {
2474 rtx insn = XVECEXP (body, 0, i);
2475 rtx next = NEXT_INSN (insn);
2476 /* We loop in case any instruction in a delay slot gets
2477 split. */
2478 do
2479 insn = final_scan_insn (insn, file, 0, prescan, 1);
2480 while (insn != next);
2481 }
2482#ifdef DBR_OUTPUT_SEQEND
2483 DBR_OUTPUT_SEQEND (file);
2484#endif
2485 final_sequence = 0;
2486
2487 /* If the insn requiring the delay slot was a CALL_INSN, the
2488 insns in the delay slot are actually executed before the
2489 called function. Hence we don't preserve any CC-setting
2490 actions in these insns and the CC must be marked as being
2491 clobbered by the function. */
2492 if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN)
2493 {
2494 CC_STATUS_INIT;
2495 }
2496 break;
2497 }
2498
2499 /* We have a real machine instruction as rtl. */
2500
2501 body = PATTERN (insn);
2502
2503#ifdef HAVE_cc0
2504 set = single_set (insn);
2505
2506 /* Check for redundant test and compare instructions
2507 (when the condition codes are already set up as desired).
2508 This is done only when optimizing; if not optimizing,
2509 it should be possible for the user to alter a variable
2510 with the debugger in between statements
2511 and the next statement should reexamine the variable
2512 to compute the condition codes. */
2513
2514 if (optimize)
2515 {
2516#if 0
2517 rtx set = single_set (insn);
2518#endif
2519
2520 if (set
2521 && GET_CODE (SET_DEST (set)) == CC0
2522 && insn != last_ignored_compare)
2523 {
2524 if (GET_CODE (SET_SRC (set)) == SUBREG)
2525 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2526 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2527 {
2528 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2529 XEXP (SET_SRC (set), 0)
2530 = alter_subreg (&XEXP (SET_SRC (set), 0));
2531 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2532 XEXP (SET_SRC (set), 1)
2533 = alter_subreg (&XEXP (SET_SRC (set), 1));
2534 }
2535 if ((cc_status.value1 != 0
2536 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2537 || (cc_status.value2 != 0
2538 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2539 {
2540 /* Don't delete insn if it has an addressing side-effect. */
2541 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2542 /* or if anything in it is volatile. */
2543 && ! volatile_refs_p (PATTERN (insn)))
2544 {
2545 /* We don't really delete the insn; just ignore it. */
2546 last_ignored_compare = insn;
2547 break;
2548 }
2549 }
2550 }
2551 }
2552#endif
2553
2554#ifndef STACK_REGS
2555 /* Don't bother outputting obvious no-ops, even without -O.
2556 This optimization is fast and doesn't interfere with debugging.
2557 Don't do this if the insn is in a delay slot, since this
2558 will cause an improper number of delay insns to be written. */
2559 if (final_sequence == 0
2560 && prescan >= 0
2561 && GET_CODE (insn) == INSN && GET_CODE (body) == SET
2562 && GET_CODE (SET_SRC (body)) == REG
2563 && GET_CODE (SET_DEST (body)) == REG
2564 && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body)))
2565 break;
2566#endif
2567
2568#ifdef HAVE_cc0
2569 /* If this is a conditional branch, maybe modify it
2570 if the cc's are in a nonstandard state
2571 so that it accomplishes the same thing that it would
2572 do straightforwardly if the cc's were set up normally. */
2573
2574 if (cc_status.flags != 0
2575 && GET_CODE (insn) == JUMP_INSN
2576 && GET_CODE (body) == SET
2577 && SET_DEST (body) == pc_rtx
2578 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2579 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<'
2580 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx
2581 /* This is done during prescan; it is not done again
2582 in final scan when prescan has been done. */
2583 && prescan >= 0)
2584 {
2585 /* This function may alter the contents of its argument
2586 and clear some of the cc_status.flags bits.
2587 It may also return 1 meaning condition now always true
2588 or -1 meaning condition now always false
2589 or 2 meaning condition nontrivial but altered. */
2590 int result = alter_cond (XEXP (SET_SRC (body), 0));
2591 /* If condition now has fixed value, replace the IF_THEN_ELSE
2592 with its then-operand or its else-operand. */
2593 if (result == 1)
2594 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2595 if (result == -1)
2596 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2597
2598 /* The jump is now either unconditional or a no-op.
2599 If it has become a no-op, don't try to output it.
2600 (It would not be recognized.) */
2601 if (SET_SRC (body) == pc_rtx)
2602 {
2603 delete_insn (insn);
2604 break;
2605 }
2606 else if (GET_CODE (SET_SRC (body)) == RETURN)
2607 /* Replace (set (pc) (return)) with (return). */
2608 PATTERN (insn) = body = SET_SRC (body);
2609
2610 /* Rerecognize the instruction if it has changed. */
2611 if (result != 0)
2612 INSN_CODE (insn) = -1;
2613 }
2614
2615 /* Make same adjustments to instructions that examine the
2616 condition codes without jumping and instructions that
2617 handle conditional moves (if this machine has either one). */
2618
2619 if (cc_status.flags != 0
2620 && set != 0)
2621 {
2622 rtx cond_rtx, then_rtx, else_rtx;
2623
2624 if (GET_CODE (insn) != JUMP_INSN
2625 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2626 {
2627 cond_rtx = XEXP (SET_SRC (set), 0);
2628 then_rtx = XEXP (SET_SRC (set), 1);
2629 else_rtx = XEXP (SET_SRC (set), 2);
2630 }
2631 else
2632 {
2633 cond_rtx = SET_SRC (set);
2634 then_rtx = const_true_rtx;
2635 else_rtx = const0_rtx;
2636 }
2637
2638 switch (GET_CODE (cond_rtx))
2639 {
2640 case GTU:
2641 case GT:
2642 case LTU:
2643 case LT:
2644 case GEU:
2645 case GE:
2646 case LEU:
2647 case LE:
2648 case EQ:
2649 case NE:
2650 {
2651 int result;
2652 if (XEXP (cond_rtx, 0) != cc0_rtx)
2653 break;
2654 result = alter_cond (cond_rtx);
2655 if (result == 1)
2656 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2657 else if (result == -1)
2658 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2659 else if (result == 2)
2660 INSN_CODE (insn) = -1;
2661 if (SET_DEST (set) == SET_SRC (set))
2662 delete_insn (insn);
2663 }
2664 break;
2665
2666 default:
2667 break;
2668 }
2669 }
2670
2671#endif
2672
2673#ifdef HAVE_peephole
2674 /* Do machine-specific peephole optimizations if desired. */
2675
2676 if (optimize && !flag_no_peephole && !nopeepholes)
2677 {
2678 rtx next = peephole (insn);
2679 /* When peepholing, if there were notes within the peephole,
2680 emit them before the peephole. */
2681 if (next != 0 && next != NEXT_INSN (insn))
2682 {
2683 rtx prev = PREV_INSN (insn);
2684
2685 for (note = NEXT_INSN (insn); note != next;
2686 note = NEXT_INSN (note))
2687 final_scan_insn (note, file, optimize, prescan, nopeepholes);
2688
2689 /* In case this is prescan, put the notes
2690 in proper position for later rescan. */
2691 note = NEXT_INSN (insn);
2692 PREV_INSN (note) = prev;
2693 NEXT_INSN (prev) = note;
2694 NEXT_INSN (PREV_INSN (next)) = insn;
2695 PREV_INSN (insn) = PREV_INSN (next);
2696 NEXT_INSN (insn) = next;
2697 PREV_INSN (next) = insn;
2698 }
2699
2700 /* PEEPHOLE might have changed this. */
2701 body = PATTERN (insn);
2702 }
2703#endif
2704
2705 /* Try to recognize the instruction.
2706 If successful, verify that the operands satisfy the
2707 constraints for the instruction. Crash if they don't,
2708 since `reload' should have changed them so that they do. */
2709
2710 insn_code_number = recog_memoized (insn);
2711 cleanup_subreg_operands (insn);
2712
|
2542 /* Dump the insn in the assembly for debugging. */
2543 if (flag_dump_rtl_in_asm)
2544 {
2545 print_rtx_head = ASM_COMMENT_START;
2546 print_rtl_single (asm_out_file, insn);
2547 print_rtx_head = "";
2548 }
| 2713 /* Dump the insn in the assembly for debugging. */
2714 if (flag_dump_rtl_in_asm)
2715 {
2716 print_rtx_head = ASM_COMMENT_START;
2717 print_rtl_single (asm_out_file, insn);
2718 print_rtx_head = "";
2719 }
|
2549
2550 if (! constrain_operands_cached (1))
2551 fatal_insn_not_found (insn);
2552
2553 /* Some target machines need to prescan each insn before
2554 it is output. */
2555
2556#ifdef FINAL_PRESCAN_INSN
2557 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2558#endif
2559
2560#ifdef HAVE_conditional_execution
2561 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2562 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2563 else
2564 current_insn_predicate = NULL_RTX;
2565#endif
2566
2567#ifdef HAVE_cc0
2568 cc_prev_status = cc_status;
2569
2570 /* Update `cc_status' for this instruction.
2571 The instruction's output routine may change it further.
2572 If the output routine for a jump insn needs to depend
2573 on the cc status, it should look at cc_prev_status. */
2574
2575 NOTICE_UPDATE_CC (body, insn);
2576#endif
2577
2578 current_output_insn = debug_insn = insn;
2579
2580#if defined (DWARF2_UNWIND_INFO)
2581 if (GET_CODE (insn) == CALL_INSN && dwarf2out_do_frame ())
2582 dwarf2out_frame_debug (insn);
2583#endif
2584
2585 /* Find the proper template for this insn. */
2586 template = get_insn_template (insn_code_number, insn);
2587
2588 /* If the C code returns 0, it means that it is a jump insn
2589 which follows a deleted test insn, and that test insn
2590 needs to be reinserted. */
2591 if (template == 0)
2592 {
2593 rtx prev;
2594
2595 if (prev_nonnote_insn (insn) != last_ignored_compare)
2596 abort ();
2597 new_block = 0;
2598
2599 /* We have already processed the notes between the setter and
2600 the user. Make sure we don't process them again, this is
2601 particularly important if one of the notes is a block
2602 scope note or an EH note. */
2603 for (prev = insn;
2604 prev != last_ignored_compare;
2605 prev = PREV_INSN (prev))
2606 {
2607 if (GET_CODE (prev) == NOTE)
2608 delete_insn (prev); /* Use delete_note. */
2609 }
2610
2611 return prev;
2612 }
2613
2614 /* If the template is the string "#", it means that this insn must
2615 be split. */
2616 if (template[0] == '#' && template[1] == '\0')
2617 {
2618 rtx new = try_split (body, insn, 0);
2619
2620 /* If we didn't split the insn, go away. */
2621 if (new == insn && PATTERN (new) == body)
2622 fatal_insn ("could not split insn", insn);
2623
2624#ifdef HAVE_ATTR_length
2625 /* This instruction should have been split in shorten_branches,
2626 to ensure that we would have valid length info for the
2627 splitees. */
2628 abort ();
2629#endif
2630
2631 new_block = 0;
2632 return new;
2633 }
2634
2635 if (prescan > 0)
2636 break;
2637
2638#ifdef IA64_UNWIND_INFO
2639 IA64_UNWIND_EMIT (asm_out_file, insn);
2640#endif
2641 /* Output assembler code from the template. */
2642
2643 output_asm_insn (template, recog_data.operand);
2644
2645#if defined (DWARF2_UNWIND_INFO)
2646#if defined (HAVE_prologue)
2647 if (GET_CODE (insn) == INSN && dwarf2out_do_frame ())
2648 dwarf2out_frame_debug (insn);
2649#else
2650 if (!ACCUMULATE_OUTGOING_ARGS
2651 && GET_CODE (insn) == INSN
2652 && dwarf2out_do_frame ())
2653 dwarf2out_frame_debug (insn);
2654#endif
2655#endif
2656
2657#if 0
2658 /* It's not at all clear why we did this and doing so interferes
2659 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2660 with this out. */
2661
2662 /* Mark this insn as having been output. */
2663 INSN_DELETED_P (insn) = 1;
2664#endif
2665
2666 /* Emit information for vtable gc. */
2667 note = find_reg_note (insn, REG_VTABLE_REF, NULL_RTX);
2668 if (note)
2669 assemble_vtable_entry (XEXP (XEXP (note, 0), 0),
2670 INTVAL (XEXP (XEXP (note, 0), 1)));
2671
2672 current_output_insn = debug_insn = 0;
2673 }
2674 }
2675 return NEXT_INSN (insn);
2676}
2677
2678/* Output debugging info to the assembler file FILE
2679 based on the NOTE-insn INSN, assumed to be a line number. */
2680
2681static void
2682notice_source_line (insn)
2683 rtx insn;
2684{
2685 const char *filename = NOTE_SOURCE_FILE (insn);
2686
2687 last_filename = filename;
2688 last_linenum = NOTE_LINE_NUMBER (insn);
2689 high_block_linenum = MAX (last_linenum, high_block_linenum);
2690 high_function_linenum = MAX (last_linenum, high_function_linenum);
2691}
2692
2693/* For each operand in INSN, simplify (subreg (reg)) so that it refers
2694 directly to the desired hard register. */
2695
2696void
2697cleanup_subreg_operands (insn)
2698 rtx insn;
2699{
2700 int i;
2701 extract_insn_cached (insn);
2702 for (i = 0; i < recog_data.n_operands; i++)
2703 {
2704 /* The following test cannot use recog_data.operand when tesing
2705 for a SUBREG: the underlying object might have been changed
2706 already if we are inside a match_operator expression that
2707 matches the else clause. Instead we test the underlying
2708 expression directly. */
2709 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2710 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2711 else if (GET_CODE (recog_data.operand[i]) == PLUS
2712 || GET_CODE (recog_data.operand[i]) == MULT
2713 || GET_CODE (recog_data.operand[i]) == MEM)
2714 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i]);
2715 }
2716
2717 for (i = 0; i < recog_data.n_dups; i++)
2718 {
2719 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2720 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2721 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2722 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2723 || GET_CODE (*recog_data.dup_loc[i]) == MEM)
2724 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]);
2725 }
2726}
2727
2728/* If X is a SUBREG, replace it with a REG or a MEM,
2729 based on the thing it is a subreg of. */
2730
2731rtx
2732alter_subreg (xp)
2733 rtx *xp;
2734{
2735 rtx x = *xp;
2736 rtx y = SUBREG_REG (x);
2737
2738 /* simplify_subreg does not remove subreg from volatile references.
2739 We are required to. */
2740 if (GET_CODE (y) == MEM)
2741 *xp = adjust_address (y, GET_MODE (x), SUBREG_BYTE (x));
2742 else
2743 {
2744 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2745 SUBREG_BYTE (x));
2746
2747 if (new != 0)
2748 *xp = new;
2749 /* Simplify_subreg can't handle some REG cases, but we have to. */
2750 else if (GET_CODE (y) == REG)
2751 {
2752 unsigned int regno = subreg_hard_regno (x, 1);
2753 PUT_CODE (x, REG);
2754 REGNO (x) = regno;
2755 ORIGINAL_REGNO (x) = ORIGINAL_REGNO (y);
2756 /* This field has a different meaning for REGs and SUBREGs. Make
2757 sure to clear it! */
| 2720
2721 if (! constrain_operands_cached (1))
2722 fatal_insn_not_found (insn);
2723
2724 /* Some target machines need to prescan each insn before
2725 it is output. */
2726
2727#ifdef FINAL_PRESCAN_INSN
2728 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2729#endif
2730
2731#ifdef HAVE_conditional_execution
2732 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2733 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2734 else
2735 current_insn_predicate = NULL_RTX;
2736#endif
2737
2738#ifdef HAVE_cc0
2739 cc_prev_status = cc_status;
2740
2741 /* Update `cc_status' for this instruction.
2742 The instruction's output routine may change it further.
2743 If the output routine for a jump insn needs to depend
2744 on the cc status, it should look at cc_prev_status. */
2745
2746 NOTICE_UPDATE_CC (body, insn);
2747#endif
2748
2749 current_output_insn = debug_insn = insn;
2750
2751#if defined (DWARF2_UNWIND_INFO)
2752 if (GET_CODE (insn) == CALL_INSN && dwarf2out_do_frame ())
2753 dwarf2out_frame_debug (insn);
2754#endif
2755
2756 /* Find the proper template for this insn. */
2757 template = get_insn_template (insn_code_number, insn);
2758
2759 /* If the C code returns 0, it means that it is a jump insn
2760 which follows a deleted test insn, and that test insn
2761 needs to be reinserted. */
2762 if (template == 0)
2763 {
2764 rtx prev;
2765
2766 if (prev_nonnote_insn (insn) != last_ignored_compare)
2767 abort ();
2768 new_block = 0;
2769
2770 /* We have already processed the notes between the setter and
2771 the user. Make sure we don't process them again, this is
2772 particularly important if one of the notes is a block
2773 scope note or an EH note. */
2774 for (prev = insn;
2775 prev != last_ignored_compare;
2776 prev = PREV_INSN (prev))
2777 {
2778 if (GET_CODE (prev) == NOTE)
2779 delete_insn (prev); /* Use delete_note. */
2780 }
2781
2782 return prev;
2783 }
2784
2785 /* If the template is the string "#", it means that this insn must
2786 be split. */
2787 if (template[0] == '#' && template[1] == '\0')
2788 {
2789 rtx new = try_split (body, insn, 0);
2790
2791 /* If we didn't split the insn, go away. */
2792 if (new == insn && PATTERN (new) == body)
2793 fatal_insn ("could not split insn", insn);
2794
2795#ifdef HAVE_ATTR_length
2796 /* This instruction should have been split in shorten_branches,
2797 to ensure that we would have valid length info for the
2798 splitees. */
2799 abort ();
2800#endif
2801
2802 new_block = 0;
2803 return new;
2804 }
2805
2806 if (prescan > 0)
2807 break;
2808
2809#ifdef IA64_UNWIND_INFO
2810 IA64_UNWIND_EMIT (asm_out_file, insn);
2811#endif
2812 /* Output assembler code from the template. */
2813
2814 output_asm_insn (template, recog_data.operand);
2815
2816#if defined (DWARF2_UNWIND_INFO)
2817#if defined (HAVE_prologue)
2818 if (GET_CODE (insn) == INSN && dwarf2out_do_frame ())
2819 dwarf2out_frame_debug (insn);
2820#else
2821 if (!ACCUMULATE_OUTGOING_ARGS
2822 && GET_CODE (insn) == INSN
2823 && dwarf2out_do_frame ())
2824 dwarf2out_frame_debug (insn);
2825#endif
2826#endif
2827
2828#if 0
2829 /* It's not at all clear why we did this and doing so interferes
2830 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2831 with this out. */
2832
2833 /* Mark this insn as having been output. */
2834 INSN_DELETED_P (insn) = 1;
2835#endif
2836
2837 /* Emit information for vtable gc. */
2838 note = find_reg_note (insn, REG_VTABLE_REF, NULL_RTX);
2839 if (note)
2840 assemble_vtable_entry (XEXP (XEXP (note, 0), 0),
2841 INTVAL (XEXP (XEXP (note, 0), 1)));
2842
2843 current_output_insn = debug_insn = 0;
2844 }
2845 }
2846 return NEXT_INSN (insn);
2847}
2848
2849/* Output debugging info to the assembler file FILE
2850 based on the NOTE-insn INSN, assumed to be a line number. */
2851
2852static void
2853notice_source_line (insn)
2854 rtx insn;
2855{
2856 const char *filename = NOTE_SOURCE_FILE (insn);
2857
2858 last_filename = filename;
2859 last_linenum = NOTE_LINE_NUMBER (insn);
2860 high_block_linenum = MAX (last_linenum, high_block_linenum);
2861 high_function_linenum = MAX (last_linenum, high_function_linenum);
2862}
2863
2864/* For each operand in INSN, simplify (subreg (reg)) so that it refers
2865 directly to the desired hard register. */
2866
2867void
2868cleanup_subreg_operands (insn)
2869 rtx insn;
2870{
2871 int i;
2872 extract_insn_cached (insn);
2873 for (i = 0; i < recog_data.n_operands; i++)
2874 {
2875 /* The following test cannot use recog_data.operand when tesing
2876 for a SUBREG: the underlying object might have been changed
2877 already if we are inside a match_operator expression that
2878 matches the else clause. Instead we test the underlying
2879 expression directly. */
2880 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2881 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2882 else if (GET_CODE (recog_data.operand[i]) == PLUS
2883 || GET_CODE (recog_data.operand[i]) == MULT
2884 || GET_CODE (recog_data.operand[i]) == MEM)
2885 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i]);
2886 }
2887
2888 for (i = 0; i < recog_data.n_dups; i++)
2889 {
2890 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2891 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2892 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2893 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2894 || GET_CODE (*recog_data.dup_loc[i]) == MEM)
2895 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]);
2896 }
2897}
2898
2899/* If X is a SUBREG, replace it with a REG or a MEM,
2900 based on the thing it is a subreg of. */
2901
2902rtx
2903alter_subreg (xp)
2904 rtx *xp;
2905{
2906 rtx x = *xp;
2907 rtx y = SUBREG_REG (x);
2908
2909 /* simplify_subreg does not remove subreg from volatile references.
2910 We are required to. */
2911 if (GET_CODE (y) == MEM)
2912 *xp = adjust_address (y, GET_MODE (x), SUBREG_BYTE (x));
2913 else
2914 {
2915 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2916 SUBREG_BYTE (x));
2917
2918 if (new != 0)
2919 *xp = new;
2920 /* Simplify_subreg can't handle some REG cases, but we have to. */
2921 else if (GET_CODE (y) == REG)
2922 {
2923 unsigned int regno = subreg_hard_regno (x, 1);
2924 PUT_CODE (x, REG);
2925 REGNO (x) = regno;
2926 ORIGINAL_REGNO (x) = ORIGINAL_REGNO (y);
2927 /* This field has a different meaning for REGs and SUBREGs. Make
2928 sure to clear it! */
|
2758 x->used = 0;
| 2929 RTX_FLAG (x, used) = 0;
|
2759 }
2760 else
2761 abort ();
2762 }
2763
2764 return *xp;
2765}
2766
2767/* Do alter_subreg on all the SUBREGs contained in X. */
2768
2769static rtx
2770walk_alter_subreg (xp)
2771 rtx *xp;
2772{
2773 rtx x = *xp;
2774 switch (GET_CODE (x))
2775 {
2776 case PLUS:
2777 case MULT:
2778 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2779 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1));
2780 break;
2781
2782 case MEM:
2783 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2784 break;
2785
2786 case SUBREG:
2787 return alter_subreg (xp);
2788
2789 default:
2790 break;
2791 }
2792
2793 return *xp;
2794}
2795
2796#ifdef HAVE_cc0
2797
2798/* Given BODY, the body of a jump instruction, alter the jump condition
2799 as required by the bits that are set in cc_status.flags.
2800 Not all of the bits there can be handled at this level in all cases.
2801
2802 The value is normally 0.
2803 1 means that the condition has become always true.
2804 -1 means that the condition has become always false.
2805 2 means that COND has been altered. */
2806
2807static int
2808alter_cond (cond)
2809 rtx cond;
2810{
2811 int value = 0;
2812
2813 if (cc_status.flags & CC_REVERSED)
2814 {
2815 value = 2;
2816 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2817 }
2818
2819 if (cc_status.flags & CC_INVERTED)
2820 {
2821 value = 2;
2822 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2823 }
2824
2825 if (cc_status.flags & CC_NOT_POSITIVE)
2826 switch (GET_CODE (cond))
2827 {
2828 case LE:
2829 case LEU:
2830 case GEU:
2831 /* Jump becomes unconditional. */
2832 return 1;
2833
2834 case GT:
2835 case GTU:
2836 case LTU:
2837 /* Jump becomes no-op. */
2838 return -1;
2839
2840 case GE:
2841 PUT_CODE (cond, EQ);
2842 value = 2;
2843 break;
2844
2845 case LT:
2846 PUT_CODE (cond, NE);
2847 value = 2;
2848 break;
2849
2850 default:
2851 break;
2852 }
2853
2854 if (cc_status.flags & CC_NOT_NEGATIVE)
2855 switch (GET_CODE (cond))
2856 {
2857 case GE:
2858 case GEU:
2859 /* Jump becomes unconditional. */
2860 return 1;
2861
2862 case LT:
2863 case LTU:
2864 /* Jump becomes no-op. */
2865 return -1;
2866
2867 case LE:
2868 case LEU:
2869 PUT_CODE (cond, EQ);
2870 value = 2;
2871 break;
2872
2873 case GT:
2874 case GTU:
2875 PUT_CODE (cond, NE);
2876 value = 2;
2877 break;
2878
2879 default:
2880 break;
2881 }
2882
2883 if (cc_status.flags & CC_NO_OVERFLOW)
2884 switch (GET_CODE (cond))
2885 {
2886 case GEU:
2887 /* Jump becomes unconditional. */
2888 return 1;
2889
2890 case LEU:
2891 PUT_CODE (cond, EQ);
2892 value = 2;
2893 break;
2894
2895 case GTU:
2896 PUT_CODE (cond, NE);
2897 value = 2;
2898 break;
2899
2900 case LTU:
2901 /* Jump becomes no-op. */
2902 return -1;
2903
2904 default:
2905 break;
2906 }
2907
2908 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
2909 switch (GET_CODE (cond))
2910 {
2911 default:
2912 abort ();
2913
2914 case NE:
2915 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
2916 value = 2;
2917 break;
2918
2919 case EQ:
2920 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
2921 value = 2;
2922 break;
2923 }
2924
2925 if (cc_status.flags & CC_NOT_SIGNED)
2926 /* The flags are valid if signed condition operators are converted
2927 to unsigned. */
2928 switch (GET_CODE (cond))
2929 {
2930 case LE:
2931 PUT_CODE (cond, LEU);
2932 value = 2;
2933 break;
2934
2935 case LT:
2936 PUT_CODE (cond, LTU);
2937 value = 2;
2938 break;
2939
2940 case GT:
2941 PUT_CODE (cond, GTU);
2942 value = 2;
2943 break;
2944
2945 case GE:
2946 PUT_CODE (cond, GEU);
2947 value = 2;
2948 break;
2949
2950 default:
2951 break;
2952 }
2953
2954 return value;
2955}
2956#endif
2957
2958/* Report inconsistency between the assembler template and the operands.
2959 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2960
2961void
2962output_operand_lossage VPARAMS ((const char *msgid, ...))
2963{
2964 char *fmt_string;
2965 char *new_message;
2966 const char *pfx_str;
2967 VA_OPEN (ap, msgid);
2968 VA_FIXEDARG (ap, const char *, msgid);
2969
2970 pfx_str = this_is_asm_operands ? _("invalid `asm': ") : "output_operand: ";
2971 asprintf (&fmt_string, "%s%s", pfx_str, _(msgid));
2972 vasprintf (&new_message, fmt_string, ap);
| 2930 }
2931 else
2932 abort ();
2933 }
2934
2935 return *xp;
2936}
2937
2938/* Do alter_subreg on all the SUBREGs contained in X. */
2939
2940static rtx
2941walk_alter_subreg (xp)
2942 rtx *xp;
2943{
2944 rtx x = *xp;
2945 switch (GET_CODE (x))
2946 {
2947 case PLUS:
2948 case MULT:
2949 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2950 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1));
2951 break;
2952
2953 case MEM:
2954 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2955 break;
2956
2957 case SUBREG:
2958 return alter_subreg (xp);
2959
2960 default:
2961 break;
2962 }
2963
2964 return *xp;
2965}
2966
2967#ifdef HAVE_cc0
2968
2969/* Given BODY, the body of a jump instruction, alter the jump condition
2970 as required by the bits that are set in cc_status.flags.
2971 Not all of the bits there can be handled at this level in all cases.
2972
2973 The value is normally 0.
2974 1 means that the condition has become always true.
2975 -1 means that the condition has become always false.
2976 2 means that COND has been altered. */
2977
2978static int
2979alter_cond (cond)
2980 rtx cond;
2981{
2982 int value = 0;
2983
2984 if (cc_status.flags & CC_REVERSED)
2985 {
2986 value = 2;
2987 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2988 }
2989
2990 if (cc_status.flags & CC_INVERTED)
2991 {
2992 value = 2;
2993 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2994 }
2995
2996 if (cc_status.flags & CC_NOT_POSITIVE)
2997 switch (GET_CODE (cond))
2998 {
2999 case LE:
3000 case LEU:
3001 case GEU:
3002 /* Jump becomes unconditional. */
3003 return 1;
3004
3005 case GT:
3006 case GTU:
3007 case LTU:
3008 /* Jump becomes no-op. */
3009 return -1;
3010
3011 case GE:
3012 PUT_CODE (cond, EQ);
3013 value = 2;
3014 break;
3015
3016 case LT:
3017 PUT_CODE (cond, NE);
3018 value = 2;
3019 break;
3020
3021 default:
3022 break;
3023 }
3024
3025 if (cc_status.flags & CC_NOT_NEGATIVE)
3026 switch (GET_CODE (cond))
3027 {
3028 case GE:
3029 case GEU:
3030 /* Jump becomes unconditional. */
3031 return 1;
3032
3033 case LT:
3034 case LTU:
3035 /* Jump becomes no-op. */
3036 return -1;
3037
3038 case LE:
3039 case LEU:
3040 PUT_CODE (cond, EQ);
3041 value = 2;
3042 break;
3043
3044 case GT:
3045 case GTU:
3046 PUT_CODE (cond, NE);
3047 value = 2;
3048 break;
3049
3050 default:
3051 break;
3052 }
3053
3054 if (cc_status.flags & CC_NO_OVERFLOW)
3055 switch (GET_CODE (cond))
3056 {
3057 case GEU:
3058 /* Jump becomes unconditional. */
3059 return 1;
3060
3061 case LEU:
3062 PUT_CODE (cond, EQ);
3063 value = 2;
3064 break;
3065
3066 case GTU:
3067 PUT_CODE (cond, NE);
3068 value = 2;
3069 break;
3070
3071 case LTU:
3072 /* Jump becomes no-op. */
3073 return -1;
3074
3075 default:
3076 break;
3077 }
3078
3079 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3080 switch (GET_CODE (cond))
3081 {
3082 default:
3083 abort ();
3084
3085 case NE:
3086 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3087 value = 2;
3088 break;
3089
3090 case EQ:
3091 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3092 value = 2;
3093 break;
3094 }
3095
3096 if (cc_status.flags & CC_NOT_SIGNED)
3097 /* The flags are valid if signed condition operators are converted
3098 to unsigned. */
3099 switch (GET_CODE (cond))
3100 {
3101 case LE:
3102 PUT_CODE (cond, LEU);
3103 value = 2;
3104 break;
3105
3106 case LT:
3107 PUT_CODE (cond, LTU);
3108 value = 2;
3109 break;
3110
3111 case GT:
3112 PUT_CODE (cond, GTU);
3113 value = 2;
3114 break;
3115
3116 case GE:
3117 PUT_CODE (cond, GEU);
3118 value = 2;
3119 break;
3120
3121 default:
3122 break;
3123 }
3124
3125 return value;
3126}
3127#endif
3128
3129/* Report inconsistency between the assembler template and the operands.
3130 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3131
3132void
3133output_operand_lossage VPARAMS ((const char *msgid, ...))
3134{
3135 char *fmt_string;
3136 char *new_message;
3137 const char *pfx_str;
3138 VA_OPEN (ap, msgid);
3139 VA_FIXEDARG (ap, const char *, msgid);
3140
3141 pfx_str = this_is_asm_operands ? _("invalid `asm': ") : "output_operand: ";
3142 asprintf (&fmt_string, "%s%s", pfx_str, _(msgid));
3143 vasprintf (&new_message, fmt_string, ap);
|
2973
| 3144
|
2974 if (this_is_asm_operands)
2975 error_for_asm (this_is_asm_operands, "%s", new_message);
2976 else
2977 internal_error ("%s", new_message);
2978
2979 free (fmt_string);
2980 free (new_message);
2981 VA_CLOSE (ap);
2982}
2983
2984/* Output of assembler code from a template, and its subroutines. */
2985
2986/* Annotate the assembly with a comment describing the pattern and
2987 alternative used. */
2988
2989static void
2990output_asm_name ()
2991{
2992 if (debug_insn)
2993 {
2994 int num = INSN_CODE (debug_insn);
2995 fprintf (asm_out_file, "\t%s %d\t%s",
2996 ASM_COMMENT_START, INSN_UID (debug_insn),
2997 insn_data[num].name);
2998 if (insn_data[num].n_alternatives > 1)
2999 fprintf (asm_out_file, "/%d", which_alternative + 1);
3000#ifdef HAVE_ATTR_length
3001 fprintf (asm_out_file, "\t[length = %d]",
3002 get_attr_length (debug_insn));
3003#endif
3004 /* Clear this so only the first assembler insn
3005 of any rtl insn will get the special comment for -dp. */
3006 debug_insn = 0;
3007 }
3008}
3009
3010/* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3011 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3012 corresponds to the address of the object and 0 if to the object. */
3013
3014static tree
3015get_mem_expr_from_op (op, paddressp)
3016 rtx op;
3017 int *paddressp;
3018{
3019 tree expr;
3020 int inner_addressp;
3021
3022 *paddressp = 0;
3023
3024 if (op == NULL)
3025 return 0;
3026
3027 if (GET_CODE (op) == REG && ORIGINAL_REGNO (op) >= FIRST_PSEUDO_REGISTER)
3028 return REGNO_DECL (ORIGINAL_REGNO (op));
3029 else if (GET_CODE (op) != MEM)
3030 return 0;
3031
3032 if (MEM_EXPR (op) != 0)
3033 return MEM_EXPR (op);
3034
3035 /* Otherwise we have an address, so indicate it and look at the address. */
3036 *paddressp = 1;
3037 op = XEXP (op, 0);
3038
3039 /* First check if we have a decl for the address, then look at the right side
3040 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3041 But don't allow the address to itself be indirect. */
3042 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3043 return expr;
3044 else if (GET_CODE (op) == PLUS
3045 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3046 return expr;
3047
3048 while (GET_RTX_CLASS (GET_CODE (op)) == '1'
3049 || GET_RTX_CLASS (GET_CODE (op)) == '2')
3050 op = XEXP (op, 0);
3051
3052 expr = get_mem_expr_from_op (op, &inner_addressp);
3053 return inner_addressp ? 0 : expr;
3054}
3055
3056/* Output operand names for assembler instructions. OPERANDS is the
3057 operand vector, OPORDER is the order to write the operands, and NOPS
3058 is the number of operands to write. */
3059
3060static void
3061output_asm_operand_names (operands, oporder, nops)
3062 rtx *operands;
3063 int *oporder;
3064 int nops;
3065{
3066 int wrote = 0;
3067 int i;
3068
3069 for (i = 0; i < nops; i++)
3070 {
3071 int addressp;
3072 tree expr = get_mem_expr_from_op (operands[oporder[i]], &addressp);
3073
3074 if (expr)
3075 {
3076 fprintf (asm_out_file, "%c%s %s",
3077 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START,
3078 addressp ? "*" : "");
3079 print_mem_expr (asm_out_file, expr);
3080 wrote = 1;
3081 }
3082 }
3083}
3084
3085/* Output text from TEMPLATE to the assembler output file,
3086 obeying %-directions to substitute operands taken from
3087 the vector OPERANDS.
3088
3089 %N (for N a digit) means print operand N in usual manner.
3090 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3091 and print the label name with no punctuation.
3092 %cN means require operand N to be a constant
3093 and print the constant expression with no punctuation.
3094 %aN means expect operand N to be a memory address
3095 (not a memory reference!) and print a reference
3096 to that address.
3097 %nN means expect operand N to be a constant
3098 and print a constant expression for minus the value
3099 of the operand, with no other punctuation. */
3100
3101void
3102output_asm_insn (template, operands)
3103 const char *template;
3104 rtx *operands;
3105{
3106 const char *p;
3107 int c;
3108#ifdef ASSEMBLER_DIALECT
3109 int dialect = 0;
3110#endif
3111 int oporder[MAX_RECOG_OPERANDS];
3112 char opoutput[MAX_RECOG_OPERANDS];
3113 int ops = 0;
3114
3115 /* An insn may return a null string template
3116 in a case where no assembler code is needed. */
3117 if (*template == 0)
3118 return;
3119
3120 memset (opoutput, 0, sizeof opoutput);
3121 p = template;
3122 putc ('\t', asm_out_file);
3123
3124#ifdef ASM_OUTPUT_OPCODE
3125 ASM_OUTPUT_OPCODE (asm_out_file, p);
3126#endif
3127
3128 while ((c = *p++))
3129 switch (c)
3130 {
3131 case '\n':
3132 if (flag_verbose_asm)
3133 output_asm_operand_names (operands, oporder, ops);
3134 if (flag_print_asm_name)
3135 output_asm_name ();
3136
3137 ops = 0;
3138 memset (opoutput, 0, sizeof opoutput);
3139
3140 putc (c, asm_out_file);
3141#ifdef ASM_OUTPUT_OPCODE
3142 while ((c = *p) == '\t')
3143 {
3144 putc (c, asm_out_file);
3145 p++;
3146 }
3147 ASM_OUTPUT_OPCODE (asm_out_file, p);
3148#endif
3149 break;
3150
3151#ifdef ASSEMBLER_DIALECT
3152 case '{':
3153 {
3154 int i;
3155
3156 if (dialect)
3157 output_operand_lossage ("nested assembly dialect alternatives");
3158 else
3159 dialect = 1;
3160
3161 /* If we want the first dialect, do nothing. Otherwise, skip
3162 DIALECT_NUMBER of strings ending with '|'. */
3163 for (i = 0; i < dialect_number; i++)
3164 {
3165 while (*p && *p != '}' && *p++ != '|')
3166 ;
3167 if (*p == '}')
3168 break;
3169 if (*p == '|')
3170 p++;
3171 }
3172
3173 if (*p == '\0')
3174 output_operand_lossage ("unterminated assembly dialect alternative");
3175 }
3176 break;
3177
3178 case '|':
3179 if (dialect)
3180 {
3181 /* Skip to close brace. */
3182 do
3183 {
3184 if (*p == '\0')
3185 {
3186 output_operand_lossage ("unterminated assembly dialect alternative");
3187 break;
3188 }
3189 }
3190 while (*p++ != '}');
3191 dialect = 0;
3192 }
3193 else
3194 putc (c, asm_out_file);
3195 break;
3196
3197 case '}':
3198 if (! dialect)
3199 putc (c, asm_out_file);
3200 dialect = 0;
3201 break;
3202#endif
3203
3204 case '%':
3205 /* %% outputs a single %. */
3206 if (*p == '%')
3207 {
3208 p++;
3209 putc (c, asm_out_file);
3210 }
3211 /* %= outputs a number which is unique to each insn in the entire
3212 compilation. This is useful for making local labels that are
3213 referred to more than once in a given insn. */
3214 else if (*p == '=')
3215 {
3216 p++;
3217 fprintf (asm_out_file, "%d", insn_counter);
3218 }
3219 /* % followed by a letter and some digits
3220 outputs an operand in a special way depending on the letter.
3221 Letters `acln' are implemented directly.
3222 Other letters are passed to `output_operand' so that
3223 the PRINT_OPERAND macro can define them. */
3224 else if (ISALPHA (*p))
3225 {
3226 int letter = *p++;
3227 c = atoi (p);
3228
3229 if (! ISDIGIT (*p))
3230 output_operand_lossage ("operand number missing after %%-letter");
3231 else if (this_is_asm_operands
3232 && (c < 0 || (unsigned int) c >= insn_noperands))
3233 output_operand_lossage ("operand number out of range");
3234 else if (letter == 'l')
3235 output_asm_label (operands[c]);
3236 else if (letter == 'a')
3237 output_address (operands[c]);
3238 else if (letter == 'c')
3239 {
3240 if (CONSTANT_ADDRESS_P (operands[c]))
3241 output_addr_const (asm_out_file, operands[c]);
3242 else
3243 output_operand (operands[c], 'c');
3244 }
3245 else if (letter == 'n')
3246 {
3247 if (GET_CODE (operands[c]) == CONST_INT)
3248 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3249 - INTVAL (operands[c]));
3250 else
3251 {
3252 putc ('-', asm_out_file);
3253 output_addr_const (asm_out_file, operands[c]);
3254 }
3255 }
3256 else
3257 output_operand (operands[c], letter);
3258
3259 if (!opoutput[c])
3260 oporder[ops++] = c;
3261 opoutput[c] = 1;
3262
3263 while (ISDIGIT (c = *p))
3264 p++;
3265 }
3266 /* % followed by a digit outputs an operand the default way. */
3267 else if (ISDIGIT (*p))
3268 {
3269 c = atoi (p);
3270 if (this_is_asm_operands
3271 && (c < 0 || (unsigned int) c >= insn_noperands))
3272 output_operand_lossage ("operand number out of range");
3273 else
3274 output_operand (operands[c], 0);
3275
3276 if (!opoutput[c])
3277 oporder[ops++] = c;
3278 opoutput[c] = 1;
3279
3280 while (ISDIGIT (c = *p))
3281 p++;
3282 }
3283 /* % followed by punctuation: output something for that
3284 punctuation character alone, with no operand.
3285 The PRINT_OPERAND macro decides what is actually done. */
3286#ifdef PRINT_OPERAND_PUNCT_VALID_P
3287 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3288 output_operand (NULL_RTX, *p++);
3289#endif
3290 else
3291 output_operand_lossage ("invalid %%-code");
3292 break;
3293
3294 default:
3295 putc (c, asm_out_file);
3296 }
3297
3298 /* Write out the variable names for operands, if we know them. */
3299 if (flag_verbose_asm)
3300 output_asm_operand_names (operands, oporder, ops);
3301 if (flag_print_asm_name)
3302 output_asm_name ();
3303
3304 putc ('\n', asm_out_file);
3305}
3306
3307/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3308
3309void
3310output_asm_label (x)
3311 rtx x;
3312{
3313 char buf[256];
3314
3315 if (GET_CODE (x) == LABEL_REF)
3316 x = XEXP (x, 0);
3317 if (GET_CODE (x) == CODE_LABEL
3318 || (GET_CODE (x) == NOTE
3319 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
3320 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3321 else
3322 output_operand_lossage ("`%%l' operand isn't a label");
3323
3324 assemble_name (asm_out_file, buf);
3325}
3326
3327/* Print operand X using machine-dependent assembler syntax.
3328 The macro PRINT_OPERAND is defined just to control this function.
3329 CODE is a non-digit that preceded the operand-number in the % spec,
3330 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3331 between the % and the digits.
3332 When CODE is a non-letter, X is 0.
3333
3334 The meanings of the letters are machine-dependent and controlled
3335 by PRINT_OPERAND. */
3336
3337static void
3338output_operand (x, code)
3339 rtx x;
3340 int code ATTRIBUTE_UNUSED;
3341{
3342 if (x && GET_CODE (x) == SUBREG)
3343 x = alter_subreg (&x);
3344
3345 /* If X is a pseudo-register, abort now rather than writing trash to the
3346 assembler file. */
3347
3348 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER)
3349 abort ();
3350
3351 PRINT_OPERAND (asm_out_file, x, code);
3352}
3353
3354/* Print a memory reference operand for address X
3355 using machine-dependent assembler syntax.
3356 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3357
3358void
3359output_address (x)
3360 rtx x;
3361{
3362 walk_alter_subreg (&x);
3363 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3364}
3365
3366/* Print an integer constant expression in assembler syntax.
3367 Addition and subtraction are the only arithmetic
3368 that may appear in these expressions. */
3369
3370void
3371output_addr_const (file, x)
3372 FILE *file;
3373 rtx x;
3374{
3375 char buf[256];
3376
3377 restart:
3378 switch (GET_CODE (x))
3379 {
3380 case PC:
3381 putc ('.', file);
3382 break;
3383
3384 case SYMBOL_REF:
3385#ifdef ASM_OUTPUT_SYMBOL_REF
3386 ASM_OUTPUT_SYMBOL_REF (file, x);
3387#else
3388 assemble_name (file, XSTR (x, 0));
3389#endif
3390 break;
3391
3392 case LABEL_REF:
3393 x = XEXP (x, 0);
3394 /* Fall through. */
3395 case CODE_LABEL:
3396 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3397#ifdef ASM_OUTPUT_LABEL_REF
3398 ASM_OUTPUT_LABEL_REF (file, buf);
3399#else
3400 assemble_name (file, buf);
3401#endif
3402 break;
3403
3404 case CONST_INT:
3405 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3406 break;
3407
3408 case CONST:
3409 /* This used to output parentheses around the expression,
3410 but that does not work on the 386 (either ATT or BSD assembler). */
3411 output_addr_const (file, XEXP (x, 0));
3412 break;
3413
3414 case CONST_DOUBLE:
3415 if (GET_MODE (x) == VOIDmode)
3416 {
3417 /* We can use %d if the number is one word and positive. */
3418 if (CONST_DOUBLE_HIGH (x))
3419 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3420 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3421 else if (CONST_DOUBLE_LOW (x) < 0)
3422 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3423 else
3424 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3425 }
3426 else
3427 /* We can't handle floating point constants;
3428 PRINT_OPERAND must handle them. */
3429 output_operand_lossage ("floating constant misused");
3430 break;
3431
3432 case PLUS:
3433 /* Some assemblers need integer constants to appear last (eg masm). */
3434 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3435 {
3436 output_addr_const (file, XEXP (x, 1));
3437 if (INTVAL (XEXP (x, 0)) >= 0)
3438 fprintf (file, "+");
3439 output_addr_const (file, XEXP (x, 0));
3440 }
3441 else
3442 {
3443 output_addr_const (file, XEXP (x, 0));
3444 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3445 || INTVAL (XEXP (x, 1)) >= 0)
3446 fprintf (file, "+");
3447 output_addr_const (file, XEXP (x, 1));
3448 }
3449 break;
3450
3451 case MINUS:
3452 /* Avoid outputting things like x-x or x+5-x,
3453 since some assemblers can't handle that. */
3454 x = simplify_subtraction (x);
3455 if (GET_CODE (x) != MINUS)
3456 goto restart;
3457
3458 output_addr_const (file, XEXP (x, 0));
3459 fprintf (file, "-");
3460 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0)
3461 || GET_CODE (XEXP (x, 1)) == PC
3462 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3463 output_addr_const (file, XEXP (x, 1));
3464 else
3465 {
3466 fputs (targetm.asm_out.open_paren, file);
3467 output_addr_const (file, XEXP (x, 1));
3468 fputs (targetm.asm_out.close_paren, file);
3469 }
3470 break;
3471
3472 case ZERO_EXTEND:
3473 case SIGN_EXTEND:
3474 case SUBREG:
3475 output_addr_const (file, XEXP (x, 0));
3476 break;
3477
3478 default:
3479#ifdef OUTPUT_ADDR_CONST_EXTRA
3480 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3481 break;
3482
3483 fail:
3484#endif
3485 output_operand_lossage ("invalid expression as operand");
3486 }
3487}
3488
3489/* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3490 %R prints the value of REGISTER_PREFIX.
3491 %L prints the value of LOCAL_LABEL_PREFIX.
3492 %U prints the value of USER_LABEL_PREFIX.
3493 %I prints the value of IMMEDIATE_PREFIX.
3494 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3495 Also supported are %d, %x, %s, %e, %f, %g and %%.
3496
3497 We handle alternate assembler dialects here, just like output_asm_insn. */
3498
3499void
3500asm_fprintf VPARAMS ((FILE *file, const char *p, ...))
3501{
3502 char buf[10];
3503 char *q, c;
3504
3505 VA_OPEN (argptr, p);
3506 VA_FIXEDARG (argptr, FILE *, file);
3507 VA_FIXEDARG (argptr, const char *, p);
3508
3509 buf[0] = '%';
3510
3511 while ((c = *p++))
3512 switch (c)
3513 {
3514#ifdef ASSEMBLER_DIALECT
3515 case '{':
3516 {
3517 int i;
3518
3519 /* If we want the first dialect, do nothing. Otherwise, skip
3520 DIALECT_NUMBER of strings ending with '|'. */
3521 for (i = 0; i < dialect_number; i++)
3522 {
3523 while (*p && *p++ != '|')
3524 ;
3525
3526 if (*p == '|')
3527 p++;
3528 }
3529 }
3530 break;
3531
3532 case '|':
3533 /* Skip to close brace. */
3534 while (*p && *p++ != '}')
3535 ;
3536 break;
3537
3538 case '}':
3539 break;
3540#endif
3541
3542 case '%':
3543 c = *p++;
3544 q = &buf[1];
3545 while (ISDIGIT (c) || c == '.')
3546 {
3547 *q++ = c;
3548 c = *p++;
3549 }
3550 switch (c)
3551 {
3552 case '%':
3553 fprintf (file, "%%");
3554 break;
3555
3556 case 'd': case 'i': case 'u':
3557 case 'x': case 'p': case 'X':
3558 case 'o':
3559 *q++ = c;
3560 *q = 0;
3561 fprintf (file, buf, va_arg (argptr, int));
3562 break;
3563
3564 case 'w':
3565 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3566 but we do not check for those cases. It means that the value
3567 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3568
3569#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3570#else
3571#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3572 *q++ = 'l';
3573#else
3574 *q++ = 'l';
3575 *q++ = 'l';
3576#endif
3577#endif
3578
3579 *q++ = *p++;
3580 *q = 0;
3581 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3582 break;
3583
3584 case 'l':
3585 *q++ = c;
3586 *q++ = *p++;
3587 *q = 0;
3588 fprintf (file, buf, va_arg (argptr, long));
3589 break;
3590
3591 case 'e':
3592 case 'f':
3593 case 'g':
3594 *q++ = c;
3595 *q = 0;
3596 fprintf (file, buf, va_arg (argptr, double));
3597 break;
3598
3599 case 's':
3600 *q++ = c;
3601 *q = 0;
3602 fprintf (file, buf, va_arg (argptr, char *));
3603 break;
3604
3605 case 'O':
3606#ifdef ASM_OUTPUT_OPCODE
3607 ASM_OUTPUT_OPCODE (asm_out_file, p);
3608#endif
3609 break;
3610
3611 case 'R':
3612#ifdef REGISTER_PREFIX
3613 fprintf (file, "%s", REGISTER_PREFIX);
3614#endif
3615 break;
3616
3617 case 'I':
3618#ifdef IMMEDIATE_PREFIX
3619 fprintf (file, "%s", IMMEDIATE_PREFIX);
3620#endif
3621 break;
3622
3623 case 'L':
3624#ifdef LOCAL_LABEL_PREFIX
3625 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3626#endif
3627 break;
3628
3629 case 'U':
3630 fputs (user_label_prefix, file);
3631 break;
3632
3633#ifdef ASM_FPRINTF_EXTENSIONS
3634 /* Upper case letters are reserved for general use by asm_fprintf
3635 and so are not available to target specific code. In order to
3636 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3637 they are defined here. As they get turned into real extensions
3638 to asm_fprintf they should be removed from this list. */
3639 case 'A': case 'B': case 'C': case 'D': case 'E':
3640 case 'F': case 'G': case 'H': case 'J': case 'K':
3641 case 'M': case 'N': case 'P': case 'Q': case 'S':
3642 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3643 break;
3644
3645 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3646#endif
3647 default:
3648 abort ();
3649 }
3650 break;
3651
3652 default:
3653 fputc (c, file);
3654 }
3655 VA_CLOSE (argptr);
3656}
3657
3658/* Split up a CONST_DOUBLE or integer constant rtx
3659 into two rtx's for single words,
3660 storing in *FIRST the word that comes first in memory in the target
3661 and in *SECOND the other. */
3662
3663void
3664split_double (value, first, second)
3665 rtx value;
3666 rtx *first, *second;
3667{
3668 if (GET_CODE (value) == CONST_INT)
3669 {
3670 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3671 {
3672 /* In this case the CONST_INT holds both target words.
3673 Extract the bits from it into two word-sized pieces.
3674 Sign extend each half to HOST_WIDE_INT. */
3675 unsigned HOST_WIDE_INT low, high;
3676 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3677
3678 /* Set sign_bit to the most significant bit of a word. */
3679 sign_bit = 1;
3680 sign_bit <<= BITS_PER_WORD - 1;
3681
3682 /* Set mask so that all bits of the word are set. We could
3683 have used 1 << BITS_PER_WORD instead of basing the
3684 calculation on sign_bit. However, on machines where
3685 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3686 compiler warning, even though the code would never be
3687 executed. */
3688 mask = sign_bit << 1;
3689 mask--;
3690
3691 /* Set sign_extend as any remaining bits. */
3692 sign_extend = ~mask;
3693
3694 /* Pick the lower word and sign-extend it. */
3695 low = INTVAL (value);
3696 low &= mask;
3697 if (low & sign_bit)
3698 low |= sign_extend;
3699
3700 /* Pick the higher word, shifted to the least significant
3701 bits, and sign-extend it. */
3702 high = INTVAL (value);
3703 high >>= BITS_PER_WORD - 1;
3704 high >>= 1;
3705 high &= mask;
3706 if (high & sign_bit)
3707 high |= sign_extend;
3708
3709 /* Store the words in the target machine order. */
3710 if (WORDS_BIG_ENDIAN)
3711 {
3712 *first = GEN_INT (high);
3713 *second = GEN_INT (low);
3714 }
3715 else
3716 {
3717 *first = GEN_INT (low);
3718 *second = GEN_INT (high);
3719 }
3720 }
3721 else
3722 {
3723 /* The rule for using CONST_INT for a wider mode
3724 is that we regard the value as signed.
3725 So sign-extend it. */
3726 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3727 if (WORDS_BIG_ENDIAN)
3728 {
3729 *first = high;
3730 *second = value;
3731 }
3732 else
3733 {
3734 *first = value;
3735 *second = high;
3736 }
3737 }
3738 }
3739 else if (GET_CODE (value) != CONST_DOUBLE)
3740 {
3741 if (WORDS_BIG_ENDIAN)
3742 {
3743 *first = const0_rtx;
3744 *second = value;
3745 }
3746 else
3747 {
3748 *first = value;
3749 *second = const0_rtx;
3750 }
3751 }
3752 else if (GET_MODE (value) == VOIDmode
3753 /* This is the old way we did CONST_DOUBLE integers. */
3754 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3755 {
3756 /* In an integer, the words are defined as most and least significant.
3757 So order them by the target's convention. */
3758 if (WORDS_BIG_ENDIAN)
3759 {
3760 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3761 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3762 }
3763 else
3764 {
3765 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3766 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3767 }
3768 }
3769 else
3770 {
| 3145 if (this_is_asm_operands)
3146 error_for_asm (this_is_asm_operands, "%s", new_message);
3147 else
3148 internal_error ("%s", new_message);
3149
3150 free (fmt_string);
3151 free (new_message);
3152 VA_CLOSE (ap);
3153}
3154
3155/* Output of assembler code from a template, and its subroutines. */
3156
3157/* Annotate the assembly with a comment describing the pattern and
3158 alternative used. */
3159
3160static void
3161output_asm_name ()
3162{
3163 if (debug_insn)
3164 {
3165 int num = INSN_CODE (debug_insn);
3166 fprintf (asm_out_file, "\t%s %d\t%s",
3167 ASM_COMMENT_START, INSN_UID (debug_insn),
3168 insn_data[num].name);
3169 if (insn_data[num].n_alternatives > 1)
3170 fprintf (asm_out_file, "/%d", which_alternative + 1);
3171#ifdef HAVE_ATTR_length
3172 fprintf (asm_out_file, "\t[length = %d]",
3173 get_attr_length (debug_insn));
3174#endif
3175 /* Clear this so only the first assembler insn
3176 of any rtl insn will get the special comment for -dp. */
3177 debug_insn = 0;
3178 }
3179}
3180
3181/* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3182 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3183 corresponds to the address of the object and 0 if to the object. */
3184
3185static tree
3186get_mem_expr_from_op (op, paddressp)
3187 rtx op;
3188 int *paddressp;
3189{
3190 tree expr;
3191 int inner_addressp;
3192
3193 *paddressp = 0;
3194
3195 if (op == NULL)
3196 return 0;
3197
3198 if (GET_CODE (op) == REG && ORIGINAL_REGNO (op) >= FIRST_PSEUDO_REGISTER)
3199 return REGNO_DECL (ORIGINAL_REGNO (op));
3200 else if (GET_CODE (op) != MEM)
3201 return 0;
3202
3203 if (MEM_EXPR (op) != 0)
3204 return MEM_EXPR (op);
3205
3206 /* Otherwise we have an address, so indicate it and look at the address. */
3207 *paddressp = 1;
3208 op = XEXP (op, 0);
3209
3210 /* First check if we have a decl for the address, then look at the right side
3211 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3212 But don't allow the address to itself be indirect. */
3213 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3214 return expr;
3215 else if (GET_CODE (op) == PLUS
3216 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3217 return expr;
3218
3219 while (GET_RTX_CLASS (GET_CODE (op)) == '1'
3220 || GET_RTX_CLASS (GET_CODE (op)) == '2')
3221 op = XEXP (op, 0);
3222
3223 expr = get_mem_expr_from_op (op, &inner_addressp);
3224 return inner_addressp ? 0 : expr;
3225}
3226
3227/* Output operand names for assembler instructions. OPERANDS is the
3228 operand vector, OPORDER is the order to write the operands, and NOPS
3229 is the number of operands to write. */
3230
3231static void
3232output_asm_operand_names (operands, oporder, nops)
3233 rtx *operands;
3234 int *oporder;
3235 int nops;
3236{
3237 int wrote = 0;
3238 int i;
3239
3240 for (i = 0; i < nops; i++)
3241 {
3242 int addressp;
3243 tree expr = get_mem_expr_from_op (operands[oporder[i]], &addressp);
3244
3245 if (expr)
3246 {
3247 fprintf (asm_out_file, "%c%s %s",
3248 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START,
3249 addressp ? "*" : "");
3250 print_mem_expr (asm_out_file, expr);
3251 wrote = 1;
3252 }
3253 }
3254}
3255
3256/* Output text from TEMPLATE to the assembler output file,
3257 obeying %-directions to substitute operands taken from
3258 the vector OPERANDS.
3259
3260 %N (for N a digit) means print operand N in usual manner.
3261 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3262 and print the label name with no punctuation.
3263 %cN means require operand N to be a constant
3264 and print the constant expression with no punctuation.
3265 %aN means expect operand N to be a memory address
3266 (not a memory reference!) and print a reference
3267 to that address.
3268 %nN means expect operand N to be a constant
3269 and print a constant expression for minus the value
3270 of the operand, with no other punctuation. */
3271
3272void
3273output_asm_insn (template, operands)
3274 const char *template;
3275 rtx *operands;
3276{
3277 const char *p;
3278 int c;
3279#ifdef ASSEMBLER_DIALECT
3280 int dialect = 0;
3281#endif
3282 int oporder[MAX_RECOG_OPERANDS];
3283 char opoutput[MAX_RECOG_OPERANDS];
3284 int ops = 0;
3285
3286 /* An insn may return a null string template
3287 in a case where no assembler code is needed. */
3288 if (*template == 0)
3289 return;
3290
3291 memset (opoutput, 0, sizeof opoutput);
3292 p = template;
3293 putc ('\t', asm_out_file);
3294
3295#ifdef ASM_OUTPUT_OPCODE
3296 ASM_OUTPUT_OPCODE (asm_out_file, p);
3297#endif
3298
3299 while ((c = *p++))
3300 switch (c)
3301 {
3302 case '\n':
3303 if (flag_verbose_asm)
3304 output_asm_operand_names (operands, oporder, ops);
3305 if (flag_print_asm_name)
3306 output_asm_name ();
3307
3308 ops = 0;
3309 memset (opoutput, 0, sizeof opoutput);
3310
3311 putc (c, asm_out_file);
3312#ifdef ASM_OUTPUT_OPCODE
3313 while ((c = *p) == '\t')
3314 {
3315 putc (c, asm_out_file);
3316 p++;
3317 }
3318 ASM_OUTPUT_OPCODE (asm_out_file, p);
3319#endif
3320 break;
3321
3322#ifdef ASSEMBLER_DIALECT
3323 case '{':
3324 {
3325 int i;
3326
3327 if (dialect)
3328 output_operand_lossage ("nested assembly dialect alternatives");
3329 else
3330 dialect = 1;
3331
3332 /* If we want the first dialect, do nothing. Otherwise, skip
3333 DIALECT_NUMBER of strings ending with '|'. */
3334 for (i = 0; i < dialect_number; i++)
3335 {
3336 while (*p && *p != '}' && *p++ != '|')
3337 ;
3338 if (*p == '}')
3339 break;
3340 if (*p == '|')
3341 p++;
3342 }
3343
3344 if (*p == '\0')
3345 output_operand_lossage ("unterminated assembly dialect alternative");
3346 }
3347 break;
3348
3349 case '|':
3350 if (dialect)
3351 {
3352 /* Skip to close brace. */
3353 do
3354 {
3355 if (*p == '\0')
3356 {
3357 output_operand_lossage ("unterminated assembly dialect alternative");
3358 break;
3359 }
3360 }
3361 while (*p++ != '}');
3362 dialect = 0;
3363 }
3364 else
3365 putc (c, asm_out_file);
3366 break;
3367
3368 case '}':
3369 if (! dialect)
3370 putc (c, asm_out_file);
3371 dialect = 0;
3372 break;
3373#endif
3374
3375 case '%':
3376 /* %% outputs a single %. */
3377 if (*p == '%')
3378 {
3379 p++;
3380 putc (c, asm_out_file);
3381 }
3382 /* %= outputs a number which is unique to each insn in the entire
3383 compilation. This is useful for making local labels that are
3384 referred to more than once in a given insn. */
3385 else if (*p == '=')
3386 {
3387 p++;
3388 fprintf (asm_out_file, "%d", insn_counter);
3389 }
3390 /* % followed by a letter and some digits
3391 outputs an operand in a special way depending on the letter.
3392 Letters `acln' are implemented directly.
3393 Other letters are passed to `output_operand' so that
3394 the PRINT_OPERAND macro can define them. */
3395 else if (ISALPHA (*p))
3396 {
3397 int letter = *p++;
3398 c = atoi (p);
3399
3400 if (! ISDIGIT (*p))
3401 output_operand_lossage ("operand number missing after %%-letter");
3402 else if (this_is_asm_operands
3403 && (c < 0 || (unsigned int) c >= insn_noperands))
3404 output_operand_lossage ("operand number out of range");
3405 else if (letter == 'l')
3406 output_asm_label (operands[c]);
3407 else if (letter == 'a')
3408 output_address (operands[c]);
3409 else if (letter == 'c')
3410 {
3411 if (CONSTANT_ADDRESS_P (operands[c]))
3412 output_addr_const (asm_out_file, operands[c]);
3413 else
3414 output_operand (operands[c], 'c');
3415 }
3416 else if (letter == 'n')
3417 {
3418 if (GET_CODE (operands[c]) == CONST_INT)
3419 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3420 - INTVAL (operands[c]));
3421 else
3422 {
3423 putc ('-', asm_out_file);
3424 output_addr_const (asm_out_file, operands[c]);
3425 }
3426 }
3427 else
3428 output_operand (operands[c], letter);
3429
3430 if (!opoutput[c])
3431 oporder[ops++] = c;
3432 opoutput[c] = 1;
3433
3434 while (ISDIGIT (c = *p))
3435 p++;
3436 }
3437 /* % followed by a digit outputs an operand the default way. */
3438 else if (ISDIGIT (*p))
3439 {
3440 c = atoi (p);
3441 if (this_is_asm_operands
3442 && (c < 0 || (unsigned int) c >= insn_noperands))
3443 output_operand_lossage ("operand number out of range");
3444 else
3445 output_operand (operands[c], 0);
3446
3447 if (!opoutput[c])
3448 oporder[ops++] = c;
3449 opoutput[c] = 1;
3450
3451 while (ISDIGIT (c = *p))
3452 p++;
3453 }
3454 /* % followed by punctuation: output something for that
3455 punctuation character alone, with no operand.
3456 The PRINT_OPERAND macro decides what is actually done. */
3457#ifdef PRINT_OPERAND_PUNCT_VALID_P
3458 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3459 output_operand (NULL_RTX, *p++);
3460#endif
3461 else
3462 output_operand_lossage ("invalid %%-code");
3463 break;
3464
3465 default:
3466 putc (c, asm_out_file);
3467 }
3468
3469 /* Write out the variable names for operands, if we know them. */
3470 if (flag_verbose_asm)
3471 output_asm_operand_names (operands, oporder, ops);
3472 if (flag_print_asm_name)
3473 output_asm_name ();
3474
3475 putc ('\n', asm_out_file);
3476}
3477
3478/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3479
3480void
3481output_asm_label (x)
3482 rtx x;
3483{
3484 char buf[256];
3485
3486 if (GET_CODE (x) == LABEL_REF)
3487 x = XEXP (x, 0);
3488 if (GET_CODE (x) == CODE_LABEL
3489 || (GET_CODE (x) == NOTE
3490 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
3491 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3492 else
3493 output_operand_lossage ("`%%l' operand isn't a label");
3494
3495 assemble_name (asm_out_file, buf);
3496}
3497
3498/* Print operand X using machine-dependent assembler syntax.
3499 The macro PRINT_OPERAND is defined just to control this function.
3500 CODE is a non-digit that preceded the operand-number in the % spec,
3501 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3502 between the % and the digits.
3503 When CODE is a non-letter, X is 0.
3504
3505 The meanings of the letters are machine-dependent and controlled
3506 by PRINT_OPERAND. */
3507
3508static void
3509output_operand (x, code)
3510 rtx x;
3511 int code ATTRIBUTE_UNUSED;
3512{
3513 if (x && GET_CODE (x) == SUBREG)
3514 x = alter_subreg (&x);
3515
3516 /* If X is a pseudo-register, abort now rather than writing trash to the
3517 assembler file. */
3518
3519 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER)
3520 abort ();
3521
3522 PRINT_OPERAND (asm_out_file, x, code);
3523}
3524
3525/* Print a memory reference operand for address X
3526 using machine-dependent assembler syntax.
3527 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3528
3529void
3530output_address (x)
3531 rtx x;
3532{
3533 walk_alter_subreg (&x);
3534 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3535}
3536
3537/* Print an integer constant expression in assembler syntax.
3538 Addition and subtraction are the only arithmetic
3539 that may appear in these expressions. */
3540
3541void
3542output_addr_const (file, x)
3543 FILE *file;
3544 rtx x;
3545{
3546 char buf[256];
3547
3548 restart:
3549 switch (GET_CODE (x))
3550 {
3551 case PC:
3552 putc ('.', file);
3553 break;
3554
3555 case SYMBOL_REF:
3556#ifdef ASM_OUTPUT_SYMBOL_REF
3557 ASM_OUTPUT_SYMBOL_REF (file, x);
3558#else
3559 assemble_name (file, XSTR (x, 0));
3560#endif
3561 break;
3562
3563 case LABEL_REF:
3564 x = XEXP (x, 0);
3565 /* Fall through. */
3566 case CODE_LABEL:
3567 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3568#ifdef ASM_OUTPUT_LABEL_REF
3569 ASM_OUTPUT_LABEL_REF (file, buf);
3570#else
3571 assemble_name (file, buf);
3572#endif
3573 break;
3574
3575 case CONST_INT:
3576 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3577 break;
3578
3579 case CONST:
3580 /* This used to output parentheses around the expression,
3581 but that does not work on the 386 (either ATT or BSD assembler). */
3582 output_addr_const (file, XEXP (x, 0));
3583 break;
3584
3585 case CONST_DOUBLE:
3586 if (GET_MODE (x) == VOIDmode)
3587 {
3588 /* We can use %d if the number is one word and positive. */
3589 if (CONST_DOUBLE_HIGH (x))
3590 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3591 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3592 else if (CONST_DOUBLE_LOW (x) < 0)
3593 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3594 else
3595 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3596 }
3597 else
3598 /* We can't handle floating point constants;
3599 PRINT_OPERAND must handle them. */
3600 output_operand_lossage ("floating constant misused");
3601 break;
3602
3603 case PLUS:
3604 /* Some assemblers need integer constants to appear last (eg masm). */
3605 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3606 {
3607 output_addr_const (file, XEXP (x, 1));
3608 if (INTVAL (XEXP (x, 0)) >= 0)
3609 fprintf (file, "+");
3610 output_addr_const (file, XEXP (x, 0));
3611 }
3612 else
3613 {
3614 output_addr_const (file, XEXP (x, 0));
3615 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3616 || INTVAL (XEXP (x, 1)) >= 0)
3617 fprintf (file, "+");
3618 output_addr_const (file, XEXP (x, 1));
3619 }
3620 break;
3621
3622 case MINUS:
3623 /* Avoid outputting things like x-x or x+5-x,
3624 since some assemblers can't handle that. */
3625 x = simplify_subtraction (x);
3626 if (GET_CODE (x) != MINUS)
3627 goto restart;
3628
3629 output_addr_const (file, XEXP (x, 0));
3630 fprintf (file, "-");
3631 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0)
3632 || GET_CODE (XEXP (x, 1)) == PC
3633 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3634 output_addr_const (file, XEXP (x, 1));
3635 else
3636 {
3637 fputs (targetm.asm_out.open_paren, file);
3638 output_addr_const (file, XEXP (x, 1));
3639 fputs (targetm.asm_out.close_paren, file);
3640 }
3641 break;
3642
3643 case ZERO_EXTEND:
3644 case SIGN_EXTEND:
3645 case SUBREG:
3646 output_addr_const (file, XEXP (x, 0));
3647 break;
3648
3649 default:
3650#ifdef OUTPUT_ADDR_CONST_EXTRA
3651 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3652 break;
3653
3654 fail:
3655#endif
3656 output_operand_lossage ("invalid expression as operand");
3657 }
3658}
3659
3660/* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3661 %R prints the value of REGISTER_PREFIX.
3662 %L prints the value of LOCAL_LABEL_PREFIX.
3663 %U prints the value of USER_LABEL_PREFIX.
3664 %I prints the value of IMMEDIATE_PREFIX.
3665 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3666 Also supported are %d, %x, %s, %e, %f, %g and %%.
3667
3668 We handle alternate assembler dialects here, just like output_asm_insn. */
3669
3670void
3671asm_fprintf VPARAMS ((FILE *file, const char *p, ...))
3672{
3673 char buf[10];
3674 char *q, c;
3675
3676 VA_OPEN (argptr, p);
3677 VA_FIXEDARG (argptr, FILE *, file);
3678 VA_FIXEDARG (argptr, const char *, p);
3679
3680 buf[0] = '%';
3681
3682 while ((c = *p++))
3683 switch (c)
3684 {
3685#ifdef ASSEMBLER_DIALECT
3686 case '{':
3687 {
3688 int i;
3689
3690 /* If we want the first dialect, do nothing. Otherwise, skip
3691 DIALECT_NUMBER of strings ending with '|'. */
3692 for (i = 0; i < dialect_number; i++)
3693 {
3694 while (*p && *p++ != '|')
3695 ;
3696
3697 if (*p == '|')
3698 p++;
3699 }
3700 }
3701 break;
3702
3703 case '|':
3704 /* Skip to close brace. */
3705 while (*p && *p++ != '}')
3706 ;
3707 break;
3708
3709 case '}':
3710 break;
3711#endif
3712
3713 case '%':
3714 c = *p++;
3715 q = &buf[1];
3716 while (ISDIGIT (c) || c == '.')
3717 {
3718 *q++ = c;
3719 c = *p++;
3720 }
3721 switch (c)
3722 {
3723 case '%':
3724 fprintf (file, "%%");
3725 break;
3726
3727 case 'd': case 'i': case 'u':
3728 case 'x': case 'p': case 'X':
3729 case 'o':
3730 *q++ = c;
3731 *q = 0;
3732 fprintf (file, buf, va_arg (argptr, int));
3733 break;
3734
3735 case 'w':
3736 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3737 but we do not check for those cases. It means that the value
3738 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3739
3740#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3741#else
3742#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3743 *q++ = 'l';
3744#else
3745 *q++ = 'l';
3746 *q++ = 'l';
3747#endif
3748#endif
3749
3750 *q++ = *p++;
3751 *q = 0;
3752 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3753 break;
3754
3755 case 'l':
3756 *q++ = c;
3757 *q++ = *p++;
3758 *q = 0;
3759 fprintf (file, buf, va_arg (argptr, long));
3760 break;
3761
3762 case 'e':
3763 case 'f':
3764 case 'g':
3765 *q++ = c;
3766 *q = 0;
3767 fprintf (file, buf, va_arg (argptr, double));
3768 break;
3769
3770 case 's':
3771 *q++ = c;
3772 *q = 0;
3773 fprintf (file, buf, va_arg (argptr, char *));
3774 break;
3775
3776 case 'O':
3777#ifdef ASM_OUTPUT_OPCODE
3778 ASM_OUTPUT_OPCODE (asm_out_file, p);
3779#endif
3780 break;
3781
3782 case 'R':
3783#ifdef REGISTER_PREFIX
3784 fprintf (file, "%s", REGISTER_PREFIX);
3785#endif
3786 break;
3787
3788 case 'I':
3789#ifdef IMMEDIATE_PREFIX
3790 fprintf (file, "%s", IMMEDIATE_PREFIX);
3791#endif
3792 break;
3793
3794 case 'L':
3795#ifdef LOCAL_LABEL_PREFIX
3796 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3797#endif
3798 break;
3799
3800 case 'U':
3801 fputs (user_label_prefix, file);
3802 break;
3803
3804#ifdef ASM_FPRINTF_EXTENSIONS
3805 /* Upper case letters are reserved for general use by asm_fprintf
3806 and so are not available to target specific code. In order to
3807 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3808 they are defined here. As they get turned into real extensions
3809 to asm_fprintf they should be removed from this list. */
3810 case 'A': case 'B': case 'C': case 'D': case 'E':
3811 case 'F': case 'G': case 'H': case 'J': case 'K':
3812 case 'M': case 'N': case 'P': case 'Q': case 'S':
3813 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3814 break;
3815
3816 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3817#endif
3818 default:
3819 abort ();
3820 }
3821 break;
3822
3823 default:
3824 fputc (c, file);
3825 }
3826 VA_CLOSE (argptr);
3827}
3828
3829/* Split up a CONST_DOUBLE or integer constant rtx
3830 into two rtx's for single words,
3831 storing in *FIRST the word that comes first in memory in the target
3832 and in *SECOND the other. */
3833
3834void
3835split_double (value, first, second)
3836 rtx value;
3837 rtx *first, *second;
3838{
3839 if (GET_CODE (value) == CONST_INT)
3840 {
3841 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3842 {
3843 /* In this case the CONST_INT holds both target words.
3844 Extract the bits from it into two word-sized pieces.
3845 Sign extend each half to HOST_WIDE_INT. */
3846 unsigned HOST_WIDE_INT low, high;
3847 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3848
3849 /* Set sign_bit to the most significant bit of a word. */
3850 sign_bit = 1;
3851 sign_bit <<= BITS_PER_WORD - 1;
3852
3853 /* Set mask so that all bits of the word are set. We could
3854 have used 1 << BITS_PER_WORD instead of basing the
3855 calculation on sign_bit. However, on machines where
3856 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3857 compiler warning, even though the code would never be
3858 executed. */
3859 mask = sign_bit << 1;
3860 mask--;
3861
3862 /* Set sign_extend as any remaining bits. */
3863 sign_extend = ~mask;
3864
3865 /* Pick the lower word and sign-extend it. */
3866 low = INTVAL (value);
3867 low &= mask;
3868 if (low & sign_bit)
3869 low |= sign_extend;
3870
3871 /* Pick the higher word, shifted to the least significant
3872 bits, and sign-extend it. */
3873 high = INTVAL (value);
3874 high >>= BITS_PER_WORD - 1;
3875 high >>= 1;
3876 high &= mask;
3877 if (high & sign_bit)
3878 high |= sign_extend;
3879
3880 /* Store the words in the target machine order. */
3881 if (WORDS_BIG_ENDIAN)
3882 {
3883 *first = GEN_INT (high);
3884 *second = GEN_INT (low);
3885 }
3886 else
3887 {
3888 *first = GEN_INT (low);
3889 *second = GEN_INT (high);
3890 }
3891 }
3892 else
3893 {
3894 /* The rule for using CONST_INT for a wider mode
3895 is that we regard the value as signed.
3896 So sign-extend it. */
3897 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3898 if (WORDS_BIG_ENDIAN)
3899 {
3900 *first = high;
3901 *second = value;
3902 }
3903 else
3904 {
3905 *first = value;
3906 *second = high;
3907 }
3908 }
3909 }
3910 else if (GET_CODE (value) != CONST_DOUBLE)
3911 {
3912 if (WORDS_BIG_ENDIAN)
3913 {
3914 *first = const0_rtx;
3915 *second = value;
3916 }
3917 else
3918 {
3919 *first = value;
3920 *second = const0_rtx;
3921 }
3922 }
3923 else if (GET_MODE (value) == VOIDmode
3924 /* This is the old way we did CONST_DOUBLE integers. */
3925 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3926 {
3927 /* In an integer, the words are defined as most and least significant.
3928 So order them by the target's convention. */
3929 if (WORDS_BIG_ENDIAN)
3930 {
3931 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3932 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3933 }
3934 else
3935 {
3936 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3937 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3938 }
3939 }
3940 else
3941 {
|
3771#ifdef REAL_ARITHMETIC
| |
3772 REAL_VALUE_TYPE r;
3773 long l[2];
3774 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3775
3776 /* Note, this converts the REAL_VALUE_TYPE to the target's
3777 format, splits up the floating point double and outputs
3778 exactly 32 bits of it into each of l[0] and l[1] --
3779 not necessarily BITS_PER_WORD bits. */
3780 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3781
3782 /* If 32 bits is an entire word for the target, but not for the host,
3783 then sign-extend on the host so that the number will look the same
3784 way on the host that it would on the target. See for instance
3785 simplify_unary_operation. The #if is needed to avoid compiler
3786 warnings. */
3787
3788#if HOST_BITS_PER_LONG > 32
3789 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3790 {
3791 if (l[0] & ((long) 1 << 31))
3792 l[0] |= ((long) (-1) << 32);
3793 if (l[1] & ((long) 1 << 31))
3794 l[1] |= ((long) (-1) << 32);
3795 }
3796#endif
3797
3798 *first = GEN_INT ((HOST_WIDE_INT) l[0]);
3799 *second = GEN_INT ((HOST_WIDE_INT) l[1]);
| 3942 REAL_VALUE_TYPE r;
3943 long l[2];
3944 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3945
3946 /* Note, this converts the REAL_VALUE_TYPE to the target's
3947 format, splits up the floating point double and outputs
3948 exactly 32 bits of it into each of l[0] and l[1] --
3949 not necessarily BITS_PER_WORD bits. */
3950 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3951
3952 /* If 32 bits is an entire word for the target, but not for the host,
3953 then sign-extend on the host so that the number will look the same
3954 way on the host that it would on the target. See for instance
3955 simplify_unary_operation. The #if is needed to avoid compiler
3956 warnings. */
3957
3958#if HOST_BITS_PER_LONG > 32
3959 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3960 {
3961 if (l[0] & ((long) 1 << 31))
3962 l[0] |= ((long) (-1) << 32);
3963 if (l[1] & ((long) 1 << 31))
3964 l[1] |= ((long) (-1) << 32);
3965 }
3966#endif
3967
3968 *first = GEN_INT ((HOST_WIDE_INT) l[0]);
3969 *second = GEN_INT ((HOST_WIDE_INT) l[1]);
|
3800#else
3801 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3802 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3803 && ! flag_pretend_float)
3804 abort ();
3805
3806 if (
3807#ifdef HOST_WORDS_BIG_ENDIAN
3808 WORDS_BIG_ENDIAN
3809#else
3810 ! WORDS_BIG_ENDIAN
3811#endif
3812 )
3813 {
3814 /* Host and target agree => no need to swap. */
3815 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3816 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3817 }
3818 else
3819 {
3820 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3821 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3822 }
3823#endif /* no REAL_ARITHMETIC */
| |
3824 }
3825}
3826
3827/* Return nonzero if this function has no function calls. */
3828
3829int
3830leaf_function_p ()
3831{
3832 rtx insn;
3833 rtx link;
3834
3835 if (current_function_profile || profile_arc_flag)
3836 return 0;
3837
3838 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3839 {
3840 if (GET_CODE (insn) == CALL_INSN
3841 && ! SIBLING_CALL_P (insn))
3842 return 0;
3843 if (GET_CODE (insn) == INSN
3844 && GET_CODE (PATTERN (insn)) == SEQUENCE
3845 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
3846 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3847 return 0;
3848 }
3849 for (link = current_function_epilogue_delay_list;
3850 link;
3851 link = XEXP (link, 1))
3852 {
3853 insn = XEXP (link, 0);
3854
3855 if (GET_CODE (insn) == CALL_INSN
3856 && ! SIBLING_CALL_P (insn))
3857 return 0;
3858 if (GET_CODE (insn) == INSN
3859 && GET_CODE (PATTERN (insn)) == SEQUENCE
3860 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
3861 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3862 return 0;
3863 }
3864
3865 return 1;
3866}
3867
| 3970 }
3971}
3972
3973/* Return nonzero if this function has no function calls. */
3974
3975int
3976leaf_function_p ()
3977{
3978 rtx insn;
3979 rtx link;
3980
3981 if (current_function_profile || profile_arc_flag)
3982 return 0;
3983
3984 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3985 {
3986 if (GET_CODE (insn) == CALL_INSN
3987 && ! SIBLING_CALL_P (insn))
3988 return 0;
3989 if (GET_CODE (insn) == INSN
3990 && GET_CODE (PATTERN (insn)) == SEQUENCE
3991 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
3992 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3993 return 0;
3994 }
3995 for (link = current_function_epilogue_delay_list;
3996 link;
3997 link = XEXP (link, 1))
3998 {
3999 insn = XEXP (link, 0);
4000
4001 if (GET_CODE (insn) == CALL_INSN
4002 && ! SIBLING_CALL_P (insn))
4003 return 0;
4004 if (GET_CODE (insn) == INSN
4005 && GET_CODE (PATTERN (insn)) == SEQUENCE
4006 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
4007 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4008 return 0;
4009 }
4010
4011 return 1;
4012}
4013
|
3868/* Return 1 if branch is an forward branch.
| 4014/* Return 1 if branch is a forward branch.
|
3869 Uses insn_shuid array, so it works only in the final pass. May be used by
3870 output templates to customary add branch prediction hints.
3871 */
3872int
3873final_forward_branch_p (insn)
3874 rtx insn;
3875{
3876 int insn_id, label_id;
3877 if (!uid_shuid)
3878 abort ();
3879 insn_id = INSN_SHUID (insn);
3880 label_id = INSN_SHUID (JUMP_LABEL (insn));
3881 /* We've hit some insns that does not have id information available. */
3882 if (!insn_id || !label_id)
3883 abort ();
3884 return insn_id < label_id;
3885}
3886
3887/* On some machines, a function with no call insns
3888 can run faster if it doesn't create its own register window.
3889 When output, the leaf function should use only the "output"
3890 registers. Ordinarily, the function would be compiled to use
3891 the "input" registers to find its arguments; it is a candidate
3892 for leaf treatment if it uses only the "input" registers.
3893 Leaf function treatment means renumbering so the function
3894 uses the "output" registers instead. */
3895
3896#ifdef LEAF_REGISTERS
3897
3898/* Return 1 if this function uses only the registers that can be
3899 safely renumbered. */
3900
3901int
3902only_leaf_regs_used ()
3903{
3904 int i;
3905 char *permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3906
3907 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3908 if ((regs_ever_live[i] || global_regs[i])
3909 && ! permitted_reg_in_leaf_functions[i])
3910 return 0;
3911
3912 if (current_function_uses_pic_offset_table
3913 && pic_offset_table_rtx != 0
3914 && GET_CODE (pic_offset_table_rtx) == REG
3915 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3916 return 0;
3917
3918 return 1;
3919}
3920
3921/* Scan all instructions and renumber all registers into those
3922 available in leaf functions. */
3923
3924static void
3925leaf_renumber_regs (first)
3926 rtx first;
3927{
3928 rtx insn;
3929
3930 /* Renumber only the actual patterns.
3931 The reg-notes can contain frame pointer refs,
3932 and renumbering them could crash, and should not be needed. */
3933 for (insn = first; insn; insn = NEXT_INSN (insn))
3934 if (INSN_P (insn))
3935 leaf_renumber_regs_insn (PATTERN (insn));
3936 for (insn = current_function_epilogue_delay_list;
3937 insn;
3938 insn = XEXP (insn, 1))
3939 if (INSN_P (XEXP (insn, 0)))
3940 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
3941}
3942
3943/* Scan IN_RTX and its subexpressions, and renumber all regs into those
3944 available in leaf functions. */
3945
3946void
3947leaf_renumber_regs_insn (in_rtx)
3948 rtx in_rtx;
3949{
3950 int i, j;
3951 const char *format_ptr;
3952
3953 if (in_rtx == 0)
3954 return;
3955
3956 /* Renumber all input-registers into output-registers.
3957 renumbered_regs would be 1 for an output-register;
3958 they */
3959
3960 if (GET_CODE (in_rtx) == REG)
3961 {
3962 int newreg;
3963
3964 /* Don't renumber the same reg twice. */
3965 if (in_rtx->used)
3966 return;
3967
3968 newreg = REGNO (in_rtx);
3969 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3970 to reach here as part of a REG_NOTE. */
3971 if (newreg >= FIRST_PSEUDO_REGISTER)
3972 {
3973 in_rtx->used = 1;
3974 return;
3975 }
3976 newreg = LEAF_REG_REMAP (newreg);
3977 if (newreg < 0)
3978 abort ();
3979 regs_ever_live[REGNO (in_rtx)] = 0;
3980 regs_ever_live[newreg] = 1;
3981 REGNO (in_rtx) = newreg;
3982 in_rtx->used = 1;
3983 }
3984
3985 if (INSN_P (in_rtx))
3986 {
3987 /* Inside a SEQUENCE, we find insns.
3988 Renumber just the patterns of these insns,
3989 just as we do for the top-level insns. */
3990 leaf_renumber_regs_insn (PATTERN (in_rtx));
3991 return;
3992 }
3993
3994 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
3995
3996 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
3997 switch (*format_ptr++)
3998 {
3999 case 'e':
4000 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4001 break;
4002
4003 case 'E':
4004 if (NULL != XVEC (in_rtx, i))
4005 {
4006 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4007 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4008 }
4009 break;
4010
4011 case 'S':
4012 case 's':
4013 case '0':
4014 case 'i':
4015 case 'w':
4016 case 'n':
4017 case 'u':
4018 break;
4019
4020 default:
4021 abort ();
4022 }
4023}
4024#endif
| 4015 Uses insn_shuid array, so it works only in the final pass. May be used by
4016 output templates to customary add branch prediction hints.
4017 */
4018int
4019final_forward_branch_p (insn)
4020 rtx insn;
4021{
4022 int insn_id, label_id;
4023 if (!uid_shuid)
4024 abort ();
4025 insn_id = INSN_SHUID (insn);
4026 label_id = INSN_SHUID (JUMP_LABEL (insn));
4027 /* We've hit some insns that does not have id information available. */
4028 if (!insn_id || !label_id)
4029 abort ();
4030 return insn_id < label_id;
4031}
4032
4033/* On some machines, a function with no call insns
4034 can run faster if it doesn't create its own register window.
4035 When output, the leaf function should use only the "output"
4036 registers. Ordinarily, the function would be compiled to use
4037 the "input" registers to find its arguments; it is a candidate
4038 for leaf treatment if it uses only the "input" registers.
4039 Leaf function treatment means renumbering so the function
4040 uses the "output" registers instead. */
4041
4042#ifdef LEAF_REGISTERS
4043
4044/* Return 1 if this function uses only the registers that can be
4045 safely renumbered. */
4046
4047int
4048only_leaf_regs_used ()
4049{
4050 int i;
4051 char *permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4052
4053 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4054 if ((regs_ever_live[i] || global_regs[i])
4055 && ! permitted_reg_in_leaf_functions[i])
4056 return 0;
4057
4058 if (current_function_uses_pic_offset_table
4059 && pic_offset_table_rtx != 0
4060 && GET_CODE (pic_offset_table_rtx) == REG
4061 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4062 return 0;
4063
4064 return 1;
4065}
4066
4067/* Scan all instructions and renumber all registers into those
4068 available in leaf functions. */
4069
4070static void
4071leaf_renumber_regs (first)
4072 rtx first;
4073{
4074 rtx insn;
4075
4076 /* Renumber only the actual patterns.
4077 The reg-notes can contain frame pointer refs,
4078 and renumbering them could crash, and should not be needed. */
4079 for (insn = first; insn; insn = NEXT_INSN (insn))
4080 if (INSN_P (insn))
4081 leaf_renumber_regs_insn (PATTERN (insn));
4082 for (insn = current_function_epilogue_delay_list;
4083 insn;
4084 insn = XEXP (insn, 1))
4085 if (INSN_P (XEXP (insn, 0)))
4086 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4087}
4088
4089/* Scan IN_RTX and its subexpressions, and renumber all regs into those
4090 available in leaf functions. */
4091
4092void
4093leaf_renumber_regs_insn (in_rtx)
4094 rtx in_rtx;
4095{
4096 int i, j;
4097 const char *format_ptr;
4098
4099 if (in_rtx == 0)
4100 return;
4101
4102 /* Renumber all input-registers into output-registers.
4103 renumbered_regs would be 1 for an output-register;
4104 they */
4105
4106 if (GET_CODE (in_rtx) == REG)
4107 {
4108 int newreg;
4109
4110 /* Don't renumber the same reg twice. */
4111 if (in_rtx->used)
4112 return;
4113
4114 newreg = REGNO (in_rtx);
4115 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4116 to reach here as part of a REG_NOTE. */
4117 if (newreg >= FIRST_PSEUDO_REGISTER)
4118 {
4119 in_rtx->used = 1;
4120 return;
4121 }
4122 newreg = LEAF_REG_REMAP (newreg);
4123 if (newreg < 0)
4124 abort ();
4125 regs_ever_live[REGNO (in_rtx)] = 0;
4126 regs_ever_live[newreg] = 1;
4127 REGNO (in_rtx) = newreg;
4128 in_rtx->used = 1;
4129 }
4130
4131 if (INSN_P (in_rtx))
4132 {
4133 /* Inside a SEQUENCE, we find insns.
4134 Renumber just the patterns of these insns,
4135 just as we do for the top-level insns. */
4136 leaf_renumber_regs_insn (PATTERN (in_rtx));
4137 return;
4138 }
4139
4140 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4141
4142 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4143 switch (*format_ptr++)
4144 {
4145 case 'e':
4146 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4147 break;
4148
4149 case 'E':
4150 if (NULL != XVEC (in_rtx, i))
4151 {
4152 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4153 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4154 }
4155 break;
4156
4157 case 'S':
4158 case 's':
4159 case '0':
4160 case 'i':
4161 case 'w':
4162 case 'n':
4163 case 'u':
4164 break;
4165
4166 default:
4167 abort ();
4168 }
4169}
4170#endif
|