1@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
2@c 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
3@c This is part of the GCC manual.
4@c For copying conditions, see the file gcc.texi.
5
6@ignore
7@c man begin INCLUDE
8@include gcc-vers.texi
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508
509@emph{i386 and x86-64 Options}
510@gccoptlist{-mtune=@var{cpu-type} -march=@var{cpu-type} @gol
511-mfpmath=@var{unit} @gol
512-masm=@var{dialect} -mno-fancy-math-387 @gol
513-mno-fp-ret-in-387 -msoft-float -msvr3-shlib @gol
514-mno-wide-multiply -mrtd -malign-double @gol
515-mpreferred-stack-boundary=@var{num} @gol
516-mmmx -msse -msse2 -msse3 -mssse3 -msse4a -m3dnow -mpopcnt -mabm @gol
517-mthreads -mno-align-stringops -minline-all-stringops @gol
518-mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol
519-m96bit-long-double -mregparm=@var{num} -msseregparm @gol
520-mstackrealign @gol
521-momit-leaf-frame-pointer -mno-red-zone -mno-tls-direct-seg-refs @gol
522-mcmodel=@var{code-model} @gol
523-m32 -m64 -mlarge-data-threshold=@var{num}}
524
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9056@item athlon-4, athlon-xp, athlon-mp
9057Improved AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and full SSE
9058instruction set support.
9059@item k8, opteron, athlon64, athlon-fx
9060AMD K8 core based CPUs with x86-64 instruction set support. (This supersets
9061MMX, SSE, SSE2, 3dNOW!, enhanced 3dNOW! and 64-bit instruction set extensions.)
9062@item k8-sse3, opteron-sse3, athlon64-sse3
9063Improved versions of k8, opteron and athlon64 with SSE3 instruction set support.
9064@item amdfam10, barcelona
9065AMD Family 10h core based CPUs with x86-64 instruction set support. (This
9066supersets MMX, SSE, SSE2, SSE3, SSE4A, 3dNOW!, enhanced 3dNOW!, ABM and 64-bit
9067instruction set extensions.)
9068@item winchip-c6
9069IDT Winchip C6 CPU, dealt in same way as i486 with additional MMX instruction
9070set support.
9071@item winchip2
9072IDT Winchip2 CPU, dealt in same way as i486 with additional MMX and 3dNOW!
9073instruction set support.
9074@item c3
9075Via C3 CPU with MMX and 3dNOW! instruction set support. (No scheduling is
--- 278 unchanged lines hidden (view full) ---
9354@item -msse
9355@itemx -mno-sse
9356@item -msse2
9357@itemx -mno-sse2
9358@item -msse3
9359@itemx -mno-sse3
9360@item -mssse3
9361@itemx -mno-ssse3
9362@item -msse4a
9363@item -mno-sse4a
9364@item -m3dnow
9365@itemx -mno-3dnow
9366@item -mpopcnt
9367@itemx -mno-popcnt
9368@item -mabm
9369@itemx -mno-abm
9370@opindex mmmx
9371@opindex mno-mmx
9372@opindex msse
9373@opindex mno-sse
9374@opindex m3dnow
9375@opindex mno-3dnow
9376These switches enable or disable the use of instructions in the MMX,
9377SSE, SSE2, SSE3, SSSE3, SSE4A, ABM or 3DNow! extended instruction sets.
9378These extensions are also available as built-in functions: see
9379@ref{X86 Built-in Functions}, for details of the functions enabled and
9380disabled by these switches.
9381
9382To have SSE/SSE2 instructions generated automatically from floating-point
9383code (as opposed to 387 instructions), see @option{-mfpmath=sse}.
9384
9385These options will enable GCC to use these extended instructions in
--- 4466 unchanged lines hidden ---
2@c 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
3@c This is part of the GCC manual.
4@c For copying conditions, see the file gcc.texi.
5
6@ignore
7@c man begin INCLUDE
8@include gcc-vers.texi
--- 499 unchanged lines hidden (view full) ---
508
509@emph{i386 and x86-64 Options}
510@gccoptlist{-mtune=@var{cpu-type} -march=@var{cpu-type} @gol
511-mfpmath=@var{unit} @gol
512-masm=@var{dialect} -mno-fancy-math-387 @gol
513-mno-fp-ret-in-387 -msoft-float -msvr3-shlib @gol
514-mno-wide-multiply -mrtd -malign-double @gol
515-mpreferred-stack-boundary=@var{num} @gol
516-mmmx -msse -msse2 -msse3 -mssse3 -msse4a -m3dnow -mpopcnt -mabm @gol
517-mthreads -mno-align-stringops -minline-all-stringops @gol
518-mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol
519-m96bit-long-double -mregparm=@var{num} -msseregparm @gol
520-mstackrealign @gol
521-momit-leaf-frame-pointer -mno-red-zone -mno-tls-direct-seg-refs @gol
522-mcmodel=@var{code-model} @gol
523-m32 -m64 -mlarge-data-threshold=@var{num}}
524
--- 8531 unchanged lines hidden (view full) ---
9056@item athlon-4, athlon-xp, athlon-mp
9057Improved AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and full SSE
9058instruction set support.
9059@item k8, opteron, athlon64, athlon-fx
9060AMD K8 core based CPUs with x86-64 instruction set support. (This supersets
9061MMX, SSE, SSE2, 3dNOW!, enhanced 3dNOW! and 64-bit instruction set extensions.)
9062@item k8-sse3, opteron-sse3, athlon64-sse3
9063Improved versions of k8, opteron and athlon64 with SSE3 instruction set support.
9064@item amdfam10, barcelona
9065AMD Family 10h core based CPUs with x86-64 instruction set support. (This
9066supersets MMX, SSE, SSE2, SSE3, SSE4A, 3dNOW!, enhanced 3dNOW!, ABM and 64-bit
9067instruction set extensions.)
9068@item winchip-c6
9069IDT Winchip C6 CPU, dealt in same way as i486 with additional MMX instruction
9070set support.
9071@item winchip2
9072IDT Winchip2 CPU, dealt in same way as i486 with additional MMX and 3dNOW!
9073instruction set support.
9074@item c3
9075Via C3 CPU with MMX and 3dNOW! instruction set support. (No scheduling is
--- 278 unchanged lines hidden (view full) ---
9354@item -msse
9355@itemx -mno-sse
9356@item -msse2
9357@itemx -mno-sse2
9358@item -msse3
9359@itemx -mno-sse3
9360@item -mssse3
9361@itemx -mno-ssse3
9362@item -msse4a
9363@item -mno-sse4a
9364@item -m3dnow
9365@itemx -mno-3dnow
9366@item -mpopcnt
9367@itemx -mno-popcnt
9368@item -mabm
9369@itemx -mno-abm
9370@opindex mmmx
9371@opindex mno-mmx
9372@opindex msse
9373@opindex mno-sse
9374@opindex m3dnow
9375@opindex mno-3dnow
9376These switches enable or disable the use of instructions in the MMX,
9377SSE, SSE2, SSE3, SSSE3, SSE4A, ABM or 3DNow! extended instruction sets.
9378These extensions are also available as built-in functions: see
9379@ref{X86 Built-in Functions}, for details of the functions enabled and
9380disabled by these switches.
9381
9382To have SSE/SSE2 instructions generated automatically from floating-point
9383code (as opposed to 387 instructions), see @option{-mfpmath=sse}.
9384
9385These options will enable GCC to use these extended instructions in
--- 4466 unchanged lines hidden ---