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i386.md (117404) i386.md (122190)
1;; GCC machine description for IA-32 and x86-64.
2;; Copyright (C) 1988, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3;; 2001, 2002, 2003
4;; Free Software Foundation, Inc.
5;; Mostly by William Schelter.
6;; x86_64 support added by Jan Hubicka
7;;
8;; This file is part of GNU CC.

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105 (UNSPEC_PFRCPIT2 52)
106 (UNSPEC_PFRSQRT 53)
107 (UNSPEC_PFRSQIT1 54)
108 (UNSPEC_PSHUFLW 55)
109 (UNSPEC_PSHUFHW 56)
110 (UNSPEC_MFENCE 59)
111 (UNSPEC_LFENCE 60)
112 (UNSPEC_PSADBW 61)
1;; GCC machine description for IA-32 and x86-64.
2;; Copyright (C) 1988, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3;; 2001, 2002, 2003
4;; Free Software Foundation, Inc.
5;; Mostly by William Schelter.
6;; x86_64 support added by Jan Hubicka
7;;
8;; This file is part of GNU CC.

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105 (UNSPEC_PFRCPIT2 52)
106 (UNSPEC_PFRSQRT 53)
107 (UNSPEC_PFRSQIT1 54)
108 (UNSPEC_PSHUFLW 55)
109 (UNSPEC_PSHUFHW 56)
110 (UNSPEC_MFENCE 59)
111 (UNSPEC_LFENCE 60)
112 (UNSPEC_PSADBW 61)
113 (UNSPEC_ADDSUB 71)
114 (UNSPEC_HADD 72)
115 (UNSPEC_HSUB 73)
116 (UNSPEC_MOVSHDUP 74)
117 (UNSPEC_MOVSLDUP 75)
118 (UNSPEC_LDQQU 76)
119 (UNSPEC_MOVDDUP 77)
113 ])
114
115(define_constants
116 [(UNSPECV_BLOCKAGE 0)
117 (UNSPECV_EH_RETURN 13)
118 (UNSPECV_EMMS 31)
119 (UNSPECV_LDMXCSR 37)
120 (UNSPECV_STMXCSR 40)
121 (UNSPECV_FEMMS 46)
122 (UNSPECV_CLFLUSH 57)
120 ])
121
122(define_constants
123 [(UNSPECV_BLOCKAGE 0)
124 (UNSPECV_EH_RETURN 13)
125 (UNSPECV_EMMS 31)
126 (UNSPECV_LDMXCSR 37)
127 (UNSPECV_STMXCSR 40)
128 (UNSPECV_FEMMS 46)
129 (UNSPECV_CLFLUSH 57)
130 (UNSPECV_MONITOR 69)
131 (UNSPECV_MWAIT 70)
123 ])
124
125;; Insns whose names begin with "x86_" are emitted by gen_FOO calls
126;; from i386.c.
127
128;; In C guard expressions, put expressions which may be compile-time
129;; constants first. This allows for better optimization. For
130;; example, write "TARGET_64BIT && reload_completed", not

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22067
22068(define_insn "*lfence_insn"
22069 [(set (match_operand:BLK 0 "" "")
22070 (unspec:BLK [(match_dup 0)] UNSPEC_LFENCE))]
22071 "TARGET_SSE2"
22072 "lfence"
22073 [(set_attr "type" "sse")
22074 (set_attr "memory" "unknown")])
132 ])
133
134;; Insns whose names begin with "x86_" are emitted by gen_FOO calls
135;; from i386.c.
136
137;; In C guard expressions, put expressions which may be compile-time
138;; constants first. This allows for better optimization. For
139;; example, write "TARGET_64BIT && reload_completed", not

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22076
22077(define_insn "*lfence_insn"
22078 [(set (match_operand:BLK 0 "" "")
22079 (unspec:BLK [(match_dup 0)] UNSPEC_LFENCE))]
22080 "TARGET_SSE2"
22081 "lfence"
22082 [(set_attr "type" "sse")
22083 (set_attr "memory" "unknown")])
22084
22085;; PNI
22086
22087(define_insn "mwait"
22088 [(unspec_volatile [(match_operand:SI 0 "register_operand" "a")
22089 (match_operand:SI 1 "register_operand" "c")]
22090 UNSPECV_MWAIT)]
22091 "TARGET_PNI"
22092 "mwait\t%0, %1"
22093 [(set_attr "length" "3")])
22094
22095(define_insn "monitor"
22096 [(unspec_volatile [(match_operand:SI 0 "register_operand" "a")
22097 (match_operand:SI 1 "register_operand" "c")
22098 (match_operand:SI 2 "register_operand" "d")]
22099 UNSPECV_MONITOR)]
22100 "TARGET_PNI"
22101 "monitor\t%0, %1, %2"
22102 [(set_attr "length" "3")])
22103
22104;; PNI arithmetic
22105
22106(define_insn "addsubv4sf3"
22107 [(set (match_operand:V4SF 0 "register_operand" "=x")
22108 (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "0")
22109 (match_operand:V4SF 2 "nonimmediate_operand" "xm")]
22110 UNSPEC_ADDSUB))]
22111 "TARGET_PNI"
22112 "addsubps\t{%2, %0|%0, %2}"
22113 [(set_attr "type" "sseadd")
22114 (set_attr "mode" "V4SF")])
22115
22116(define_insn "addsubv2df3"
22117 [(set (match_operand:V2DF 0 "register_operand" "=x")
22118 (unspec:V2DF [(match_operand:V2DF 1 "register_operand" "0")
22119 (match_operand:V2DF 2 "nonimmediate_operand" "xm")]
22120 UNSPEC_ADDSUB))]
22121 "TARGET_PNI"
22122 "addsubpd\t{%2, %0|%0, %2}"
22123 [(set_attr "type" "sseadd")
22124 (set_attr "mode" "V2DF")])
22125
22126(define_insn "haddv4sf3"
22127 [(set (match_operand:V4SF 0 "register_operand" "=x")
22128 (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "0")
22129 (match_operand:V4SF 2 "nonimmediate_operand" "xm")]
22130 UNSPEC_HADD))]
22131 "TARGET_PNI"
22132 "haddps\t{%2, %0|%0, %2}"
22133 [(set_attr "type" "sseadd")
22134 (set_attr "mode" "V4SF")])
22135
22136(define_insn "haddv2df3"
22137 [(set (match_operand:V2DF 0 "register_operand" "=x")
22138 (unspec:V2DF [(match_operand:V2DF 1 "register_operand" "0")
22139 (match_operand:V2DF 2 "nonimmediate_operand" "xm")]
22140 UNSPEC_HADD))]
22141 "TARGET_PNI"
22142 "haddpd\t{%2, %0|%0, %2}"
22143 [(set_attr "type" "sseadd")
22144 (set_attr "mode" "V2DF")])
22145
22146(define_insn "hsubv4sf3"
22147 [(set (match_operand:V4SF 0 "register_operand" "=x")
22148 (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "0")
22149 (match_operand:V4SF 2 "nonimmediate_operand" "xm")]
22150 UNSPEC_HSUB))]
22151 "TARGET_PNI"
22152 "hsubps\t{%2, %0|%0, %2}"
22153 [(set_attr "type" "sseadd")
22154 (set_attr "mode" "V4SF")])
22155
22156(define_insn "hsubv2df3"
22157 [(set (match_operand:V2DF 0 "register_operand" "=x")
22158 (unspec:V2DF [(match_operand:V2DF 1 "register_operand" "0")
22159 (match_operand:V2DF 2 "nonimmediate_operand" "xm")]
22160 UNSPEC_HSUB))]
22161 "TARGET_PNI"
22162 "hsubpd\t{%2, %0|%0, %2}"
22163 [(set_attr "type" "sseadd")
22164 (set_attr "mode" "V2DF")])
22165
22166(define_insn "movshdup"
22167 [(set (match_operand:V4SF 0 "register_operand" "=x")
22168 (unspec:V4SF
22169 [(match_operand:V4SF 1 "nonimmediate_operand" "xm")] UNSPEC_MOVSHDUP))]
22170 "TARGET_PNI"
22171 "movshdup\t{%1, %0|%0, %1}"
22172 [(set_attr "type" "sse")
22173 (set_attr "mode" "V4SF")])
22174
22175(define_insn "movsldup"
22176 [(set (match_operand:V4SF 0 "register_operand" "=x")
22177 (unspec:V4SF
22178 [(match_operand:V4SF 1 "nonimmediate_operand" "xm")] UNSPEC_MOVSLDUP))]
22179 "TARGET_PNI"
22180 "movsldup\t{%1, %0|%0, %1}"
22181 [(set_attr "type" "sse")
22182 (set_attr "mode" "V4SF")])
22183
22184(define_insn "lddqu"
22185 [(set (match_operand:V16QI 0 "register_operand" "=x")
22186 (unspec:V16QI [(match_operand:V16QI 1 "memory_operand" "m")]
22187 UNSPEC_LDQQU))]
22188 "TARGET_PNI"
22189 "lddqu\t{%1, %0|%0, %1}"
22190 [(set_attr "type" "ssecvt")
22191 (set_attr "mode" "TI")])
22192
22193(define_insn "loadddup"
22194 [(set (match_operand:V2DF 0 "register_operand" "=x")
22195 (vec_duplicate:V2DF (match_operand:DF 1 "memory_operand" "m")))]
22196 "TARGET_PNI"
22197 "movddup\t{%1, %0|%0, %1}"
22198 [(set_attr "type" "ssecvt")
22199 (set_attr "mode" "DF")])
22200
22201(define_insn "movddup"
22202 [(set (match_operand:V2DF 0 "register_operand" "=x")
22203 (vec_duplicate:V2DF
22204 (vec_select:DF (match_operand:V2DF 1 "register_operand" "x")
22205 (parallel [(const_int 0)]))))]
22206 "TARGET_PNI"
22207 "movddup\t{%1, %0|%0, %1}"
22208 [(set_attr "type" "ssecvt")
22209 (set_attr "mode" "DF")])