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i386.h (50654) i386.h (52295)
1/* Definitions of target machine for GNU compiler for Intel X86
2 (386, 486, Pentium).
3 Copyright (C) 1988, 92, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by

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29 this file, and then the file for the appropriate assembler syntax.
30
31 Many macros that specify assembler syntax are omitted entirely from
32 this file because they really belong in the files for particular
33 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
34 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
35 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
36
1/* Definitions of target machine for GNU compiler for Intel X86
2 (386, 486, Pentium).
3 Copyright (C) 1988, 92, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by

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29 this file, and then the file for the appropriate assembler syntax.
30
31 Many macros that specify assembler syntax are omitted entirely from
32 this file because they really belong in the files for particular
33 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
34 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
35 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
36
37/* $FreeBSD: head/contrib/gcc/config/i386/i386.h 52295 1999-10-16 08:10:36Z obrien $ */
38
37/* Names to predefine in the preprocessor for this target machine. */
38
39#define I386 1
40
41/* Stubs for half-pic support if not OSF/1 reference platform. */
42
43#ifndef HALF_PIC_P
44#define HALF_PIC_P() 0

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150/* Hack macros for tuning code generation */
151#define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
152#define TARGET_PSEUDO ((target_flags & MASK_NO_PSEUDO) == 0) /* Move op's args into pseudos */
153
154#define TARGET_386 (ix86_cpu == PROCESSOR_I386)
155#define TARGET_486 (ix86_cpu == PROCESSOR_I486)
156#define TARGET_PENTIUM (ix86_cpu == PROCESSOR_PENTIUM)
157#define TARGET_PENTIUMPRO (ix86_cpu == PROCESSOR_PENTIUMPRO)
39/* Names to predefine in the preprocessor for this target machine. */
40
41#define I386 1
42
43/* Stubs for half-pic support if not OSF/1 reference platform. */
44
45#ifndef HALF_PIC_P
46#define HALF_PIC_P() 0

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152/* Hack macros for tuning code generation */
153#define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
154#define TARGET_PSEUDO ((target_flags & MASK_NO_PSEUDO) == 0) /* Move op's args into pseudos */
155
156#define TARGET_386 (ix86_cpu == PROCESSOR_I386)
157#define TARGET_486 (ix86_cpu == PROCESSOR_I486)
158#define TARGET_PENTIUM (ix86_cpu == PROCESSOR_PENTIUM)
159#define TARGET_PENTIUMPRO (ix86_cpu == PROCESSOR_PENTIUMPRO)
158#define TARGET_USE_LEAVE (ix86_cpu == PROCESSOR_I386)
159#define TARGET_PUSH_MEMORY (ix86_cpu == PROCESSOR_I386)
160#define TARGET_ZERO_EXTEND_WITH_AND (ix86_cpu != PROCESSOR_I386 \
161 && ix86_cpu != PROCESSOR_PENTIUMPRO)
162#define TARGET_DOUBLE_WITH_ADD (ix86_cpu != PROCESSOR_I386)
163#define TARGET_USE_BIT_TEST (ix86_cpu == PROCESSOR_I386)
164#define TARGET_UNROLL_STRLEN (ix86_cpu != PROCESSOR_I386)
165#define TARGET_USE_Q_REG (ix86_cpu == PROCESSOR_PENTIUM \
166 || ix86_cpu == PROCESSOR_PENTIUMPRO)
167#define TARGET_USE_ANY_REG (ix86_cpu == PROCESSOR_I486)
168#define TARGET_CMOVE (ix86_arch == PROCESSOR_PENTIUMPRO)
169#define TARGET_DEEP_BRANCH_PREDICTION (ix86_cpu == PROCESSOR_PENTIUMPRO)
160#define TARGET_K6 (ix86_cpu == PROCESSOR_K6)
161
162#define CPUMASK (1 << ix86_cpu)
163extern const int x86_use_leave, x86_push_memory, x86_zero_extend_with_and;
164extern const int x86_use_bit_test, x86_cmove, x86_deep_branch;
165extern const int x86_unroll_strlen, x86_use_q_reg, x86_use_any_reg;
166extern const int x86_double_with_add;
167
168#define TARGET_USE_LEAVE (x86_use_leave & CPUMASK)
169#define TARGET_PUSH_MEMORY (x86_push_memory & CPUMASK)
170#define TARGET_ZERO_EXTEND_WITH_AND (x86_zero_extend_with_and & CPUMASK)
171#define TARGET_USE_BIT_TEST (x86_use_bit_test & CPUMASK)
172#define TARGET_UNROLL_STRLEN (x86_unroll_strlen & CPUMASK)
173#define TARGET_USE_Q_REG (x86_use_q_reg & CPUMASK)
174#define TARGET_USE_ANY_REG (x86_use_any_reg & CPUMASK)
175#define TARGET_CMOVE (x86_cmove & (1 << ix86_arch))
176#define TARGET_DEEP_BRANCH_PREDICTION (x86_deep_branch & CPUMASK)
177#define TARGET_DOUBLE_WITH_ADD (x86_double_with_add & CPUMASK)
178
170#define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE)
171
172#define TARGET_SWITCHES \
179#define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE)
180
181#define TARGET_SWITCHES \
173{ { "80387", MASK_80387 }, \
174 { "no-80387", -MASK_80387 }, \
175 { "hard-float", MASK_80387 }, \
176 { "soft-float", -MASK_80387 }, \
177 { "no-soft-float", MASK_80387 }, \
178 { "386", 0 }, \
179 { "no-386", 0 }, \
180 { "486", 0 }, \
181 { "no-486", 0 }, \
182 { "pentium", 0 }, \
183 { "pentiumpro", 0 }, \
184 { "rtd", MASK_RTD }, \
185 { "no-rtd", -MASK_RTD }, \
186 { "align-double", MASK_ALIGN_DOUBLE }, \
187 { "no-align-double", -MASK_ALIGN_DOUBLE }, \
188 { "svr3-shlib", MASK_SVR3_SHLIB }, \
189 { "no-svr3-shlib", -MASK_SVR3_SHLIB }, \
190 { "ieee-fp", MASK_IEEE_FP }, \
191 { "no-ieee-fp", -MASK_IEEE_FP }, \
192 { "fp-ret-in-387", MASK_FLOAT_RETURNS }, \
193 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS }, \
194 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387 }, \
195 { "fancy-math-387", -MASK_NO_FANCY_MATH_387 }, \
196 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER }, \
197 { "no-omit-leaf-frame-pointer",-MASK_OMIT_LEAF_FRAME_POINTER }, \
198 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY }, \
199 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY }, \
200 { "schedule-prologue", MASK_SCHEDULE_PROLOGUE }, \
201 { "no-schedule-prologue", -MASK_SCHEDULE_PROLOGUE }, \
202 { "debug-addr", MASK_DEBUG_ADDR }, \
203 { "no-debug-addr", -MASK_DEBUG_ADDR }, \
204 { "move", -MASK_NO_MOVE }, \
205 { "no-move", MASK_NO_MOVE }, \
206 { "debug-arg", MASK_DEBUG_ARG }, \
207 { "no-debug-arg", -MASK_DEBUG_ARG }, \
208 { "stack-arg-probe", MASK_STACK_PROBE }, \
209 { "no-stack-arg-probe", -MASK_STACK_PROBE }, \
210 { "windows", 0 }, \
211 { "dll", 0 }, \
182{ { "80387", MASK_80387, "Use hardware fp" }, \
183 { "no-80387", -MASK_80387, "Do not use hardware fp" },\
184 { "hard-float", MASK_80387, "Use hardware fp" }, \
185 { "soft-float", -MASK_80387, "Do not use hardware fp" },\
186 { "no-soft-float", MASK_80387, "Use hardware fp" }, \
187 { "386", 0, "Same as -mcpu=i386" }, \
188 { "486", 0, "Same as -mcpu=i486" }, \
189 { "pentium", 0, "Same as -mcpu=pentium" }, \
190 { "pentiumpro", 0, "Same as -mcpu=pentiumpro" }, \
191 { "rtd", MASK_RTD, "Alternate calling convention" },\
192 { "no-rtd", -MASK_RTD, "Use normal calling convention" },\
193 { "align-double", MASK_ALIGN_DOUBLE, "Align some doubles on dword boundary" },\
194 { "no-align-double", -MASK_ALIGN_DOUBLE, "Align doubles on word boundary" }, \
195 { "svr3-shlib", MASK_SVR3_SHLIB, "Uninitialized locals in .bss" }, \
196 { "no-svr3-shlib", -MASK_SVR3_SHLIB, "Uninitialized locals in .data" }, \
197 { "ieee-fp", MASK_IEEE_FP, "Use IEEE math for fp comparisons" }, \
198 { "no-ieee-fp", -MASK_IEEE_FP, "Do not use IEEE math for fp comparisons" }, \
199 { "fp-ret-in-387", MASK_FLOAT_RETURNS, "Return values of functions in FPU registers" }, \
200 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS , "Do not return values of functions in FPU registers"}, \
201 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387, "Do not generate sin, cos, sqrt for 387" }, \
202 { "fancy-math-387", -MASK_NO_FANCY_MATH_387, "Generate sin, cos, sqrt for FPU"}, \
203 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER, "Omit the frame pointer in leaf functions" }, \
204 { "no-omit-leaf-frame-pointer",-MASK_OMIT_LEAF_FRAME_POINTER, "" }, \
205 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY, "multiplies of 32 bits constrained to 32 bits" }, \
206 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY, "multiplies of 32 bits are 64 bits" }, \
207 { "schedule-prologue", MASK_SCHEDULE_PROLOGUE, "Schedule function prologues" }, \
208 { "no-schedule-prologue", -MASK_SCHEDULE_PROLOGUE, "" }, \
209 { "debug-addr", MASK_DEBUG_ADDR, 0 /* intentionally undoc */ }, \
210 { "no-debug-addr", -MASK_DEBUG_ADDR, 0 /* intentionally undoc */ }, \
211 { "move", -MASK_NO_MOVE, "Generate mem-mem moves" }, \
212 { "no-move", MASK_NO_MOVE, "Don't generate mem-mem moves" }, \
213 { "debug-arg", MASK_DEBUG_ARG, 0 /* intentionally undoc */ }, \
214 { "no-debug-arg", -MASK_DEBUG_ARG, 0 /* intentionally undoc */ }, \
215 { "stack-arg-probe", MASK_STACK_PROBE, "Enable stack probing" }, \
216 { "no-stack-arg-probe", -MASK_STACK_PROBE, "" }, \
217 { "windows", 0, 0 /* intentionally undoc */ }, \
218 { "dll", 0, 0 /* intentionally undoc */ }, \
212 SUBTARGET_SWITCHES \
219 SUBTARGET_SWITCHES \
213 { "", MASK_SCHEDULE_PROLOGUE | TARGET_DEFAULT}}
220 { "", MASK_SCHEDULE_PROLOGUE | TARGET_DEFAULT, 0 }}
214
215/* Which processor to schedule for. The cpu attribute defines a list that
216 mirrors this list, so changes to i386.md must be made at the same time. */
217
218enum processor_type
219 {PROCESSOR_I386, /* 80386 */
220 PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */
221 PROCESSOR_PENTIUM,
221
222/* Which processor to schedule for. The cpu attribute defines a list that
223 mirrors this list, so changes to i386.md must be made at the same time. */
224
225enum processor_type
226 {PROCESSOR_I386, /* 80386 */
227 PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */
228 PROCESSOR_PENTIUM,
222 PROCESSOR_PENTIUMPRO};
229 PROCESSOR_PENTIUMPRO,
230 PROCESSOR_K6};
223
224#define PROCESSOR_I386_STRING "i386"
225#define PROCESSOR_I486_STRING "i486"
226#define PROCESSOR_I586_STRING "i586"
227#define PROCESSOR_PENTIUM_STRING "pentium"
228#define PROCESSOR_I686_STRING "i686"
229#define PROCESSOR_PENTIUMPRO_STRING "pentiumpro"
231
232#define PROCESSOR_I386_STRING "i386"
233#define PROCESSOR_I486_STRING "i486"
234#define PROCESSOR_I586_STRING "i586"
235#define PROCESSOR_PENTIUM_STRING "pentium"
236#define PROCESSOR_I686_STRING "i686"
237#define PROCESSOR_PENTIUMPRO_STRING "pentiumpro"
238#define PROCESSOR_K6_STRING "k6"
230
231extern enum processor_type ix86_cpu;
232
233extern int ix86_arch;
234
235/* Define the default processor. This is overridden by other tm.h files. */
239
240extern enum processor_type ix86_cpu;
241
242extern int ix86_arch;
243
244/* Define the default processor. This is overridden by other tm.h files. */
236#define PROCESSOR_DEFAULT \
237 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \
238 ? PROCESSOR_I486 \
239 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \
240 ? PROCESSOR_PENTIUM \
241 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \
242 ? PROCESSOR_PENTIUMPRO \
243 : PROCESSOR_I386
245#define PROCESSOR_DEFAULT (enum processor_type) TARGET_CPU_DEFAULT
244#define PROCESSOR_DEFAULT_STRING \
246#define PROCESSOR_DEFAULT_STRING \
245 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \
246 ? PROCESSOR_I486_STRING \
247 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \
248 ? PROCESSOR_PENTIUM_STRING \
249 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \
250 ? PROCESSOR_PENTIUMPRO_STRING \
251 : PROCESSOR_I386_STRING
247 (PROCESSOR_DEFAULT == PROCESSOR_I486 ? PROCESSOR_I486_STRING \
248 : PROCESSOR_DEFAULT == PROCESSOR_PENTIUM ? PROCESSOR_PENTIUM_STRING \
249 : PROCESSOR_DEFAULT == PROCESSOR_PENTIUMPRO ? PROCESSOR_PENTIUMPRO_STRING \
250 : PROCESSOR_DEFAULT == PROCESSOR_K6 ? PROCESSOR_K6_STRING \
251 : PROCESSOR_I386_STRING)
252
253/* This macro is similar to `TARGET_SWITCHES' but defines names of
254 command options that have values. Its definition is an
255 initializer with a subgrouping for each command option.
256
257 Each subgrouping contains a string constant, that defines the
258 fixed part of the option name, and the address of a variable. The
259 variable, type `char *', is set to the variable part of the given
260 option if the fixed part matches. The actual option name is made
261 by appending `-m' to the specified name. */
262#define TARGET_OPTIONS \
252
253/* This macro is similar to `TARGET_SWITCHES' but defines names of
254 command options that have values. Its definition is an
255 initializer with a subgrouping for each command option.
256
257 Each subgrouping contains a string constant, that defines the
258 fixed part of the option name, and the address of a variable. The
259 variable, type `char *', is set to the variable part of the given
260 option if the fixed part matches. The actual option name is made
261 by appending `-m' to the specified name. */
262#define TARGET_OPTIONS \
263{ { "cpu=", &ix86_cpu_string}, \
264 { "arch=", &ix86_arch_string}, \
265 { "reg-alloc=", &i386_reg_alloc_order }, \
266 { "regparm=", &i386_regparm_string }, \
267 { "align-loops=", &i386_align_loops_string }, \
268 { "align-jumps=", &i386_align_jumps_string }, \
269 { "align-functions=", &i386_align_funcs_string }, \
270 { "branch-cost=", &i386_branch_cost_string }, \
263{ { "cpu=", &ix86_cpu_string, "Schedule code for given CPU"}, \
264 { "arch=", &ix86_arch_string, "Generate code for given CPU"}, \
265 { "reg-alloc=", &i386_reg_alloc_order, "Control allocation order of integer registers" }, \
266 { "regparm=", &i386_regparm_string, "Number of registers used to pass integer arguments" }, \
267 { "align-loops=", &i386_align_loops_string, "Loop code aligned to this power of 2" }, \
268 { "align-jumps=", &i386_align_jumps_string, "Jump targets are aligned to this power of 2" }, \
269 { "align-functions=", &i386_align_funcs_string, "Function starts are aligned to this power of 2" }, \
270 { "preferred-stack-boundary=", &i386_preferred_stack_boundary_string, "Attempt to keep stack aligned to this power of 2" }, \
271 { "branch-cost=", &i386_branch_cost_string, "Branches are this expensive (1-5, arbitrary units)" }, \
271 SUBTARGET_OPTIONS \
272}
273
274/* Sometimes certain combinations of command options do not make
275 sense on a particular target machine. You can define a macro
276 `OVERRIDE_OPTIONS' to take account of this. This macro, if
277 defined, is executed once just after all the command options have
278 been parsed.

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290#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE)
291
292/* Specs for the compiler proper */
293
294#ifndef CC1_CPU_SPEC
295#define CC1_CPU_SPEC "\
296%{!mcpu*: \
297%{m386:-mcpu=i386 -march=i386} \
272 SUBTARGET_OPTIONS \
273}
274
275/* Sometimes certain combinations of command options do not make
276 sense on a particular target machine. You can define a macro
277 `OVERRIDE_OPTIONS' to take account of this. This macro, if
278 defined, is executed once just after all the command options have
279 been parsed.

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291#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE)
292
293/* Specs for the compiler proper */
294
295#ifndef CC1_CPU_SPEC
296#define CC1_CPU_SPEC "\
297%{!mcpu*: \
298%{m386:-mcpu=i386 -march=i386} \
298%{mno-486:-mcpu=i386 -march=i386} \
299%{m486:-mcpu=i486 -march=i486} \
299%{m486:-mcpu=i486 -march=i486} \
300%{mno-386:-mcpu=i486 -march=i486} \
301%{mno-pentium:-mcpu=i486 -march=i486} \
302%{mpentium:-mcpu=pentium} \
300%{mpentium:-mcpu=pentium} \
303%{mno-pentiumpro:-mcpu=pentium} \
304%{mpentiumpro:-mcpu=pentiumpro}}"
305#endif
306
307#define CPP_486_SPEC "%{!ansi:-Di486} -D__i486 -D__i486__"
308#define CPP_586_SPEC "%{!ansi:-Di586 -Dpentium} \
309 -D__i586 -D__i586__ -D__pentium -D__pentium__"
301%{mpentiumpro:-mcpu=pentiumpro}}"
302#endif
303
304#define CPP_486_SPEC "%{!ansi:-Di486} -D__i486 -D__i486__"
305#define CPP_586_SPEC "%{!ansi:-Di586 -Dpentium} \
306 -D__i586 -D__i586__ -D__pentium -D__pentium__"
307#define CPP_K6_SPEC "%{!ansi:-Di586 -Dk6} \
308 -D__i586 -D__i586__ -D__k6 -D__k6__"
310#define CPP_686_SPEC "%{!ansi:-Di686 -Dpentiumpro} \
311 -D__i686 -D__i686__ -D__pentiumpro -D__pentiumpro__"
312
313#ifndef CPP_CPU_DEFAULT_SPEC
314#if TARGET_CPU_DEFAULT == 1
315#define CPP_CPU_DEFAULT_SPEC "%(cpp_486)"
309#define CPP_686_SPEC "%{!ansi:-Di686 -Dpentiumpro} \
310 -D__i686 -D__i686__ -D__pentiumpro -D__pentiumpro__"
311
312#ifndef CPP_CPU_DEFAULT_SPEC
313#if TARGET_CPU_DEFAULT == 1
314#define CPP_CPU_DEFAULT_SPEC "%(cpp_486)"
316#else
315#endif
317#if TARGET_CPU_DEFAULT == 2
318#define CPP_CPU_DEFAULT_SPEC "%(cpp_586)"
316#if TARGET_CPU_DEFAULT == 2
317#define CPP_CPU_DEFAULT_SPEC "%(cpp_586)"
319#else
318#endif
320#if TARGET_CPU_DEFAULT == 3
321#define CPP_CPU_DEFAULT_SPEC "%(cpp_686)"
319#if TARGET_CPU_DEFAULT == 3
320#define CPP_CPU_DEFAULT_SPEC "%(cpp_686)"
322#else
323#define CPP_CPU_DEFAULT_SPEC ""
324#endif
321#endif
322#if TARGET_CPU_DEFAULT == 4
323#define CPP_CPU_DEFAULT_SPEC "%(cpp_k6)"
325#endif
324#endif
325#ifndef CPP_CPU_DEFAULT_SPEC
326#define CPP_CPU_DEFAULT_SPEC ""
326#endif
327#endif /* CPP_CPU_DEFAULT_SPEC */
328
329#ifndef CPP_CPU_SPEC
330#define CPP_CPU_SPEC "\
327#endif
328#endif /* CPP_CPU_DEFAULT_SPEC */
329
330#ifndef CPP_CPU_SPEC
331#define CPP_CPU_SPEC "\
331-Asystem(unix) -Acpu(i386) -Amachine(i386) \
332-Acpu(i386) -Amachine(i386) \
332%{!ansi:-Di386} -D__i386 -D__i386__ \
333%{mcpu=i486:%(cpp_486)} %{m486:%(cpp_486)} \
334%{mpentium:%(cpp_586)} %{mcpu=pentium:%(cpp_586)} \
335%{mpentiumpro:%(cpp_686)} %{mcpu=pentiumpro:%(cpp_686)} \
333%{!ansi:-Di386} -D__i386 -D__i386__ \
334%{mcpu=i486:%(cpp_486)} %{m486:%(cpp_486)} \
335%{mpentium:%(cpp_586)} %{mcpu=pentium:%(cpp_586)} \
336%{mpentiumpro:%(cpp_686)} %{mcpu=pentiumpro:%(cpp_686)} \
337%{mcpu=k6:%(cpp_k6)} \
336%{!mcpu*:%{!m486:%{!mpentium*:%(cpp_cpu_default)}}}"
337#endif
338
339#ifndef CC1_SPEC
340#define CC1_SPEC "%(cc1_spec) "
341#endif
342
343/* This macro defines names of additional specifications to put in the

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352
353#ifndef SUBTARGET_EXTRA_SPECS
354#define SUBTARGET_EXTRA_SPECS
355#endif
356
357#define EXTRA_SPECS \
358 { "cpp_486", CPP_486_SPEC}, \
359 { "cpp_586", CPP_586_SPEC}, \
338%{!mcpu*:%{!m486:%{!mpentium*:%(cpp_cpu_default)}}}"
339#endif
340
341#ifndef CC1_SPEC
342#define CC1_SPEC "%(cc1_spec) "
343#endif
344
345/* This macro defines names of additional specifications to put in the

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354
355#ifndef SUBTARGET_EXTRA_SPECS
356#define SUBTARGET_EXTRA_SPECS
357#endif
358
359#define EXTRA_SPECS \
360 { "cpp_486", CPP_486_SPEC}, \
361 { "cpp_586", CPP_586_SPEC}, \
362 { "cpp_k6", CPP_K6_SPEC}, \
360 { "cpp_686", CPP_686_SPEC}, \
361 { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \
362 { "cpp_cpu", CPP_CPU_SPEC }, \
363 { "cc1_cpu", CC1_CPU_SPEC }, \
364 SUBTARGET_EXTRA_SPECS
365
366/* target machine storage layout */
367

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402
403/* Width in bits of a pointer.
404 See also the macro `Pmode' defined below. */
405#define POINTER_SIZE 32
406
407/* Allocation boundary (in *bits*) for storing arguments in argument list. */
408#define PARM_BOUNDARY 32
409
363 { "cpp_686", CPP_686_SPEC}, \
364 { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \
365 { "cpp_cpu", CPP_CPU_SPEC }, \
366 { "cc1_cpu", CC1_CPU_SPEC }, \
367 SUBTARGET_EXTRA_SPECS
368
369/* target machine storage layout */
370

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405
406/* Width in bits of a pointer.
407 See also the macro `Pmode' defined below. */
408#define POINTER_SIZE 32
409
410/* Allocation boundary (in *bits*) for storing arguments in argument list. */
411#define PARM_BOUNDARY 32
412
410/* Boundary (in *bits*) on which stack pointer should be aligned. */
413/* Boundary (in *bits*) on which the stack pointer must be aligned. */
411#define STACK_BOUNDARY 32
412
414#define STACK_BOUNDARY 32
415
416/* Boundary (in *bits*) on which the stack pointer preferrs to be
417 aligned; the compiler cannot rely on having this alignment. */
418#define PREFERRED_STACK_BOUNDARY i386_preferred_stack_boundary
419
413/* Allocation boundary (in *bits*) for the code of a function.
414 For i486, we get better performance by aligning to a cache
415 line (i.e. 16 byte) boundary. */
416#define FUNCTION_BOUNDARY (1 << (i386_align_funcs + 3))
417
418/* Alignment of field after `int : 0' in a structure. */
419
420#define EMPTY_FIELD_BOUNDARY 32

--- 76 unchanged lines hidden (view full) ---

497 : TREE_CODE (TYPE) == REAL_TYPE \
498 ? ((TYPE_MODE (TYPE) == DFmode && (ALIGN) < 64) \
499 ? 64 \
500 : (TYPE_MODE (TYPE) == XFmode && (ALIGN) < 128) \
501 ? 128 \
502 : (ALIGN)) \
503 : (ALIGN))
504
420/* Allocation boundary (in *bits*) for the code of a function.
421 For i486, we get better performance by aligning to a cache
422 line (i.e. 16 byte) boundary. */
423#define FUNCTION_BOUNDARY (1 << (i386_align_funcs + 3))
424
425/* Alignment of field after `int : 0' in a structure. */
426
427#define EMPTY_FIELD_BOUNDARY 32

--- 76 unchanged lines hidden (view full) ---

504 : TREE_CODE (TYPE) == REAL_TYPE \
505 ? ((TYPE_MODE (TYPE) == DFmode && (ALIGN) < 64) \
506 ? 64 \
507 : (TYPE_MODE (TYPE) == XFmode && (ALIGN) < 128) \
508 ? 128 \
509 : (ALIGN)) \
510 : (ALIGN))
511
512/* If defined, a C expression to compute the alignment for a local
513 variable. TYPE is the data type, and ALIGN is the alignment that
514 the object would ordinarily have. The value of this macro is used
515 instead of that alignment to align the object.
516
517 If this macro is not defined, then ALIGN is used.
518
519 One use of this macro is to increase alignment of medium-size
520 data to make it all fit in fewer cache lines. */
521
522#define LOCAL_ALIGNMENT(TYPE, ALIGN) \
523 (TREE_CODE (TYPE) == ARRAY_TYPE \
524 ? ((TYPE_MODE (TREE_TYPE (TYPE)) == DFmode && (ALIGN) < 64) \
525 ? 64 \
526 : (TYPE_MODE (TREE_TYPE (TYPE)) == XFmode && (ALIGN) < 128) \
527 ? 128 \
528 : (ALIGN)) \
529 : TREE_CODE (TYPE) == COMPLEX_TYPE \
530 ? ((TYPE_MODE (TYPE) == DCmode && (ALIGN) < 64) \
531 ? 64 \
532 : (TYPE_MODE (TYPE) == XCmode && (ALIGN) < 128) \
533 ? 128 \
534 : (ALIGN)) \
535 : ((TREE_CODE (TYPE) == RECORD_TYPE \
536 || TREE_CODE (TYPE) == UNION_TYPE \
537 || TREE_CODE (TYPE) == QUAL_UNION_TYPE) \
538 && TYPE_FIELDS (TYPE)) \
539 ? ((DECL_MODE (TYPE_FIELDS (TYPE)) == DFmode && (ALIGN) < 64) \
540 ? 64 \
541 : (DECL_MODE (TYPE_FIELDS (TYPE)) == XFmode && (ALIGN) < 128) \
542 ? 128 \
543 : (ALIGN)) \
544 : TREE_CODE (TYPE) == REAL_TYPE \
545 ? ((TYPE_MODE (TYPE) == DFmode && (ALIGN) < 64) \
546 ? 64 \
547 : (TYPE_MODE (TYPE) == XFmode && (ALIGN) < 128) \
548 ? 128 \
549 : (ALIGN)) \
550 : (ALIGN))
551
505/* Set this non-zero if move instructions will actually fail to work
506 when given unaligned data. */
507#define STRICT_ALIGNMENT 0
508
509/* If bit field type is int, don't let it cross an int,
510 and give entire struct the alignment of an int. */
511/* Required on the 386 since it doesn't have bitfield insns. */
512#define PCC_BITFIELD_TYPE_MATTERS 1

--- 146 unchanged lines hidden (view full) ---

659
660/* Value is 1 if it is a good idea to tie two pseudo registers
661 when one has mode MODE1 and one has mode MODE2.
662 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
663 for any hard reg, then this must be 0 for correct output. */
664
665#define MODES_TIEABLE_P(MODE1, MODE2) \
666 ((MODE1) == (MODE2) \
552/* Set this non-zero if move instructions will actually fail to work
553 when given unaligned data. */
554#define STRICT_ALIGNMENT 0
555
556/* If bit field type is int, don't let it cross an int,
557 and give entire struct the alignment of an int. */
558/* Required on the 386 since it doesn't have bitfield insns. */
559#define PCC_BITFIELD_TYPE_MATTERS 1

--- 146 unchanged lines hidden (view full) ---

706
707/* Value is 1 if it is a good idea to tie two pseudo registers
708 when one has mode MODE1 and one has mode MODE2.
709 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
710 for any hard reg, then this must be 0 for correct output. */
711
712#define MODES_TIEABLE_P(MODE1, MODE2) \
713 ((MODE1) == (MODE2) \
667 || ((MODE1) == SImode && (MODE2) == HImode \
668 || (MODE1) == HImode && (MODE2) == SImode))
714 || ((MODE1) == SImode && (MODE2) == HImode) \
715 || ((MODE1) == HImode && (MODE2) == SImode))
669
670/* Specify the registers used for certain standard purposes.
671 The values of these macros are register numbers. */
672
673/* on the 386 the pc register is %eip, and is not usable as a general
674 register. The ordinary mov instructions won't work */
675/* #define PC_REGNUM */
676

--- 152 unchanged lines hidden (view full) ---

829#define STACK_REG_P(xop) (REG_P (xop) && \
830 REGNO (xop) >= FIRST_STACK_REG && \
831 REGNO (xop) <= LAST_STACK_REG)
832
833#define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
834
835#define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
836
716
717/* Specify the registers used for certain standard purposes.
718 The values of these macros are register numbers. */
719
720/* on the 386 the pc register is %eip, and is not usable as a general
721 register. The ordinary mov instructions won't work */
722/* #define PC_REGNUM */
723

--- 152 unchanged lines hidden (view full) ---

876#define STACK_REG_P(xop) (REG_P (xop) && \
877 REGNO (xop) >= FIRST_STACK_REG && \
878 REGNO (xop) <= LAST_STACK_REG)
879
880#define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
881
882#define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
883
837/* Try to maintain the accuracy of the death notes for regs satisfying the
838 following. Important for stack like regs, to know when to pop. */
839
840/* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
841
842/* 1 if register REGNO can magically overlap other regs.
843 Note that nonzero values work only in very special circumstances. */
844
845/* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
846
847/* The class value for index registers, and the one for base regs. */
848
849#define INDEX_REG_CLASS INDEX_REGS

--- 41 unchanged lines hidden (view full) ---

891 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
892 (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\
893 (C) == 'O' ? (VALUE) >= 0 && (VALUE) <= 32 : \
894 0)
895
896/* Similar, but for floating constants, and defining letters G and H.
897 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
898 TARGET_387 isn't set, because the stack register converter may need to
884/* 1 if register REGNO can magically overlap other regs.
885 Note that nonzero values work only in very special circumstances. */
886
887/* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
888
889/* The class value for index registers, and the one for base regs. */
890
891#define INDEX_REG_CLASS INDEX_REGS

--- 41 unchanged lines hidden (view full) ---

933 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
934 (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\
935 (C) == 'O' ? (VALUE) >= 0 && (VALUE) <= 32 : \
936 0)
937
938/* Similar, but for floating constants, and defining letters G and H.
939 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
940 TARGET_387 isn't set, because the stack register converter may need to
899 load 0.0 into the function value register.
941 load 0.0 into the function value register. */
900
942
901 We disallow these constants when -fomit-frame-pointer and compiling
902 PIC code since reload might need to force the constant to memory.
903 Forcing the constant to memory changes the elimination offsets after
904 the point where they must stay constant.
905
906 However, we must allow them after reload as completed as reg-stack.c
907 will create insns which use these constants. */
908
909#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
943#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
910 (((reload_completed || !flag_pic || !flag_omit_frame_pointer) && (C) == 'G') \
911 ? standard_80387_constant_p (VALUE) : 0)
944 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
912
913/* Place additional restrictions on the register class to use when it
914 is necessary to be able to hold a value of mode MODE in a reload
915 register for which class CLASS would ordinarily be used. */
916
917#define LIMIT_RELOAD_CLASS(MODE, CLASS) \
918 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
919 ? Q_REGS : (CLASS))

--- 6 unchanged lines hidden (view full) ---

926 reloaded into floating registers (since no move-insn can do that)
927 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
928
929/* Put float CONST_DOUBLE in the constant pool instead of fp regs.
930 QImode must go into class Q_REGS.
931 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
932 movdf to do mem-to-mem moves through integer regs. */
933
945
946/* Place additional restrictions on the register class to use when it
947 is necessary to be able to hold a value of mode MODE in a reload
948 register for which class CLASS would ordinarily be used. */
949
950#define LIMIT_RELOAD_CLASS(MODE, CLASS) \
951 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
952 ? Q_REGS : (CLASS))

--- 6 unchanged lines hidden (view full) ---

959 reloaded into floating registers (since no move-insn can do that)
960 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
961
962/* Put float CONST_DOUBLE in the constant pool instead of fp regs.
963 QImode must go into class Q_REGS.
964 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
965 movdf to do mem-to-mem moves through integer regs. */
966
934#define PREFERRED_RELOAD_CLASS(X,CLASS) \
935 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \
967#define PREFERRED_RELOAD_CLASS(X,CLASS) \
968 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode \
969 ? (standard_80387_constant_p (X) \
970 ? reg_class_subset_p (CLASS, FLOAT_REGS) ? CLASS : FLOAT_REGS \
971 : NO_REGS) \
936 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
937 : ((CLASS) == ALL_REGS \
938 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
939 : (CLASS))
940
941/* If we are copying between general and FP registers, we need a memory
942 location. */
943

--- 583 unchanged lines hidden (view full) ---

1527#endif
1528
1529#define FUNCTION_EPILOGUE(FILE, SIZE) \
1530 function_epilogue (FILE, SIZE)
1531
1532/* Output assembler code for a block containing the constant parts
1533 of a trampoline, leaving space for the variable parts. */
1534
972 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
973 : ((CLASS) == ALL_REGS \
974 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
975 : (CLASS))
976
977/* If we are copying between general and FP registers, we need a memory
978 location. */
979

--- 583 unchanged lines hidden (view full) ---

1563#endif
1564
1565#define FUNCTION_EPILOGUE(FILE, SIZE) \
1566 function_epilogue (FILE, SIZE)
1567
1568/* Output assembler code for a block containing the constant parts
1569 of a trampoline, leaving space for the variable parts. */
1570
1535/* On the 386, the trampoline contains three instructions:
1571/* On the 386, the trampoline contains two instructions:
1536 mov #STATIC,ecx
1572 mov #STATIC,ecx
1537 mov #FUNCTION,eax
1538 jmp @eax */
1539#define TRAMPOLINE_TEMPLATE(FILE) \
1540{ \
1541 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
1542 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1543 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1544 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
1545 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1546 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1547 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
1548 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
1549}
1573 jmp FUNCTION
1574 The trampoline is generated entirely at runtime. The operand of JMP
1575 is the address of FUNCTION relative to the instruction following the
1576 JMP (which is 5 bytes long). */
1550
1551/* Length in units of the trampoline for entering a nested function. */
1552
1577
1578/* Length in units of the trampoline for entering a nested function. */
1579
1553#define TRAMPOLINE_SIZE 12
1580#define TRAMPOLINE_SIZE 10
1554
1555/* Emit RTL insns to initialize the variable parts of a trampoline.
1556 FNADDR is an RTX for the address of the function's pure code.
1557 CXT is an RTX for the static chain value for the function. */
1558
1559#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1560{ \
1581
1582/* Emit RTL insns to initialize the variable parts of a trampoline.
1583 FNADDR is an RTX for the address of the function's pure code.
1584 CXT is an RTX for the static chain value for the function. */
1585
1586#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1587{ \
1588 /* Compute offset from the end of the jmp to the target function. */ \
1589 rtx disp = expand_binop (SImode, sub_optab, FNADDR, \
1590 plus_constant (TRAMP, 10), \
1591 NULL_RTX, 1, OPTAB_DIRECT); \
1592 emit_move_insn (gen_rtx_MEM (QImode, TRAMP), GEN_INT (0xb9)); \
1561 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 1)), CXT); \
1593 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 1)), CXT); \
1562 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 6)), FNADDR); \
1594 emit_move_insn (gen_rtx_MEM (QImode, plus_constant (TRAMP, 5)), GEN_INT (0xe9));\
1595 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 6)), disp); \
1563}
1564
1565/* Definitions for register eliminations.
1566
1567 This is an array of structures. Each structure initializes one pair
1568 of eliminable registers. The "from" register number is given first,
1569 followed by "to". Eliminations of the same "from" register are listed
1570 in order of preference.

--- 25 unchanged lines hidden (view full) ---

1596 its replacement, at the start of a routine. */
1597
1598#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1599{ \
1600 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1601 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1602 else \
1603 { \
1596}
1597
1598/* Definitions for register eliminations.
1599
1600 This is an array of structures. Each structure initializes one pair
1601 of eliminable registers. The "from" register number is given first,
1602 followed by "to". Eliminations of the same "from" register are listed
1603 in order of preference.

--- 25 unchanged lines hidden (view full) ---

1629 its replacement, at the start of a routine. */
1630
1631#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1632{ \
1633 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1634 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1635 else \
1636 { \
1604 int regno; \
1605 int offset = 0; \
1637 int nregs; \
1638 int offset; \
1639 int preferred_alignment = PREFERRED_STACK_BOUNDARY / BITS_PER_UNIT; \
1640 HOST_WIDE_INT tsize = ix86_compute_frame_size (get_frame_size (), \
1641 &nregs); \
1606 \
1642 \
1607 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
1608 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
1609 || ((current_function_uses_pic_offset_table \
1610 || current_function_uses_const_pool) \
1611 && flag_pic && regno == PIC_OFFSET_TABLE_REGNUM)) \
1612 offset += 4; \
1643 (OFFSET) = (tsize + nregs * UNITS_PER_WORD); \
1613 \
1644 \
1614 (OFFSET) = offset + get_frame_size (); \
1645 offset = 4; \
1646 if (frame_pointer_needed) \
1647 offset += UNITS_PER_WORD; \
1615 \
1648 \
1616 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1617 (OFFSET) += 4; /* Skip saved PC */ \
1649 if ((FROM) == ARG_POINTER_REGNUM) \
1650 (OFFSET) += offset; \
1651 else \
1652 (OFFSET) -= ((offset + preferred_alignment - 1) \
1653 & -preferred_alignment) - offset; \
1618 } \
1619}
1620
1621/* Addressing modes, and classification of registers for them. */
1622
1654 } \
1655}
1656
1657/* Addressing modes, and classification of registers for them. */
1658
1623/* #define HAVE_POST_INCREMENT */
1624/* #define HAVE_POST_DECREMENT */
1659/* #define HAVE_POST_INCREMENT 0 */
1660/* #define HAVE_POST_DECREMENT 0 */
1625
1661
1626/* #define HAVE_PRE_DECREMENT */
1627/* #define HAVE_PRE_INCREMENT */
1662/* #define HAVE_PRE_DECREMENT 0 */
1663/* #define HAVE_PRE_INCREMENT 0 */
1628
1629/* Macros to check register numbers against specific register classes. */
1630
1631/* These assume that REGNO is a hard or pseudo reg number.
1632 They give nonzero only if REGNO is a hard reg of the suitable class
1633 or a pseudo reg currently allocated to a suitable hard reg.
1634 Since they use reg_renumber, they are safe only once reg_renumber
1635 has been allocated, which happens in local-alloc.c. */

--- 62 unchanged lines hidden (view full) ---

1698 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1699 except for CONSTANT_ADDRESS_P which is usually machine-independent.
1700
1701 See legitimize_pic_address in i386.c for details as to what
1702 constitutes a legitimate address when -fpic is used. */
1703
1704#define MAX_REGS_PER_ADDRESS 2
1705
1664
1665/* Macros to check register numbers against specific register classes. */
1666
1667/* These assume that REGNO is a hard or pseudo reg number.
1668 They give nonzero only if REGNO is a hard reg of the suitable class
1669 or a pseudo reg currently allocated to a suitable hard reg.
1670 Since they use reg_renumber, they are safe only once reg_renumber
1671 has been allocated, which happens in local-alloc.c. */

--- 62 unchanged lines hidden (view full) ---

1734 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1735 except for CONSTANT_ADDRESS_P which is usually machine-independent.
1736
1737 See legitimize_pic_address in i386.c for details as to what
1738 constitutes a legitimate address when -fpic is used. */
1739
1740#define MAX_REGS_PER_ADDRESS 2
1741
1706#define CONSTANT_ADDRESS_P(X) \
1707 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1708 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1709 || GET_CODE (X) == HIGH)
1742#define CONSTANT_ADDRESS_P(X) \
1743 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1744 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST)
1710
1711/* Nonzero if the constant value X is a legitimate general operand.
1712 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1713
1745
1746/* Nonzero if the constant value X is a legitimate general operand.
1747 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1748
1714#define LEGITIMATE_CONSTANT_P(X) 1
1749#define LEGITIMATE_CONSTANT_P(X) \
1750 (GET_CODE (X) == CONST_DOUBLE ? standard_80387_constant_p (X) : 1)
1715
1716#ifdef REG_OK_STRICT
1717#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1718{ \
1719 if (legitimate_address_p (MODE, X, 1)) \
1720 goto ADDR; \
1721}
1722

--- 36 unchanged lines hidden (view full) ---

1759
1760#define REWRITE_ADDRESS(x) rewrite_address(x)
1761
1762/* Nonzero if the constant value X is a legitimate general operand
1763 when generating PIC code. It is given that flag_pic is on and
1764 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1765
1766#define LEGITIMATE_PIC_OPERAND_P(X) \
1751
1752#ifdef REG_OK_STRICT
1753#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1754{ \
1755 if (legitimate_address_p (MODE, X, 1)) \
1756 goto ADDR; \
1757}
1758

--- 36 unchanged lines hidden (view full) ---

1795
1796#define REWRITE_ADDRESS(x) rewrite_address(x)
1797
1798/* Nonzero if the constant value X is a legitimate general operand
1799 when generating PIC code. It is given that flag_pic is on and
1800 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1801
1802#define LEGITIMATE_PIC_OPERAND_P(X) \
1767 (! SYMBOLIC_CONST (X) \
1768 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1803 (! SYMBOLIC_CONST (X) || legitimate_pic_address_disp_p (X))
1769
1770#define SYMBOLIC_CONST(X) \
1771(GET_CODE (X) == SYMBOL_REF \
1772 || GET_CODE (X) == LABEL_REF \
1773 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1774
1775/* Go to LABEL if ADDR (a legitimate address expression)
1776 has an effect that depends on the machine mode it is used for.

--- 111 unchanged lines hidden (view full) ---

1888
1889/* Define this as 1 if `char' should by default be signed; else as 0. */
1890#define DEFAULT_SIGNED_CHAR 1
1891
1892/* Max number of bytes we can move from memory to memory
1893 in one reasonably fast instruction. */
1894#define MOVE_MAX 4
1895
1804
1805#define SYMBOLIC_CONST(X) \
1806(GET_CODE (X) == SYMBOL_REF \
1807 || GET_CODE (X) == LABEL_REF \
1808 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1809
1810/* Go to LABEL if ADDR (a legitimate address expression)
1811 has an effect that depends on the machine mode it is used for.

--- 111 unchanged lines hidden (view full) ---

1923
1924/* Define this as 1 if `char' should by default be signed; else as 0. */
1925#define DEFAULT_SIGNED_CHAR 1
1926
1927/* Max number of bytes we can move from memory to memory
1928 in one reasonably fast instruction. */
1929#define MOVE_MAX 4
1930
1896/* The number of scalar move insns which should be generated instead
1897 of a string move insn or a library call. Increasing the value
1898 will always make code faster, but eventually incurs high cost in
1899 increased code size.
1931/* If a memory-to-memory move would take MOVE_RATIO or more simple
1932 move-instruction pairs, we will do a movstr or libcall instead.
1933 Increasing the value will always make code faster, but eventually
1934 incurs high cost in increased code size.
1900
1901 If you don't define this, a reasonable default is used.
1902
1903 Make this large on i386, since the block move is very inefficient with small
1904 blocks, and the hard register needs of the block move require much reload
1905 work. */
1906
1907#define MOVE_RATIO 5

--- 330 unchanged lines hidden (view full) ---

2238/* A C statement (sans semicolon) to update the integer variable COST
2239 based on the relationship between INSN that is dependent on
2240 DEP_INSN through the dependence LINK. The default is to make no
2241 adjustment to COST. This can be used for example to specify to
2242 the scheduler that an output- or anti-dependence does not incur
2243 the same cost as a data-dependence. */
2244
2245#define ADJUST_COST(insn,link,dep_insn,cost) \
1935
1936 If you don't define this, a reasonable default is used.
1937
1938 Make this large on i386, since the block move is very inefficient with small
1939 blocks, and the hard register needs of the block move require much reload
1940 work. */
1941
1942#define MOVE_RATIO 5

--- 330 unchanged lines hidden (view full) ---

2273/* A C statement (sans semicolon) to update the integer variable COST
2274 based on the relationship between INSN that is dependent on
2275 DEP_INSN through the dependence LINK. The default is to make no
2276 adjustment to COST. This can be used for example to specify to
2277 the scheduler that an output- or anti-dependence does not incur
2278 the same cost as a data-dependence. */
2279
2280#define ADJUST_COST(insn,link,dep_insn,cost) \
2246 { \
2247 rtx next_inst; \
2248 if (GET_CODE (dep_insn) == CALL_INSN) \
2249 (cost) = 0; \
2250 \
2251 else if (GET_CODE (dep_insn) == INSN \
2252 && GET_CODE (PATTERN (dep_insn)) == SET \
2253 && GET_CODE (SET_DEST (PATTERN (dep_insn))) == REG \
2254 && GET_CODE (insn) == INSN \
2255 && GET_CODE (PATTERN (insn)) == SET \
2256 && !reg_overlap_mentioned_p (SET_DEST (PATTERN (dep_insn)), \
2257 SET_SRC (PATTERN (insn)))) \
2258 { \
2259 (cost) = 0; \
2260 } \
2261 \
2262 else if (GET_CODE (insn) == JUMP_INSN) \
2263 { \
2264 (cost) = 0; \
2265 } \
2266 \
2267 if (TARGET_PENTIUM) \
2268 { \
2269 if (cost !=0 && is_fp_insn (insn) && is_fp_insn (dep_insn) \
2270 && !is_fp_dest (dep_insn)) \
2271 { \
2272 (cost) = 0; \
2273 } \
2274 \
2275 if (agi_dependent (insn, dep_insn)) \
2276 { \
2277 (cost) = 3; \
2278 } \
2279 else if (GET_CODE (insn) == INSN \
2280 && GET_CODE (PATTERN (insn)) == SET \
2281 && SET_DEST (PATTERN (insn)) == cc0_rtx \
2282 && (next_inst = next_nonnote_insn (insn)) \
2283 && GET_CODE (next_inst) == JUMP_INSN) \
2284 { /* compare probably paired with jump */ \
2285 (cost) = 0; \
2286 } \
2287 } \
2288 else \
2289 if (!is_fp_dest (dep_insn)) \
2290 { \
2291 if(!agi_dependent (insn, dep_insn)) \
2292 (cost) = 0; \
2293 else if (TARGET_486) \
2294 (cost) = 2; \
2295 } \
2296 else \
2297 if (is_fp_store (insn) && is_fp_insn (dep_insn) \
2298 && NEXT_INSN (insn) && NEXT_INSN (NEXT_INSN (insn)) \
2299 && NEXT_INSN (NEXT_INSN (NEXT_INSN (insn))) \
2300 && (GET_CODE (NEXT_INSN (insn)) == INSN) \
2301 && (GET_CODE (NEXT_INSN (NEXT_INSN (insn))) == JUMP_INSN) \
2302 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) == NOTE) \
2303 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) \
2304 == NOTE_INSN_LOOP_END)) \
2305 { \
2306 (cost) = 3; \
2307 } \
2308 }
2281 (cost) = x86_adjust_cost(insn, link, dep_insn, cost)
2309
2282
2310
2311#define ADJUST_BLOCKAGE(last_insn,insn,blockage) \
2312{ \
2313 if (is_fp_store (last_insn) && is_fp_insn (insn) \
2314 && NEXT_INSN (last_insn) && NEXT_INSN (NEXT_INSN (last_insn)) \
2315 && NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn))) \
2316 && (GET_CODE (NEXT_INSN (last_insn)) == INSN) \
2317 && (GET_CODE (NEXT_INSN (NEXT_INSN (last_insn))) == JUMP_INSN) \
2318 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) == NOTE) \
2319 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) \
2320 == NOTE_INSN_LOOP_END)) \
2321 { \
2322 (blockage) = 3; \
2323 } \
2324}
2325
2283#define ADJUST_BLOCKAGE(last_insn,insn,blockage) \
2284{ \
2285 if (is_fp_store (last_insn) && is_fp_insn (insn) \
2286 && NEXT_INSN (last_insn) && NEXT_INSN (NEXT_INSN (last_insn)) \
2287 && NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn))) \
2288 && (GET_CODE (NEXT_INSN (last_insn)) == INSN) \
2289 && (GET_CODE (NEXT_INSN (NEXT_INSN (last_insn))) == JUMP_INSN) \
2290 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) == NOTE) \
2291 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) \
2292 == NOTE_INSN_LOOP_END)) \
2293 { \
2294 (blockage) = 3; \
2295 } \
2296}
2297
2298#define ISSUE_RATE ((int)ix86_cpu > (int)PROCESSOR_I486 ? 2 : 1)
2299
2326
2327/* Add any extra modes needed to represent the condition code.
2328
2329 For the i386, we need separate modes when floating-point equality
2330 comparisons are being done. */
2331
2332#define EXTRA_CC_MODES CCFPEQmode
2333

--- 267 unchanged lines hidden (view full) ---

2601 X -- don't print any sort of PIC '@' suffix for a symbol.
2602 J -- print jump insn for arithmetic_comparison_operator.
2603 s -- ??? something to do with double shifts. not actually used, afaik.
2604 C -- print a conditional move suffix corresponding to the op code.
2605 c -- likewise, but reverse the condition.
2606 F,f -- likewise, but for floating-point. */
2607
2608#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2300
2301/* Add any extra modes needed to represent the condition code.
2302
2303 For the i386, we need separate modes when floating-point equality
2304 comparisons are being done. */
2305
2306#define EXTRA_CC_MODES CCFPEQmode
2307

--- 267 unchanged lines hidden (view full) ---

2575 X -- don't print any sort of PIC '@' suffix for a symbol.
2576 J -- print jump insn for arithmetic_comparison_operator.
2577 s -- ??? something to do with double shifts. not actually used, afaik.
2578 C -- print a conditional move suffix corresponding to the op code.
2579 c -- likewise, but reverse the condition.
2580 F,f -- likewise, but for floating-point. */
2581
2582#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2609 ((CODE) == '*')
2583 ((CODE) == '*' || (CODE) == '_')
2610
2611/* Print the name of a register based on its machine mode and number.
2612 If CODE is 'w', pretend the mode is HImode.
2613 If CODE is 'b', pretend the mode is QImode.
2614 If CODE is 'k', pretend the mode is SImode.
2615 If CODE is 'h', pretend the reg is the `high' byte register.
2616 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
2617

--- 118 unchanged lines hidden (view full) ---

2736extern int i386_valid_type_attribute_p ();
2737extern int i386_return_pops_args ();
2738extern int i386_comp_type_attributes ();
2739extern void init_cumulative_args ();
2740extern void function_arg_advance ();
2741extern struct rtx_def *function_arg ();
2742extern int function_arg_partial_nregs ();
2743extern char *output_strlen_unroll ();
2584
2585/* Print the name of a register based on its machine mode and number.
2586 If CODE is 'w', pretend the mode is HImode.
2587 If CODE is 'b', pretend the mode is QImode.
2588 If CODE is 'k', pretend the mode is SImode.
2589 If CODE is 'h', pretend the reg is the `high' byte register.
2590 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
2591

--- 118 unchanged lines hidden (view full) ---

2710extern int i386_valid_type_attribute_p ();
2711extern int i386_return_pops_args ();
2712extern int i386_comp_type_attributes ();
2713extern void init_cumulative_args ();
2714extern void function_arg_advance ();
2715extern struct rtx_def *function_arg ();
2716extern int function_arg_partial_nregs ();
2717extern char *output_strlen_unroll ();
2744extern void output_op_from_reg ();
2745extern void output_to_reg ();
2746extern char *singlemove_string ();
2747extern char *output_move_double ();
2718extern char *singlemove_string ();
2719extern char *output_move_double ();
2748extern char *output_move_memory ();
2749extern char *output_move_pushmem ();
2750extern int standard_80387_constant_p ();
2751extern char *output_move_const_single ();
2752extern int symbolic_operand ();
2753extern int call_insn_operand ();
2754extern int expander_call_insn_operand ();
2755extern int symbolic_reference_mentioned_p ();
2756extern int ix86_expand_binary_operator ();

--- 11 unchanged lines hidden (view full) ---

2768extern void print_operand_address ();
2769extern void notice_update_cc ();
2770extern void split_di ();
2771extern int binary_387_op ();
2772extern int shift_op ();
2773extern int VOIDmode_compare_op ();
2774extern char *output_387_binary_op ();
2775extern char *output_fix_trunc ();
2720extern char *output_move_pushmem ();
2721extern int standard_80387_constant_p ();
2722extern char *output_move_const_single ();
2723extern int symbolic_operand ();
2724extern int call_insn_operand ();
2725extern int expander_call_insn_operand ();
2726extern int symbolic_reference_mentioned_p ();
2727extern int ix86_expand_binary_operator ();

--- 11 unchanged lines hidden (view full) ---

2739extern void print_operand_address ();
2740extern void notice_update_cc ();
2741extern void split_di ();
2742extern int binary_387_op ();
2743extern int shift_op ();
2744extern int VOIDmode_compare_op ();
2745extern char *output_387_binary_op ();
2746extern char *output_fix_trunc ();
2747extern void output_float_extend ();
2776extern char *output_float_compare ();
2777extern char *output_fp_cc0_set ();
2778extern void save_386_machine_status ();
2779extern void restore_386_machine_status ();
2780extern void clear_386_stack_locals ();
2781extern struct rtx_def *assign_386_stack_local ();
2782extern int is_mul ();
2783extern int is_div ();

--- 4 unchanged lines hidden (view full) ---

2788extern int is_fp_insn ();
2789extern int is_fp_dest ();
2790extern int is_fp_store ();
2791extern int agi_dependent ();
2792extern int reg_mentioned_in_mem ();
2793extern char *output_int_conditional_move ();
2794extern char *output_fp_conditional_move ();
2795extern int ix86_can_use_return_insn_p ();
2748extern char *output_float_compare ();
2749extern char *output_fp_cc0_set ();
2750extern void save_386_machine_status ();
2751extern void restore_386_machine_status ();
2752extern void clear_386_stack_locals ();
2753extern struct rtx_def *assign_386_stack_local ();
2754extern int is_mul ();
2755extern int is_div ();

--- 4 unchanged lines hidden (view full) ---

2760extern int is_fp_insn ();
2761extern int is_fp_dest ();
2762extern int is_fp_store ();
2763extern int agi_dependent ();
2764extern int reg_mentioned_in_mem ();
2765extern char *output_int_conditional_move ();
2766extern char *output_fp_conditional_move ();
2767extern int ix86_can_use_return_insn_p ();
2768extern int small_shift_operand ();
2769extern char *output_ashl ();
2770extern int memory_address_info ();
2796
2797#ifdef NOTYET
2798extern struct rtx_def *copy_all_rtx ();
2799extern void rewrite_address ();
2800#endif
2801
2802/* Variables in i386.c */
2803extern char *ix86_cpu_string; /* for -mcpu=<xxx> */
2804extern char *ix86_arch_string; /* for -march=<xxx> */
2805extern char *i386_reg_alloc_order; /* register allocation order */
2806extern char *i386_regparm_string; /* # registers to use to pass args */
2807extern char *i386_align_loops_string; /* power of two alignment for loops */
2808extern char *i386_align_jumps_string; /* power of two alignment for non-loop jumps */
2809extern char *i386_align_funcs_string; /* power of two alignment for functions */
2771
2772#ifdef NOTYET
2773extern struct rtx_def *copy_all_rtx ();
2774extern void rewrite_address ();
2775#endif
2776
2777/* Variables in i386.c */
2778extern char *ix86_cpu_string; /* for -mcpu=<xxx> */
2779extern char *ix86_arch_string; /* for -march=<xxx> */
2780extern char *i386_reg_alloc_order; /* register allocation order */
2781extern char *i386_regparm_string; /* # registers to use to pass args */
2782extern char *i386_align_loops_string; /* power of two alignment for loops */
2783extern char *i386_align_jumps_string; /* power of two alignment for non-loop jumps */
2784extern char *i386_align_funcs_string; /* power of two alignment for functions */
2785extern char *i386_preferred_stack_boundary_string;/* power of two alignment for stack boundary */
2810extern char *i386_branch_cost_string; /* values 1-5: see jump.c */
2811extern int i386_regparm; /* i386_regparm_string as a number */
2812extern int i386_align_loops; /* power of two alignment for loops */
2813extern int i386_align_jumps; /* power of two alignment for non-loop jumps */
2814extern int i386_align_funcs; /* power of two alignment for functions */
2786extern char *i386_branch_cost_string; /* values 1-5: see jump.c */
2787extern int i386_regparm; /* i386_regparm_string as a number */
2788extern int i386_align_loops; /* power of two alignment for loops */
2789extern int i386_align_jumps; /* power of two alignment for non-loop jumps */
2790extern int i386_align_funcs; /* power of two alignment for functions */
2791extern int i386_preferred_stack_boundary; /* preferred stack boundary alignment in bits */
2815extern int i386_branch_cost; /* values 1-5: see jump.c */
2816extern char *hi_reg_name[]; /* names for 16 bit regs */
2817extern char *qi_reg_name[]; /* names for 8 bit regs (low) */
2818extern char *qi_high_reg_name[]; /* names for 8 bit regs (high) */
2819extern enum reg_class regclass_map[]; /* smalled class containing REGNO */
2820extern struct rtx_def *i386_compare_op0; /* operand 0 for comparisons */
2821extern struct rtx_def *i386_compare_op1; /* operand 1 for comparisons */
2822

--- 13 unchanged lines hidden --- 		2792extern int i386_branch_cost; /* values 1-5: see jump.c */
2793extern char *hi_reg_name[]; /* names for 16 bit regs */
2794extern char *qi_reg_name[]; /* names for 8 bit regs (low) */
2795extern char *qi_high_reg_name[]; /* names for 8 bit regs (high) */
2796extern enum reg_class regclass_map[]; /* smalled class containing REGNO */
2797extern struct rtx_def *i386_compare_op0; /* operand 0 for comparisons */
2798extern struct rtx_def *i386_compare_op1; /* operand 1 for comparisons */
2799

--- 13 unchanged lines hidden ---