143a144
> #define TARGET_AMDFAM10 (ix86_tune == PROCESSOR_AMDFAM10)
161a163
> extern const int x86_sse_unaligned_move_optimal;
166c168
< extern const int x86_cmpxchg, x86_cmpxchg8b, x86_cmpxchg16b, x86_xadd;
---
> extern const int x86_cmpxchg, x86_cmpxchg8b, x86_xadd;
170c172
< extern int x86_prefetch_sse;
---
> extern int x86_prefetch_sse, x86_cmpxchg16b;
209a212,213
> #define TARGET_SSE_UNALIGNED_MOVE_OPTIMAL \
> (x86_sse_unaligned_move_optimal & TUNEMASK)
240c244
< #define TARGET_CMPXCHG16B (x86_cmpxchg16b & (1 << ix86_arch))
---
> #define TARGET_CMPXCHG16B (x86_cmpxchg16b)
401a406,407
> else if (TARGET_AMDFAM10) \
> builtin_define ("__tune_amdfam10__"); \
422a429,430
> if (TARGET_SSE4A) \
> builtin_define ("__SSE4A__"); \
477a486,490
> else if (ix86_arch == PROCESSOR_AMDFAM10) \
> { \
> builtin_define ("__amdfam10"); \
> builtin_define ("__amdfam10__"); \
> } \
515a529
> #define TARGET_CPU_DEFAULT_amdfam10 20
522c536
< "core2", "generic"}
---
> "core2", "generic", "amdfam10"}
2110a2125
> PROCESSOR_AMDFAM10,
> #define TARGET_AMDFAM10 (ix86_tune == PROCESSOR_AMDFAM10)
161a163
> extern const int x86_sse_unaligned_move_optimal;
166c168
< extern const int x86_cmpxchg, x86_cmpxchg8b, x86_cmpxchg16b, x86_xadd;
---
> extern const int x86_cmpxchg, x86_cmpxchg8b, x86_xadd;
170c172
< extern int x86_prefetch_sse;
---
> extern int x86_prefetch_sse, x86_cmpxchg16b;
209a212,213
> #define TARGET_SSE_UNALIGNED_MOVE_OPTIMAL \
> (x86_sse_unaligned_move_optimal & TUNEMASK)
240c244
< #define TARGET_CMPXCHG16B (x86_cmpxchg16b & (1 << ix86_arch))
---
> #define TARGET_CMPXCHG16B (x86_cmpxchg16b)
401a406,407
> else if (TARGET_AMDFAM10) \
> builtin_define ("__tune_amdfam10__"); \
422a429,430
> if (TARGET_SSE4A) \
> builtin_define ("__SSE4A__"); \
477a486,490
> else if (ix86_arch == PROCESSOR_AMDFAM10) \
> { \
> builtin_define ("__amdfam10"); \
> builtin_define ("__amdfam10__"); \
> } \
515a529
> #define TARGET_CPU_DEFAULT_amdfam10 20
522c536
< "core2", "generic"}
---
> "core2", "generic", "amdfam10"}
2110a2125
> PROCESSOR_AMDFAM10,