1/* Support functions for the unwinder.
2 Copyright (C) 2003, 2004, 2005 Free Software Foundation, Inc.
3 Contributed by Paul Brook
4
5 This file is free software; you can redistribute it and/or modify it
6 under the terms of the GNU General Public License as published by the
7 Free Software Foundation; either version 2, or (at your option) any
8 later version.
9
10 In addition to the permissions in the GNU General Public License, the
11 Free Software Foundation gives you unlimited permission to link the
12 compiled version of this file into combinations with other programs,
13 and to distribute those combinations without any restriction coming
14 from the use of this file. (The General Public License restrictions
15 do apply in other respects; for example, they cover modification of
16 the file, and distribution when not linked into a combine
17 executable.)
18
19 This file is distributed in the hope that it will be useful, but
20 WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 General Public License for more details.
23
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, 51 Franklin Street, Fifth Floor,
27 Boston, MA 02110-1301, USA. */
28
29#ifndef __symbian__
30
31#include "lib1funcs.asm"
32
33.macro UNPREFIX name
34 .global SYM (\name)
35 EQUIV SYM (\name), SYM (__\name)
36.endm
37
38/* r0 points to a 16-word block. Upload these values to the actual core
39 state. */
40ARM_FUNC_START restore_core_regs
41 /* We must use sp as the base register when restoring sp. Push the
42 last 3 registers onto the top of the current stack to achieve
43 this. */
44 add r1, r0, #52
45 ldmia r1, {r3, r4, r5} /* {sp, lr, pc}. */
46#ifdef __INTERWORKING__
47 /* Restore pc into ip. */
48 mov r2, r5
49 stmfd sp!, {r2, r3, r4}
50#else
51 stmfd sp!, {r3, r4, r5}
52#endif
53 /* Don't bother restoring ip. */
54 ldmia r0, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp}
55 /* Pop the three registers we pushed earlier. */
56#ifdef __INTERWORKING__
57 ldmfd sp, {ip, sp, lr}
58 bx ip
59#else
60 ldmfd sp, {sp, lr, pc}
61#endif
62 FUNC_END restore_core_regs
63 UNPREFIX restore_core_regs
64
65/* Load VFP registers d0-d15 from the address in r0. */
66ARM_FUNC_START gnu_Unwind_Restore_VFP
67 /* Use the generic coprocessor form so that gas doesn't complain
68 on soft-float targets. */
69 ldc p11,cr0,[r0],{0x21} /* fldmiax r0, {d0-d15} */
70 RET
71
72/* Store VFR regsters d0-d15 to the address in r0. */
73ARM_FUNC_START gnu_Unwind_Save_VFP
74 /* Use the generic coprocessor form so that gas doesn't complain
75 on soft-float targets. */
76 stc p11,cr0,[r0],{0x21} /* fstmiax r0, {d0-d15} */
77 RET
78
79/* Wrappers to save core registers, then call the real routine. */
80
81.macro UNWIND_WRAPPER name nargs
82 ARM_FUNC_START \name
83 /* Create a phase2_vrs structure. */
84 /* Split reg push in two to ensure the correct value for sp. */
85 stmfd sp!, {sp, lr, pc}
86 stmfd sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip}
87
88 /* Demand-save flags, plus an extra word for alignment. */
89 mov r3, #0
90 stmfd sp!, {r2, r3}
91
92 /* Point r1 at the block. Pass r[0..nargs) unchanged. */
93 add r\nargs, sp, #4
94#if defined(__thumb__)
95 /* Switch back to thumb mode to avoid interworking hassle. */
96 adr ip, .L1_\name
97 orr ip, ip, #1
98 bx ip
99 .thumb
100.L1_\name:
101 bl SYM (__gnu\name) __PLT__
102 ldr r3, [sp, #64]
103 add sp, #72
104 bx r3
105#else
106 bl SYM (__gnu\name) __PLT__
107 ldr lr, [sp, #64]
108 add sp, sp, #72
109 RET
110#endif
111 FUNC_END \name
112 UNPREFIX \name
113.endm
114
115UNWIND_WRAPPER _Unwind_RaiseException 1
116UNWIND_WRAPPER _Unwind_Resume 1
117UNWIND_WRAPPER _Unwind_Resume_or_Rethrow 1
118UNWIND_WRAPPER _Unwind_ForcedUnwind 3
119UNWIND_WRAPPER _Unwind_Backtrace 2
120
121#endif /* ndef __symbian__ */