Deleted Added
sdiff udiff text old ( 259947 ) new ( 260074 )
full compact
12007-08-08 Andrew Haley <aph@redhat.com> (r128087)
2
3 * config/arm/libunwind.S (UNWIND_WRAPPER _Unwind_Backtrace): New.
4 * config/arm/unwind-arm.h (__gnu_Unwind_Backtrace): New.
5 * config/arm/unwind-arm.c (__gnu_Unwind_Backtrace): New.
6
72007-07-12 Geoffrey Keating <geoffk@apple.com> (r126588)
8
9 * builtins.c (get_pointer_alignment): Honor DECL_ALIGN on a
10 FUNCTION_DECL.
11 * tree.c (build_decl_stat): Move code from here...
12 (make_node_stat): ... to here. Don't uselessly clear DECL_USER_ALIGN.
13 (expr_align): Honor DECL_ALIGN on a FUNCTION_DECL. Add comment
14 about using DECL_ALIGN of LABEL_DECL and CONST_DECL.
15 * tree.h (DECL_USER_ALIGN): Fix misplaced comment.
16 * varasm.c (assemble_start_function): Use DECL_ALIGN instead of
17 FUNCTION_BOUNDARY.
18
192007-07-09 Geoffrey Keating <geoffk@apple.com> (r126529)
20
21 PR 32617
22 * c-common.c (c_alignof_expr): Look at DECL_ALIGN of
23 FUNCTION_DECLs.
24 (handle_aligned_attribute): Allow use on FUNCTION_DECLs.
25 * varasm.c (assemble_start_function): Honor DECL_ALIGN
26 for FUNCTION_DECLs. Don't use align_functions_log if
27 DECL_USER_ALIGN.
28 * print-tree.c (print_node): Print DECL_ALIGN and DECL_USER_ALIGN
29 even for FUNCTION_DECLs.
30 * c-decl.c (merge_decls): Propagate DECL_ALIGN even for
31 FUNCTION_DECLs.
32 * tree.h (DECL_ALIGN): Update for new location of 'align'.
33 (DECL_FUNCTION_CODE): Update for new location and name of
34 'function_code'.
35 (DECL_OFFSET_ALIGN): Update for new location of 'off_align'.
36 (struct tree_decl_common): Move 'align' and 'off_align' out
37 of union, ensure they're still on a 32-bit boundary. Remove
38 other fields in union 'u1'.
39 (struct tree_function_decl): Add field 'function_code' replacing
40 'u1.f' in tree_decl_common.
41 * tree.c (build_decl_stat): Set initial value of DECL_ALIGN.
42 * doc/extend.texi (Function Attributes): Add 'aligned' attribute.
43 (Variable Attributes): Cross-reference 'aligned' attribute
44 to Function Attributes.
45 * flags.h (force_align_functions_log): Delete.
46 * toplev.c (force_align_functions_log): Delete.
47
482007-06-28 Geoffrey Keating <geoffk@apple.com> (r126088)
49
50 * doc/invoke.texi (C++ Dialect Options): Document
51 fvisibility-ms-compat.
52 * c.opt (fvisibility-ms-compat): New.
53
542007-06-05 Joerg Wunsch <j.gnu@uriah.heep.sax.de> (r125346)
55
56 PR preprocessor/23479
57 * doc/extend.texi: Document the 0b-prefixed binary integer
58 constant extension.
59
602007-05-31 Eric Christopher <echristo@apple.com> (r125246)
61
62 * expr.c (convert_move): Assert that we don't have a BLKmode
63 operand.
64 (store_expr): Handle BLKmode moves by calling emit_block_move.
65
662007-05-31 Daniel Berlin <dberlin@dberlin.org> (r125239)
67
68 * c-typeck.c (build_indirect_ref): Include type in error message.
69 (build_binary_op): Pass types to binary_op_error.
70 * c-common.c (binary_op_error): Take two type arguments, print out
71 types with error.
72 * c-common.h (binary_op_error): Update prototype.
73
742007-05-27 Eric Christopher <echristo@apple.com> (r125116)
75
76 * config/rs6000/rs6000.c (rs6000_emit_prologue): Update
77 sp_offset depending on stack size. Save r12 depending
78 on registers we're saving later.
79 (rs6000_emit_epilogue): Update sp_offset depending only
80 on stack size.
81
822007-05-24 Richard Sandiford <rsandifo@nildram.co.uk> (r125037)
83
84 * postreload-gcse.c (reg_changed_after_insn_p): New function.
85 (oprs_unchanged_p): Use it to check all registers in a REG.
86 (record_opr_changes): Look for clobbers in CALL_INSN_FUNCTION_USAGE.
87 (reg_set_between_after_reload_p): Delete.
88 (reg_used_between_after_reload_p): Likewise.
89 (reg_set_or_used_since_bb_start): Likewise.
90 (eliminate_partially_redundant_load): Use reg_changed_after_insn_p
91 and reg_used_between_p instead of reg_set_or_used_since_bb_start.
92 Use reg_set_between_p instead of reg_set_between_after_reload_p.
93 * rtlanal.c (reg_set_p): Check whether REG overlaps
94 regs_invalidated_by_call, rather than just checking the
95 membership of REGNO (REG).
96
972007-05-18 Geoffrey Keating <geoffk@apple.com> (r124839)
98
99 * dwarf2out.c (print_die): Use '%ld' not '%lu' to print a 'long'.
100 (output_die): Use 'unsigned long' with %x.
101 * sched-vis.c (print_value): Use 'unsigned HOST_WIDE_INT' and
102 HOST_WIDE_INT_PRINT_HEX to print HOST_WIDE_INT.
103 * tree-dump.c (dump_pointer): Use 'unsigned long' for %lx.
104
1052007-05-16 Eric Christopher <echristo@apple.com> (r124763)
106
107 * config/rs6000/rs6000.c (rs6000_emit_prologue): Move altivec register
108 saving after stack push. Set sp_offset whenever we push.
109 (rs6000_emit_epilogue): Move altivec register restore before stack push.
110
1112007-05-03 Ian Lance Taylor <iant@google.com> (r124381)
112
113 * config/rs6000/rs6000.c (rs6000_override_options): Don't set
114 MASK_PPC_GFXOPT for 8540 or 8548.
115
1162007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124341)
117
118 * doc/invoke.texi: Fix typo, 'AMD Family 10h core' instead of
119 'AMD Family 10 core'.
120
1212007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124339)
122
123 * config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3
124 and athlon64-sse3 as improved versions of k8, opteron and athlon64
125 with SSE3 instruction set support.
126 * doc/invoke.texi: Likewise.
127
1282007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124330)
129
130 * config/i386/i386.c (override_options): Tuning 32-byte loop
131 alignment for amdfam10 architecture. Increasing the max loop
132 alignment to 24 bytes.
133
1342007-04-16 Lawrence Crowl <crowl@google.com> (r123909)
135
136 * doc/invoke.texi (Debugging Options): Add documentation for the
137 -femit-struct-debug options -femit-struct-debug-baseonly,
138 -femit-struct-debug-reduced, and
139 -femit-struct-debug-detailed[=...].
140
141 * c-opts.c (c_common_handle_option): Add
142 OPT_femit_struct_debug_baseonly, OPT_femit_struct_debug_reduced,
143 and OPT_femit_struct_debug_detailed_.
144 * c.opt: Add specifications for
145 -femit-struct-debug-baseonly, -femit-struct-debug-reduced,
146 and -femit-struct-debug-detailed[=...].
147 * opts.c (set_struct_debug_option): Parse the
148 -femit-struct-debug-... options.
149 * opts.c (matches_main_base, main_input_basename,
150 main_input_baselength, base_of_path, matches_main_base): Add
151 variables and functions to compare header base name to compilation
152 unit base name.
153 * opts.c (should_emit_struct_debug): Add to determine to emit a
154 structure based on the option.
155 (dump_struct_debug) Also disabled function to debug this
156 function.
157 * opts.c (handle_options): Save the base name of the
158 compilation unit.
159
160 * langhooks-def.h (LANG_HOOKS_GENERIC_TYPE_P): Define.
161 (LANG_HOOKS_FOR_TYPES_INITIALIZER): Add.
162 This hook indicates if a type is generic. Set it by default
163 to "never generic".
164 * langhooks.h (struct lang_hooks_for_types): Add a new hook
165 to determine if a struct type is generic or not.
166 * cp/cp-tree.h (class_tmpl_impl_spec_p): Declare a C++ hook.
167 * cp/tree.c (class_tmpl_impl_spec_p): Implement the C++ hook.
168 * cp/cp-lang.c (LANG_HOOKS_GENERIC_TYPE_P): Override null C hook
169 with live C++ hook.
170
171 * flags.h (enum debug_info_usage): Add an enumeration to describe
172 a program's use of a structure type.
173 * dwarf2out.c (gen_struct_or_union_type_die): Add a new parameter
174 to indicate the program's usage of the type. Filter structs based
175 on the -femit-struct-debug-... specification.
176 (gen_type_die): Split into two routines, gen_type_die and
177 gen_type_die_with_usage. gen_type_die is now a wrapper
178 that assumes direct usage.
179 (gen_type_die_with_usage): Replace calls to gen_type_die
180 with gen_type_die_with_usage adding the program usage of
181 the referenced type.
182 (dwarf2out_imported_module_or_decl): Suppress struct debug
183 information using should_emit_struct_debug when appropriate.
184
1852007-04-16 Ian Lance Taylor <iant@google.com> (r123906)
186
187 * tree-ssa-propagate.c (cfg_blocks_add): Insert blocks with fewer
188 predecessors at head rather than tail.
189
190
1912007-04-12 Richard Guenther <rguenther@suse.de> (r123736)
192
193 PR tree-optimization/24689
194 PR tree-optimization/31307
195 * fold-const.c (operand_equal_p): Compare INTEGER_CST array
196 indices by value.
197 * gimplify.c (canonicalize_addr_expr): To be consistent with
198 gimplify_compound_lval only set operands two and three of
199 ARRAY_REFs if they are not gimple_min_invariant. This makes
200 it never at this place.
201 * tree-ssa-ccp.c (maybe_fold_offset_to_array_ref): Likewise.
202
2032007-04-07 H.J. Lu <hongjiu.lu@intel.com> (r123639)
204
205 * config/i386/i386.c (ix86_handle_option): Handle SSSE3.
206
2072007-03-28 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r123313)
208
209 * config.gcc: Accept barcelona as a variant of amdfam10.
210 * config/i386/i386.c (override_options): Likewise.
211 * doc/invoke.texi: Likewise.
212
2132007-03-12 Seongbae Park <seongbae.park@gmail.com> (r122851)
214
215 * c-decl.c (warn_variable_length_array): New function.
216 Refactored from grokdeclarator to handle warn_vla
217 and handle unnamed array case.
218 (grokdeclarator): Refactored VLA warning case.
219 * c.opt (Wvla): New flag.
220
2212007-03-11 Ian Lance Taylor <iant@google.com> (r122831 - partial)
222
223 * tree-vrp.c (vrp_int_const_binop): Handle PLUS_EXPR and
224 the *_DIV_EXPR codes correctly with overflow infinities.
225
2262007-02-09 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r121763)
227
228 * config/i386/driver-i386.c: Turn on -mtune=native for AMDFAM10.
229 (bit_SSE4a): New.
230
2312007-02-08 Harsha Jagasia <harsha.jagasia@amd.com> (r121726)
232
233 * config/i386/xmmintrin.h: Make inclusion of emmintrin.h
234 conditional to __SSE2__.
235 (Entries below should have been added to first ChangeLog
236 entry for amdfam10 dated 2007-02-05)
237 * config/i386/emmintrin.h: Generate #error if __SSE2__ is not
238 defined.
239 * config/i386/pmmintrin.h: Generate #error if __SSE3__ is not
240 defined.
241 * config/i386/tmmintrin.h: Generate #error if __SSSE3__ is not
242 defined.
243
2442007-02-07 Jakub Jelinek <jakub@redhat.com> (r121687)
245
246 * config/i386/i386.c (override_options): Set PTA_SSSE3 for core2.
247
2482007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625)
249
250 * config/i386/athlon.md (athlon_fldxf_k8, athlon_fld_k8,
251 athlon_fstxf_k8, athlon_fst_k8, athlon_fist, athlon_fmov,
252 athlon_fadd_load, athlon_fadd_load_k8, athlon_fadd, athlon_fmul,
253 athlon_fmul_load, athlon_fmul_load_k8, athlon_fsgn,
254 athlon_fdiv_load, athlon_fdiv_load_k8, athlon_fdiv_k8,
255 athlon_fpspc_load, athlon_fpspc, athlon_fcmov_load,
256 athlon_fcmov_load_k8, athlon_fcmov_k8, athlon_fcomi_load_k8,
257 athlon_fcomi, athlon_fcom_load_k8, athlon_fcom): Added amdfam10.
258
2592007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625)
260
261 * config/i386/i386.md (x86_sahf_1, cmpfp_i_mixed, cmpfp_i_sse,
262 cmpfp_i_i387, cmpfp_iu_mixed, cmpfp_iu_sse, cmpfp_iu_387,
263 swapsi, swaphi_1, swapqi_1, swapdi_rex64, fix_truncsfdi_sse,
264 fix_truncdfdi_sse, fix_truncsfsi_sse, fix_truncdfsi_sse,
265 x86_fldcw_1, floatsisf2_mixed, floatsisf2_sse, floatdisf2_mixed,
266 floatdisf2_sse, floatsidf2_mixed, floatsidf2_sse,
267 floatdidf2_mixed, floatdidf2_sse, muldi3_1_rex64, mulsi3_1,
268 mulsi3_1_zext, mulhi3_1, mulqi3_1, umulqihi3_1, mulqihi3_insn,
269 umulditi3_insn, umulsidi3_insn, mulditi3_insn, mulsidi3_insn,
270 umuldi3_highpart_rex64, umulsi3_highpart_insn,
271 umulsi3_highpart_zext, smuldi3_highpart_rex64,
272 smulsi3_highpart_insn, smulsi3_highpart_zext, x86_64_shld,
273 x86_shld_1, x86_64_shrd, sqrtsf2_mixed, sqrtsf2_sse,
274 sqrtsf2_i387, sqrtdf2_mixed, sqrtdf2_sse, sqrtdf2_i387,
275 sqrtextendsfdf2_i387, sqrtxf2, sqrtextendsfxf2_i387,
276 sqrtextenddfxf2_i387): Added amdfam10_decode.
277
278 * config/i386/athlon.md (athlon_idirect_amdfam10,
279 athlon_ivector_amdfam10, athlon_idirect_load_amdfam10,
280 athlon_ivector_load_amdfam10, athlon_idirect_both_amdfam10,
281 athlon_ivector_both_amdfam10, athlon_idirect_store_amdfam10,
282 athlon_ivector_store_amdfam10): New define_insn_reservation.
283 (athlon_idirect_loadmov, athlon_idirect_movstore): Added
284 amdfam10.
285
2862007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625)
287
288 * config/i386/athlon.md (athlon_call_amdfam10,
289 athlon_pop_amdfam10, athlon_lea_amdfam10): New
290 define_insn_reservation.
291 (athlon_branch, athlon_push, athlon_leave_k8, athlon_imul_k8,
292 athlon_imul_k8_DI, athlon_imul_mem_k8, athlon_imul_mem_k8_DI,
293 athlon_idiv, athlon_idiv_mem, athlon_str): Added amdfam10.
294
2952007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625)
296
297 * config/i386/athlon.md (athlon_sseld_amdfam10,
298 athlon_mmxld_amdfam10, athlon_ssest_amdfam10,
299 athlon_mmxssest_short_amdfam10): New define_insn_reservation.
300
3012007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625)
302
303 * config/i386/athlon.md (athlon_sseins_amdfam10): New
304 define_insn_reservation.
305 * config/i386/i386.md (sseins): Added sseins to define_attr type
306 and define_attr unit.
307 * config/i386/sse.md: Set type attribute to sseins for insertq
308 and insertqi.
309
3102007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625)
311
312 * config/i386/athlon.md (sselog_load_amdfam10, sselog_amdfam10,
313 ssecmpvector_load_amdfam10, ssecmpvector_amdfam10,
314 ssecomi_load_amdfam10, ssecomi_amdfam10,
315 sseaddvector_load_amdfam10, sseaddvector_amdfam10): New
316 define_insn_reservation.
317 (ssecmp_load_k8, ssecmp, sseadd_load_k8, seadd): Added amdfam10.
318
3192007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625)
320
321 * config/i386/athlon.md (cvtss2sd_load_amdfam10,
322 cvtss2sd_amdfam10, cvtps2pd_load_amdfam10, cvtps2pd_amdfam10,
323 cvtsi2sd_load_amdfam10, cvtsi2ss_load_amdfam10,
324 cvtsi2sd_amdfam10, cvtsi2ss_amdfam10, cvtsd2ss_load_amdfam10,
325 cvtsd2ss_amdfam10, cvtpd2ps_load_amdfam10, cvtpd2ps_amdfam10,
326 cvtsX2si_load_amdfam10, cvtsX2si_amdfam10): New
327 define_insn_reservation.
328
329 * config/i386/sse.md (cvtsi2ss, cvtsi2ssq, cvtss2si,
330 cvtss2siq, cvttss2si, cvttss2siq, cvtsi2sd, cvtsi2sdq,
331 cvtsd2si, cvtsd2siq, cvttsd2si, cvttsd2siq,
332 cvtpd2dq, cvttpd2dq, cvtsd2ss, cvtss2sd,
333 cvtpd2ps, cvtps2pd): Added amdfam10_decode attribute.
334
3352007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625)
336
337 * config/i386/athlon.md (athlon_ssedivvector_amdfam10,
338 athlon_ssedivvector_load_amdfam10, athlon_ssemulvector_amdfam10,
339 athlon_ssemulvector_load_amdfam10): New define_insn_reservation.
340 (athlon_ssediv, athlon_ssediv_load_k8, athlon_ssemul,
341 athlon_ssemul_load_k8): Added amdfam10.
342
3432007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625)
344
345 * config/i386/i386.h (TARGET_SSE_UNALIGNED_MOVE_OPTIMAL): New macro.
346 (x86_sse_unaligned_move_optimal): New variable.
347
348 * config/i386/i386.c (x86_sse_unaligned_move_optimal): Enable for
349 m_AMDFAM10.
350 (ix86_expand_vector_move_misalign): Add code to generate movupd/movups
351 for unaligned vector SSE double/single precision loads for AMDFAM10.
352
3532007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625)
354
355 * config/i386/i386.h (TARGET_AMDFAM10): New macro.
356 (TARGET_CPU_CPP_BUILTINS): Add code for amdfam10.
357 Define TARGET_CPU_DEFAULT_amdfam10.
358 (TARGET_CPU_DEFAULT_NAMES): Add amdfam10.
359 (processor_type): Add PROCESSOR_AMDFAM10.
360
361 * config/i386/i386.md: Add amdfam10 as a new cpu attribute to match
362 processor_type in config/i386/i386.h.
363 Enable imul peepholes for TARGET_AMDFAM10.
364
365 * config.gcc: Add support for --with-cpu option for amdfam10.
366
367 * config/i386/i386.c (amdfam10_cost): New variable.
368 (m_AMDFAM10): New macro.
369 (m_ATHLON_K8_AMDFAM10): New macro.
370 (x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen,
371 x86_cmove, x86_3dnow_a, x86_deep_branch, x86_use_simode_fiop,
372 x86_promote_QImode, x86_integer_DFmode_moves,
373 x86_partial_reg_dependency, x86_memory_mismatch_stall,
374 x86_accumulate_outgoing_args, x86_arch_always_fancy_math_387,
375 x86_sse_partial_reg_dependency, x86_sse_typeless_stores,
376 x86_use_ffreep, x86_use_incdec, x86_four_jump_limit,
377 x86_schedule, x86_use_bt, x86_cmpxchg16b, x86_pad_returns):
378 Enable/disable for amdfam10.
379 (override_options): Add amdfam10_cost to processor_target_table.
380 Set up PROCESSOR_AMDFAM10 for amdfam10 entry in
381 processor_alias_table.
382 (ix86_issue_rate): Add PROCESSOR_AMDFAM10.
383 (ix86_adjust_cost): Add code for amdfam10.
384
3852007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625)
386
387 * config/i386/i386.opt: Add new Advanced Bit Manipulation (-mabm)
388 instruction set feature flag. Add new (-mpopcnt) flag for popcnt
389 instruction. Add new SSE4A (-msse4a) instruction set feature flag.
390 * config/i386/i386.h: Add builtin definition for SSE4A.
391 * config/i386/i386.md: Add support for ABM instructions
392 (popcnt and lzcnt).
393 * config/i386/sse.md: Add support for SSE4A instructions
394 (movntss, movntsd, extrq, insertq).
395 * config/i386/i386.c: Add support for ABM and SSE4A builtins.
396 Add -march=amdfam10 flag.
397 * config/i386/ammintrin.h: Add support for SSE4A intrinsics.
398 * doc/invoke.texi: Add documentation on flags for sse4a, abm, popcnt
399 and amdfam10.
400 * doc/extend.texi: Add documentation for SSE4A builtins.
401
4022007-01-24 Jakub Jelinek <jakub@redhat.com> (r121140)
403
404 * config/i386/i386.h (x86_cmpxchg16b): Remove const.
405 (TARGET_CMPXCHG16B): Define to x86_cmpxchg16b.
406 * config/i386/i386.c (x86_cmpxchg16b): Remove const.
407 (override_options): Add PTA_CX16 flag. Set x86_cmpxchg16b
408 for CPUs that have PTA_CX16 set.
409
4102007-01-17 Eric Christopher <echristo@apple.com> (r120846)
411
412 * config.gcc: Support core2 processor.
413
4082007-01-08 Geoffrey Keating <geoffk@apple.com> (r120611)
4142007-01-11 Joseph Myers <joseph@codesourcery.com> (r120688)
415
416 * c-common.c (vector_types_convertible_p): Treat opaque types as
417 always convertible if they have the same size, but not otherwise.
418
4192007-01-08 Geoffrey Keating <geoffk@apple.com> (r120611)
420
421 * target.h (struct gcc_target): New field library_rtti_comdat.
422 * target-def.h (TARGET_CXX_LIBRARY_RTTI_COMDAT): New.
423 (TARGET_CXX): Add TARGET_CXX_LIBRARY_RTTI_COMDAT.
424 * doc/tm.texi (C++ ABI): Document TARGET_CXX_LIBRARY_RTTI_COMDAT.
425 * config/darwin.h (TARGET_CXX_LIBRARY_RTTI_COMDAT): Define.
426
4272007-01-08 Mark Shinwell <shinwell@codesourcery.com> (r120572)
428
429 * c.opt: Add -flax-vector-conversions.
430 * c-typeck.c (convert_for_assignment): Pass flag to
431 vector_types_convertible_p to allow emission of note.
432 (digest_init): Likewise.
433 * c-opts.c: Handle -flax-vector-conversions.
434 * c-common.c (flag_lax_vector_conversions): New.
435 (vector_types_convertible_p): Unless -flax-vector conversions
436 has been passed, disallow conversions between vectors with
437 differing numbers of subparts and/or element types. If such
438 a conversion is disallowed, possibly emit a note on the first
439 occasion only to inform the user of -flax-vector-conversions.
440 The new last argument specifies this.
441 * c-common.h (flag_lax_vector_conversions): New.
442 (vector_types_convertible_p): Add extra argument.
443 * config/i386/i386.c (ix86_init_mmx_sse_builtins): Use
444 char_type_node for V*QI type vectors.
445 * config/rs6000/rs6000-c.c (altivec_overloaded_builtins):
446 Update to satisfy new typechecking rules.
447 * config/rs6000/altivec.h (vec_cmple): Use vec_cmpge, for both
448 C and C++ variants.
449 * doc/invoke.texi (C Dialect Options): Document
450 -flax-vector-conversions.
451
4522007-01-05 Manuel Lopez-Ibanez <manu@gcc.gnu.org> (r120505)
453
454 PR c/19978
455 * tree.h (TREE_OVERFLOW_P): New.
456 * c-typeck.c (parser_build_unary_op): Warn only if result
457 overflowed and operands did not.
458 (parser_build_binary_op): Likewise.
459 (convert_for_assignment): Remove redundant overflow_warning.
460 * c-common.c (overflow_warning): Don't check or set TREE_OVERFLOW.
461
4622006-12-13 Ian Lance Taylor <iant@google.com> (r119855)
463
464 PR c++/19564
465 PR c++/19756
466 * c-typeck.c (parser_build_binary_op): Move parentheses warnings
467 to warn_about_parentheses in c-common.c.
468 * c-common.c (warn_about_parentheses): New function.
469 * c-common.h (warn_about_parentheses): Declare.
470 * doc/invoke.texi (Warning Options): Update -Wparentheses
471 description.
472
4732006-12-12 Geoffrey Keating <geoffk@apple.com> (r119820)
474
475 * mips-tdump.c: Replace CROSS_COMPILE with
476 CROSS_DIRECTORY_STRUCTURE.
477 * mips-tfile.c: Likewise.
478 * gcc.c: Likewise.
479 * configure.ac: Likewise.
480 * cppdefault.c: Likewise.
481 * Makefile.in: Likewise.
482 * config/alpha/osf.h: Likewise.
483 * config/i386/cygwin.h: Likewise.
484 * config/i386/beos-elf.h: Likewise.
485 * config/i386/nto.h: Likewise.
486 * config/svr4.h: Likewise.
487 * config/rs6000/aix.h: Likewise.
488 * config/rs6000/sysv4.h: Likewise.
489 * collect2.c: Likewise.
490 * configure: Regenerate.
491
492 * doc/tm.texi (Alignment Output): Document that ASM_OUTPUT_SKIP
493 actually takes an unsigned HOST_WIDE_INT for its second parameter.
494
4952006-12-02 H.J. Lu <hongjiu.lu@intel.com> (r119454 - partial)
496
497 PR target/30040
498 * config/i386/driver-i386.c (bit_SSSE3): New.
499
5002006-11-27 Uros Bizjak <ubizjak@gmail.com> (r119260)
501
502 * config/i386/i386.c (x86_ext_80387_constants): Add m_K8, m_CORE2
503 and m_GENERIC64.
504
5052006-11-18 Vladimir Makarov <vmakarov@redhat.com> (r118973)
506
507 * doc/invoke.texi (core2): Add item.
508
509 * config/i386/i386.h (TARGET_CORE2, TARGET_CPU_DEFAULT_core2): New
510 macros.
511 (TARGET_CPU_CPP_BUILTINS): Add code for core2.
512 (TARGET_CPU_DEFAULT_generic): Change value.
513 (TARGET_CPU_DEFAULT_NAMES): Add core2.
514 (processor_type): Add new constant PROCESSOR_CORE2.
515
516 * config/i386/i386.md (cpu): Add core2.
517
518 * config/i386/i386.c (core2_cost): New initialized variable.
519 (m_CORE2): New macro.
520 (x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen,
521 x86_deep_branch, x86_partial_reg_stall, x86_use_simode_fiop,
522 x86_use_cltd, x86_promote_QImode, x86_sub_esp_4, x86_sub_esp_8,
523 x86_add_esp_4, x86_add_esp_8, x86_integer_DFmode_moves,
524 x86_partial_reg_dependency, x86_memory_mismatch_stall,
525 x86_accumulate_outgoing_args, x86_prologue_using_move,
526 x86_epilogue_using_move, x86_arch_always_fancy_math_387,
527 x86_sse_partial_reg_dependency, x86_rep_movl_optimal,
528 x86_use_incdec, x86_four_jump_limit, x86_schedule,
529 x86_pad_returns): Add m_CORE2.
530 (override_options): Add entries for Core2.
531 (ix86_issue_rate): Add case for Core2.
532
5332006-11-07 Eric Christopher <echristo@apple.com> (r118576)
534
535 * libgcc2.c (__bswapdi2): Rename from bswapDI2.
536 (__bswapsi2): Ditto.
537 * libgcc2.h: Remove transformation of bswap routines.
538 * config/i386/i386.md (bswapsi2): New.
539 (bswapdi2): Ditto.
540
5412006-10-31 Geoffrey Keating <geoffk@apple.com> (r118360)
542
543 * coverage.c (coverage_checksum_string): Update comment.
544 * dwarf2out.c (switch_to_eh_frame_section): Update for removal
545 of get_file_function_name.
546 * cgraphunit.c (cgraph_build_static_cdtor): Update for rename
547 of get_file_function_name_long.
548 * tree.c (get_file_function_name): Rename from
549 get_file_function_name_long; improve comment; handle 'I' and 'D'
550 specially when the target has ctor/dtor support; remove special
551 handling for 'F'.
552 (get_file_function_name): Remove.
553 * tree.h (get_file_function_name): Rename from
554 get_file_function_name_long.
555 (get_file_function_name): Remove prototype.
556
5572006-10-31 Geoffrey Keating <geoffk@apple.com> (r118356)
558
559 * c-decl.c (grokdeclarator): Don't set DECL_EXTERNAL on
560 inline static functions in c99 mode.
561
562 PR 16622
563 * doc/extend.texi (Inline): Update.
564 * c-tree.h (struct language_function): Remove field 'extern_inline'.
565 * c-decl.c (current_extern_inline): Delete.
566 (pop_scope): Adjust test for an undefined nested function.
567 Add warning about undeclared inline function.
568 (diagnose_mismatched_decls): Update comments. Disallow overriding
569 of inline functions in a translation unit in C99. Allow inline
570 declarations in C99 at any time.
571 (merge_decls): Boolize variables. Handle C99 'extern inline'
572 semantics.
573 (grokdeclarator): Set DECL_EXTERNAL here for functions. Handle
574 C99 inline semantics.
575 (start_function): Don't clear current_extern_inline. Don't set
576 DECL_EXTERNAL.
577 (c_push_function_context): Don't push current_extern_inline.
578 (c_pop_function_context): Don't restore current_extern_inline.
579
580 PR 11377
581 * c-typeck.c (build_external_ref): Warn about static variables
582 used in extern inline functions.
583 * c-decl.c (start_decl): Warn about static variables declared
584 in extern inline functions.
585
5862006-10-27 Vladimir Makarov <vmakarov@redhat.com> (r118090)
587
588 * config/i386/i386.h (TARGET_GEODE):
589 (TARGET_CPU_CPP_BUILTINS): Add code for geode.
590 (TARGET_CPU_DEFAULT_geode): New macro.
591 (TARGET_CPU_DEFAULT_k6, TARGET_CPU_DEFAULT_k6_2,
592 TARGET_CPU_DEFAULT_k6_3, TARGET_CPU_DEFAULT_athlon,
593 TARGET_CPU_DEFAULT_athlon_sse, TARGET_CPU_DEFAULT_k8,
594 TARGET_CPU_DEFAULT_pentium_m, TARGET_CPU_DEFAULT_prescott,
595 TARGET_CPU_DEFAULT_nocona, TARGET_CPU_DEFAULT_generic): Increase
596 the macro values.
597 (TARGET_CPU_DEFAULT_NAMES): Add geode.
598 (processor_type): Add PROCESSOR_GEODE.
599
600 * config/i386/i386.md: Include geode.md.
601 (cpu): Add geode.
602
603 * config/i386/i386.c (geode_cost): New initialized global
604 variable.
605 (m_GEODE, m_K6_GEODE): New macros.
606 (x86_use_leave, x86_push_memory, x86_deep_branch, x86_use_sahf,
607 x86_use_himode_fiop, x86_promote_QImode, x86_add_esp_4,
608 x86_add_esp_8, x86_rep_movl_optimal, x86_ext_80387_constants,
609 x86_schedule): Use m_K6_GEODE instead of m_K6.
610 (x86_movx, x86_cmove): Set up m_GEODE.
611 (x86_integer_DFmode_moves): Clear m_GEODE.
612 (processor_target_table): Add entry for geode.
613 (processor_alias_table): Ditto.
614
615 * config/i386/geode.md: New file.
616
617 * doc/invoke.texi: Add entry about geode processor.
618
6192006-10-24 Richard Guenther <rguenther@suse.de> (r118001)
620
621 PR middle-end/28796
622 * builtins.c (fold_builtin_classify): Use HONOR_INFINITIES
623 and HONOR_NANS instead of MODE_HAS_INFINITIES and MODE_HAS_NANS
624 for deciding optimizations in consistency with fold-const.c
625 (fold_builtin_unordered_cmp): Likewise.
626
6272006-10-22 H.J. Lu <hongjiu.lu@intel.com> (r117958)
628
629 * config.gcc (i[34567]86-*-*): Add tmmintrin.h to extra_headers.
630 (x86_64-*-*): Likewise.
631
632 * config/i386/i386.c (pta_flags): Add PTA_SSSE3.
633 (override_options): Check SSSE3.
634 (ix86_builtins): Add IX86_BUILTIN_PHADDW, IX86_BUILTIN_PHADDD,
635 IX86_BUILTIN_PHADDSW, IX86_BUILTIN_PHSUBW, IX86_BUILTIN_PHSUBD,
636 IX86_BUILTIN_PHSUBSW, IX86_BUILTIN_PMADDUBSW,
637 IX86_BUILTIN_PMULHRSW, IX86_BUILTIN_PSHUFB,
638 IX86_BUILTIN_PSIGNB, IX86_BUILTIN_PSIGNW, IX86_BUILTIN_PSIGND,
639 IX86_BUILTIN_PALIGNR, IX86_BUILTIN_PABSB, IX86_BUILTIN_PABSW,
640 IX86_BUILTIN_PABSD, IX86_BUILTIN_PHADDW128,
641 IX86_BUILTIN_PHADDD128, IX86_BUILTIN_PHADDSW128,
642 IX86_BUILTIN_PHSUBW128, IX86_BUILTIN_PHSUBD128,
643 IX86_BUILTIN_PHSUBSW128, IX86_BUILTIN_PMADDUBSW128,
644 IX86_BUILTIN_PMULHRSW128, IX86_BUILTIN_PSHUFB128,
645 IX86_BUILTIN_PSIGNB128, IX86_BUILTIN_PSIGNW128,
646 IX86_BUILTIN_PSIGND128, IX86_BUILTIN_PALIGNR128,
647 IX86_BUILTIN_PABSB128, IX86_BUILTIN_PABSW128 and
648 IX86_BUILTIN_PABSD128.
649 (bdesc_2arg): Add SSSE3.
650 (bdesc_1arg): Likewise.
651 (ix86_init_mmx_sse_builtins): Support SSSE3.
652 (ix86_expand_builtin): Likewise.
653 * config/i386/i386.h (TARGET_CPU_CPP_BUILTINS): Likewise.
654
655 * config/i386/i386.md (UNSPEC_PSHUFB): New.
656 (UNSPEC_PSIGN): Likewise.
657 (UNSPEC_PALIGNR): Likewise.
658 Include mmx.md before sse.md.
659
660 * config/i386/i386.opt: Add -mssse3.
661
662 * config/i386/sse.md (ssse3_phaddwv8hi3): New pattern for SSSE3.
663 (ssse3_phaddwv4hi3): Likewise.
664 (ssse3_phadddv4si3): Likewise.
665 (ssse3_phadddv2si3): Likewise.
666 (ssse3_phaddswv8hi3): Likewise.
667 (ssse3_phaddswv4hi3): Likewise.
668 (ssse3_phsubwv8hi3): Likewise.
669 (ssse3_phsubwv4hi3): Likewise.
670 (ssse3_phsubdv4si3): Likewise.
671 (ssse3_phsubdv2si3): Likewise.
672 (ssse3_phsubswv8hi3): Likewise.
673 (ssse3_phsubswv4hi3): Likewise.
674 (ssse3_pmaddubswv8hi3): Likewise.
675 (ssse3_pmaddubswv4hi3): Likewise.
676 (ssse3_pmulhrswv8hi3): Likewise.
677 (ssse3_pmulhrswv4hi3): Likewise.
678 (ssse3_pshufbv16qi3): Likewise.
679 (ssse3_pshufbv8qi3): Likewise.
680 (ssse3_psign<mode>3): Likewise.
681 (ssse3_psign<mode>3): Likewise.
682 (ssse3_palignrti): Likewise.
683 (ssse3_palignrdi): Likewise.
684 (abs<mode>2): Likewise.
685 (abs<mode>2): Likewise.
686
687 * config/i386/tmmintrin.h: New file.
688
689 * doc/extend.texi: Document SSSE3 built-in functions.
690
691 * doc/invoke.texi: Document -mssse3/-mno-ssse3 switches.
692
6932006-10-22 H.J. Lu <hongjiu.lu@intel.com> (r117959)
694
695 * config/i386/tmmintrin.h: Remove the duplicated content.
696
6972006-10-21 Richard Guenther <rguenther@suse.de> (r117932)
698
699 PR tree-optimization/3511
700 * tree-ssa-pre.c (phi_translate): Fold CALL_EXPRs that
701 got new invariant arguments during PHI translation.
702
7032006-10-21 Richard Guenther <rguenther@suse.de> (r117929)
704
705 * builtins.c (fold_builtin_classify): Fix typo.
706
7072006-09-07 Eric Christopher <echristo@apple.com> (r118361)
708 Falk Hueffner <falk@debian.org>
709
710 * doc/extend.texi (__builtin_bswap32): Document.
711 (__builtin_bswap64): Ditto.
712 * doc/libgcc.texi (bswapsi2): Document.
713 (bswapdi2): Ditto.
714 * doc/rtl.texi (bswap): Document.
715 * optabs.c (expand_unop): Don't widen a bswap.
716 (init_optabs): Init bswap. Set libfuncs explicitly
717 for bswapsi2 and bswapdi2.
718 * optabs.h (OTI_bswap): New.
719 (bswap_optab): Ditto.
720 * genopinit.c (optabs): Handle bswap_optab.
721 * tree.h (tree_index): Add TI_UINT32_TYPE and
722 TI_UINT64_TYPE.
723 (uint32_type_node): New.
724 (uint64_type_node): Ditto.
725 * tree.c (build_common_tree_nodes_2): Initialize
726 uint32_type_node and uint64_type_node.
727 * builtins.c (expand_builtin_bswap): New.
728 (expand_builtin): Call.
729 (fold_builtin_bswap): New.
730 (fold_builtin_1): Call.
731 * fold-const.c (tree_expr_nonnegative_p): Return true
732 for bswap.
733 * builtin-types.def (BT_UINT32): New.
734 (BT_UINT64): Ditto.
735 (BT_FN_UINT32_UINT32): Ditto.
736 (BT_FN_UINT64_UINT64): Ditto.
737 * builtins.def (BUILT_IN_BSWAP32): New.
738 (BUILT_IN_BSWAP64): Ditto.
739 * rtl.def (BSWAP): New.
740 * genattrtab.c (check_attr_value): New.
741 * libgcc2.c (__bswapSI2): New.
742 (__bswapDI2): Ditto.
743 * libgcc2.h (__bswapSI2): Declare.
744 (__bswapDI2): Ditto.
745 * mklibgcc.in (lib2funcs): Add _bswapsi2 and _bswapdi2.
746 * simplify-rtx.c (simplify_const_unary_operation): Return
747 0 for BSWAP.
748 * libgcc-std.ver (__bwapsi2): Add.
749 (__bswapdi2): Ditto.
750 * reload1.c (eliminate_regs_1): Add bswap.
751 (elimination_effects): Ditto.
752 * config/i386/i386.h (x86_bswap): New.
753 (TARGET_BSWAP): Use.
754 * config/i386/i386.c (x86_bswap): Set.