12007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124339)
2
3 * config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3
4 and athlon64-sse3 as improved versions of k8, opteron and athlon64
5 with SSE3 instruction set support.
6 * doc/invoke.texi: Likewise.
7
82007-04-12 Richard Guenther <rguenther@suse.de> (r123736)
9
10 PR tree-optimization/24689
11 PR tree-optimization/31307
12 * fold-const.c (operand_equal_p): Compare INTEGER_CST array
13 indices by value.
14 * gimplify.c (canonicalize_addr_expr): To be consistent with
15 gimplify_compound_lval only set operands two and three of
16 ARRAY_REFs if they are not gimple_min_invariant. This makes
17 it never at this place.
18 * tree-ssa-ccp.c (maybe_fold_offset_to_array_ref): Likewise.
19
202007-04-07 H.J. Lu <hongjiu.lu@intel.com> (r123639)
21
22 * config/i386/i386.c (ix86_handle_option): Handle SSSE3.
23
242007-02-08 Harsha Jagasia <harsha.jagasia@amd.com> (r121726)
25
26 * config/i386/xmmintrin.h: Make inclusion of emmintrin.h
27 conditional to __SSE2__.
28 (Entries below should have been added to first ChangeLog
29 entry for amdfam10 dated 2007-02-05)
30 * config/i386/emmintrin.h: Generate #error if __SSE2__ is not
31 defined.
32 * config/i386/pmmintrin.h: Generate #error if __SSE3__ is not
33 defined.
34 * config/i386/tmmintrin.h: Generate #error if __SSSE3__ is not
35 defined.
36
372007-02-07 Jakub Jelinek <jakub@redhat.com> (r121687)
38
39 * config/i386/i386.c (override_options): Set PTA_SSSE3 for core2.
40
412007-01-17 Eric Christopher <echristo@apple.com> (r120846)
42
43 * config.gcc: Support core2 processor.
44
452006-12-02 H.J. Lu <hongjiu.lu@intel.com> (r119454 - partial)
46
47 PR target/30040
48 * config/i386/driver-i386.c (bit_SSSE3): New.
49
502006-11-18 Vladimir Makarov <vmakarov@redhat.com> (r118973)
51
52 * doc/invoke.texi (core2): Add item.
53
54 * config/i386/i386.h (TARGET_CORE2, TARGET_CPU_DEFAULT_core2): New
55 macros.
56 (TARGET_CPU_CPP_BUILTINS): Add code for core2.
57 (TARGET_CPU_DEFAULT_generic): Change value.
--- 119 unchanged lines hidden (view full) ---
177 (abs<mode>2): Likewise.
178
179 * config/i386/tmmintrin.h: New file.
180
181 * doc/extend.texi: Document SSSE3 built-in functions.
182
183 * doc/invoke.texi: Document -mssse3/-mno-ssse3 switches.
184
1852006-10-22 H.J. Lu
186
187 * config/i386/tmmintrin.h: Remove the duplicated content.
188
1892006-10-21 Richard Guenther <rguenther@suse.de> (r117932)
190
191 PR tree-optimization/3511
192 * tree-ssa-pre.c (phi_translate): Fold CALL_EXPRs that
193 got new invariant arguments during PHI translation.
194
1952006-10-21 Richard Guenther <rguenther@suse.de> (r117929)
196
197 * builtins.c (fold_builtin_classify): Fix typo.
198
2
3 * config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3
4 and athlon64-sse3 as improved versions of k8, opteron and athlon64
5 with SSE3 instruction set support.
6 * doc/invoke.texi: Likewise.
7
82007-04-12 Richard Guenther <rguenther@suse.de> (r123736)
9
10 PR tree-optimization/24689
11 PR tree-optimization/31307
12 * fold-const.c (operand_equal_p): Compare INTEGER_CST array
13 indices by value.
14 * gimplify.c (canonicalize_addr_expr): To be consistent with
15 gimplify_compound_lval only set operands two and three of
16 ARRAY_REFs if they are not gimple_min_invariant. This makes
17 it never at this place.
18 * tree-ssa-ccp.c (maybe_fold_offset_to_array_ref): Likewise.
19
202007-04-07 H.J. Lu <hongjiu.lu@intel.com> (r123639)
21
22 * config/i386/i386.c (ix86_handle_option): Handle SSSE3.
23
242007-02-08 Harsha Jagasia <harsha.jagasia@amd.com> (r121726)
25
26 * config/i386/xmmintrin.h: Make inclusion of emmintrin.h
27 conditional to __SSE2__.
28 (Entries below should have been added to first ChangeLog
29 entry for amdfam10 dated 2007-02-05)
30 * config/i386/emmintrin.h: Generate #error if __SSE2__ is not
31 defined.
32 * config/i386/pmmintrin.h: Generate #error if __SSE3__ is not
33 defined.
34 * config/i386/tmmintrin.h: Generate #error if __SSSE3__ is not
35 defined.
36
372007-02-07 Jakub Jelinek <jakub@redhat.com> (r121687)
38
39 * config/i386/i386.c (override_options): Set PTA_SSSE3 for core2.
40
412007-01-17 Eric Christopher <echristo@apple.com> (r120846)
42
43 * config.gcc: Support core2 processor.
44
452006-12-02 H.J. Lu <hongjiu.lu@intel.com> (r119454 - partial)
46
47 PR target/30040
48 * config/i386/driver-i386.c (bit_SSSE3): New.
49
502006-11-18 Vladimir Makarov <vmakarov@redhat.com> (r118973)
51
52 * doc/invoke.texi (core2): Add item.
53
54 * config/i386/i386.h (TARGET_CORE2, TARGET_CPU_DEFAULT_core2): New
55 macros.
56 (TARGET_CPU_CPP_BUILTINS): Add code for core2.
57 (TARGET_CPU_DEFAULT_generic): Change value.
--- 119 unchanged lines hidden (view full) ---
177 (abs<mode>2): Likewise.
178
179 * config/i386/tmmintrin.h: New file.
180
181 * doc/extend.texi: Document SSSE3 built-in functions.
182
183 * doc/invoke.texi: Document -mssse3/-mno-ssse3 switches.
184
1852006-10-22 H.J. Lu
186
187 * config/i386/tmmintrin.h: Remove the duplicated content.
188
1892006-10-21 Richard Guenther <rguenther@suse.de> (r117932)
190
191 PR tree-optimization/3511
192 * tree-ssa-pre.c (phi_translate): Fold CALL_EXPRs that
193 got new invariant arguments during PHI translation.
194
1952006-10-21 Richard Guenther <rguenther@suse.de> (r117929)
196
197 * builtins.c (fold_builtin_classify): Fix typo.
198