| i386-opc.h (256281) | i386-opc.h (261307) |
|---|---|
| 1/* Declarations for Intel 80386 opcode table 2 Copyright 2007 3 Free Software Foundation, Inc. 4 5 This file is part of GAS, the GNU Assembler. 6 7 GAS is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by --- 66 unchanged lines hidden (view full) --- 75#define CpuAES 0x2000000 /* AES Instructions required */ 76 77 /* These flags are set by gas depending on the flag_code. */ 78#define Cpu64 0x4000000 /* 64bit support required */ 79#define CpuNo64 0x8000000 /* Not supported in the 64bit mode */ 80 81#define CpuPCLMUL 0x10000000 /* Carry-less Multiplication extensions */ 82#define CpuRdRnd 0x20000000 /* Intel Random Number Generator extensions */ | 1/* Declarations for Intel 80386 opcode table 2 Copyright 2007 3 Free Software Foundation, Inc. 4 5 This file is part of GAS, the GNU Assembler. 6 7 GAS is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by --- 66 unchanged lines hidden (view full) --- 75#define CpuAES 0x2000000 /* AES Instructions required */ 76 77 /* These flags are set by gas depending on the flag_code. */ 78#define Cpu64 0x4000000 /* 64bit support required */ 79#define CpuNo64 0x8000000 /* Not supported in the 64bit mode */ 80 81#define CpuPCLMUL 0x10000000 /* Carry-less Multiplication extensions */ 82#define CpuRdRnd 0x20000000 /* Intel Random Number Generator extensions */ |
| 83#define CpuSMAP 0x40000000 /* Intel Supervisor Mode Access Prevention */ |
|
| 83 84/* SSE4.1/4.2 Instructions required */ 85#define CpuSSE4 (CpuSSE4_1|CpuSSE4_2) 86 87 /* The default value for unknown CPUs - enable all features to avoid problems. */ 88#define CpuUnknownFlags (Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686 \ 89 |CpuP4|CpuSledgehammer|CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuVMX \ 90 |Cpu3dnow|Cpu3dnowA|CpuK6|CpuPadLock|CpuSVME|CpuSSSE3|CpuSSE4_1 \ | 84 85/* SSE4.1/4.2 Instructions required */ 86#define CpuSSE4 (CpuSSE4_1|CpuSSE4_2) 87 88 /* The default value for unknown CPUs - enable all features to avoid problems. */ 89#define CpuUnknownFlags (Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686 \ 90 |CpuP4|CpuSledgehammer|CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuVMX \ 91 |Cpu3dnow|Cpu3dnowA|CpuK6|CpuPadLock|CpuSVME|CpuSSSE3|CpuSSE4_1 \ |
| 91 |CpuSSE4_2|CpuABM|CpuSSE4a|CpuXSAVE|CpuAES|CpuPCLMUL|CpuRdRnd) | 92 |CpuSSE4_2|CpuABM|CpuSSE4a|CpuXSAVE|CpuAES|CpuPCLMUL|CpuRdRnd|CpuSMAP) |
| 92 93 /* the bits in opcode_modifier are used to generate the final opcode from 94 the base_opcode. These bits also are used to detect alternate forms of 95 the same instruction */ 96 unsigned int opcode_modifier; 97 98 /* opcode_modifier bits: */ 99#define D 0x1 /* has direction bit. */ --- 147 unchanged lines hidden --- | 93 94 /* the bits in opcode_modifier are used to generate the final opcode from 95 the base_opcode. These bits also are used to detect alternate forms of 96 the same instruction */ 97 unsigned int opcode_modifier; 98 99 /* opcode_modifier bits: */ 100#define D 0x1 /* has direction bit. */ --- 147 unchanged lines hidden --- |