| pci_ahci.c (267339) | pci_ahci.c (267393) |
|---|---|
| 1/*- 2 * Copyright (c) 2013 Zhixiang Yu <zcore@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2013 Zhixiang Yu <zcore@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: stable/10/usr.sbin/bhyve/pci_ahci.c 267339 2014-06-10 19:00:14Z jhb $ | 26 * $FreeBSD: stable/10/usr.sbin/bhyve/pci_ahci.c 267393 2014-06-12 13:13:15Z jhb $ |
| 27 */ 28 29#include <sys/cdefs.h> | 27 */ 28 29#include <sys/cdefs.h> |
| 30__FBSDID("$FreeBSD: stable/10/usr.sbin/bhyve/pci_ahci.c 267339 2014-06-10 19:00:14Z jhb $"); | 30__FBSDID("$FreeBSD: stable/10/usr.sbin/bhyve/pci_ahci.c 267393 2014-06-12 13:13:15Z jhb $"); |
| 31 32#include <sys/param.h> 33#include <sys/linker_set.h> 34#include <sys/stat.h> 35#include <sys/uio.h> 36#include <sys/ioctl.h> 37#include <sys/disk.h> 38#include <sys/ata.h> --- 148 unchanged lines hidden (view full) --- 187 uint32_t pi; 188 uint32_t vs; 189 uint32_t ccc_ctl; 190 uint32_t ccc_pts; 191 uint32_t em_loc; 192 uint32_t em_ctl; 193 uint32_t cap2; 194 uint32_t bohc; | 31 32#include <sys/param.h> 33#include <sys/linker_set.h> 34#include <sys/stat.h> 35#include <sys/uio.h> 36#include <sys/ioctl.h> 37#include <sys/disk.h> 38#include <sys/ata.h> --- 148 unchanged lines hidden (view full) --- 187 uint32_t pi; 188 uint32_t vs; 189 uint32_t ccc_ctl; 190 uint32_t ccc_pts; 191 uint32_t em_loc; 192 uint32_t em_ctl; 193 uint32_t cap2; 194 uint32_t bohc; |
| 195 uint32_t lintr; |
|
| 195 struct ahci_port port[MAX_PORTS]; 196}; 197#define ahci_ctx(sc) ((sc)->asc_pi->pi_vmctx) 198 199static inline void lba_to_msf(uint8_t *buf, int lba) 200{ 201 lba += 150; 202 buf[0] = (lba / 75) / 60; 203 buf[1] = (lba / 75) % 60; 204 buf[2] = lba % 75; 205} 206 207/* 208 * generate HBA intr depending on whether or not ports within 209 * the controller have an interrupt pending. 210 */ 211static void 212ahci_generate_intr(struct pci_ahci_softc *sc) 213{ | 196 struct ahci_port port[MAX_PORTS]; 197}; 198#define ahci_ctx(sc) ((sc)->asc_pi->pi_vmctx) 199 200static inline void lba_to_msf(uint8_t *buf, int lba) 201{ 202 lba += 150; 203 buf[0] = (lba / 75) / 60; 204 buf[1] = (lba / 75) % 60; 205 buf[2] = lba % 75; 206} 207 208/* 209 * generate HBA intr depending on whether or not ports within 210 * the controller have an interrupt pending. 211 */ 212static void 213ahci_generate_intr(struct pci_ahci_softc *sc) 214{ |
| 215 struct pci_devinst *pi; |
|
| 214 int i; 215 | 216 int i; 217 |
| 218 pi = sc->asc_pi; 219 |
|
| 216 for (i = 0; i < sc->ports; i++) { 217 struct ahci_port *pr; 218 pr = &sc->port[i]; 219 if (pr->is & pr->ie) 220 sc->is |= (1 << i); 221 } 222 223 DPRINTF("%s %x\n", __func__, sc->is); 224 | 220 for (i = 0; i < sc->ports; i++) { 221 struct ahci_port *pr; 222 pr = &sc->port[i]; 223 if (pr->is & pr->ie) 224 sc->is |= (1 << i); 225 } 226 227 DPRINTF("%s %x\n", __func__, sc->is); 228 |
| 225 if (sc->is && (sc->ghc & AHCI_GHC_IE)) 226 pci_generate_msi(sc->asc_pi, 0); | 229 if (sc->is && (sc->ghc & AHCI_GHC_IE)) { 230 if (pci_msi_enabled(pi)) { 231 /* 232 * Generate an MSI interrupt on every edge 233 */ 234 pci_generate_msi(pi, 0); 235 } else if (!sc->lintr) { 236 /* 237 * Only generate a pin-based interrupt if one wasn't 238 * in progress 239 */ 240 sc->lintr = 1; 241 pci_lintr_assert(pi); 242 } 243 } else if (sc->lintr) { 244 /* 245 * No interrupts: deassert pin-based signal if it had 246 * been asserted 247 */ 248 pci_lintr_deassert(pi); 249 sc->lintr = 0; 250 } |
| 227} 228 229static void 230ahci_write_fis(struct ahci_port *p, enum sata_fis_type ft, uint8_t *fis) 231{ 232 int offset, len, irq; 233 234 if (p->rfis == NULL || !(p->cmd & AHCI_P_CMD_FRE)) --- 127 unchanged lines hidden (view full) --- 362 363static void 364ahci_reset(struct pci_ahci_softc *sc) 365{ 366 int i; 367 368 sc->ghc = AHCI_GHC_AE; 369 sc->is = 0; | 251} 252 253static void 254ahci_write_fis(struct ahci_port *p, enum sata_fis_type ft, uint8_t *fis) 255{ 256 int offset, len, irq; 257 258 if (p->rfis == NULL || !(p->cmd & AHCI_P_CMD_FRE)) --- 127 unchanged lines hidden (view full) --- 386 387static void 388ahci_reset(struct pci_ahci_softc *sc) 389{ 390 int i; 391 392 sc->ghc = AHCI_GHC_AE; 393 sc->is = 0; |
| 394 395 if (sc->lintr) { 396 pci_lintr_deassert(sc->asc_pi); 397 sc->lintr = 0; 398 } 399 |
|
| 370 for (i = 0; i < sc->ports; i++) { 371 sc->port[i].ie = 0; 372 sc->port[i].is = 0; 373 ahci_port_reset(&sc->port[i]); 374 } 375} 376 377static void --- 1432 unchanged lines hidden (view full) --- 1810 pci_set_cfgdata16(pi, PCIR_VENDOR, 0x8086); 1811 pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_STORAGE); 1812 pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_STORAGE_SATA); 1813 pci_set_cfgdata8(pi, PCIR_PROGIF, PCIP_STORAGE_SATA_AHCI_1_0); 1814 pci_emul_add_msicap(pi, 1); 1815 pci_emul_alloc_bar(pi, 5, PCIBAR_MEM32, 1816 AHCI_OFFSET + sc->ports * AHCI_STEP); 1817 | 400 for (i = 0; i < sc->ports; i++) { 401 sc->port[i].ie = 0; 402 sc->port[i].is = 0; 403 ahci_port_reset(&sc->port[i]); 404 } 405} 406 407static void --- 1432 unchanged lines hidden (view full) --- 1840 pci_set_cfgdata16(pi, PCIR_VENDOR, 0x8086); 1841 pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_STORAGE); 1842 pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_STORAGE_SATA); 1843 pci_set_cfgdata8(pi, PCIR_PROGIF, PCIP_STORAGE_SATA_AHCI_1_0); 1844 pci_emul_add_msicap(pi, 1); 1845 pci_emul_alloc_bar(pi, 5, PCIBAR_MEM32, 1846 AHCI_OFFSET + sc->ports * AHCI_STEP); 1847 |
| 1848 pci_lintr_request(pi); 1849 |
|
| 1818open_fail: 1819 if (ret) { 1820 blockif_close(sc->port[0].bctx); 1821 free(sc); 1822 } 1823 1824 return (ret); 1825} --- 33 unchanged lines hidden --- | 1850open_fail: 1851 if (ret) { 1852 blockif_close(sc->port[0].bctx); 1853 free(sc); 1854 } 1855 1856 return (ret); 1857} --- 33 unchanged lines hidden --- |