1/*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
33 */
34
35#include <sys/cdefs.h>
| 1/*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
33 */
34
35#include <sys/cdefs.h>
|
80static int isa_dmarangecheck(caddr_t va, u_int length, int chan);
81
82static caddr_t dma_bouncebuf[8];
83static u_int dma_bouncebufsize[8];
84static u_int8_t dma_bounced = 0;
85static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */
86static u_int8_t dma_inuse = 0; /* User for acquire/release */
87static u_int8_t dma_auto_mode = 0;
88
89#define VALID_DMA_MASK (7)
90
91/* high byte of address is stored in this port for i-th dma channel */
92static int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
93
94/*
95 * Setup a DMA channel's bounce buffer.
96 */
97int
98isa_dma_init(int chan, u_int bouncebufsize, int flag)
99{
100 void *buf;
101
102 /*
103 * If a DMA channel is shared, both drivers have to call isa_dma_init
104 * since they don't know that the other driver will do it.
105 * Just return if we're already set up good.
106 * XXX: this only works if they agree on the bouncebuf size. This
107 * XXX: is typically the case since they are multiple instances of
108 * XXX: the same driver.
109 */
110 if (dma_bouncebuf[chan] != NULL)
111 return (0);
112
113#ifdef DIAGNOSTIC
114 if (chan & ~VALID_DMA_MASK)
115 panic("isa_dma_init: channel out of range");
116#endif
117
118 dma_bouncebufsize[chan] = bouncebufsize;
119
120 /* Try malloc() first. It works better if it works. */
121 buf = malloc(bouncebufsize, M_DEVBUF, flag);
122 if (buf != NULL) {
123 if (isa_dmarangecheck(buf, bouncebufsize, chan) == 0) {
124 dma_bouncebuf[chan] = buf;
125 return (0);
126 }
127 free(buf, M_DEVBUF);
128 }
129 buf = contigmalloc(bouncebufsize, M_DEVBUF, flag, 0ul, 0xfffffful,
130 1ul, chan & 4 ? 0x20000ul : 0x10000ul);
131 if (buf == NULL)
132 return (ENOMEM);
133 dma_bouncebuf[chan] = buf;
134 return (0);
135}
136
137/*
138 * Register a DMA channel's usage. Usually called from a device driver
139 * in open() or during its initialization.
140 */
141int
142isa_dma_acquire(chan)
143 int chan;
144{
145#ifdef DIAGNOSTIC
146 if (chan & ~VALID_DMA_MASK)
147 panic("isa_dma_acquire: channel out of range");
148#endif
149
150 if (dma_inuse & (1 << chan)) {
151 printf("isa_dma_acquire: channel %d already in use\n", chan);
152 return (EBUSY);
153 }
154 dma_inuse |= (1 << chan);
155 dma_auto_mode &= ~(1 << chan);
156
157 return (0);
158}
159
160/*
161 * Unregister a DMA channel's usage. Usually called from a device driver
162 * during close() or during its shutdown.
163 */
164void
165isa_dma_release(chan)
166 int chan;
167{
168#ifdef DIAGNOSTIC
169 if (chan & ~VALID_DMA_MASK)
170 panic("isa_dma_release: channel out of range");
171
172 if ((dma_inuse & (1 << chan)) == 0)
173 printf("isa_dma_release: channel %d not in use\n", chan);
174#endif
175
176 if (dma_busy & (1 << chan)) {
177 dma_busy &= ~(1 << chan);
178 /*
179 * XXX We should also do "dma_bounced &= (1 << chan);"
180 * because we are acting on behalf of isa_dmadone() which
181 * was not called to end the last DMA operation. This does
182 * not matter now, but it may in the future.
183 */
184 }
185
186 dma_inuse &= ~(1 << chan);
187 dma_auto_mode &= ~(1 << chan);
188}
189
190/*
191 * isa_dmacascade(): program 8237 DMA controller channel to accept
192 * external dma control by a board.
193 */
194void
195isa_dmacascade(chan)
196 int chan;
197{
198#ifdef DIAGNOSTIC
199 if (chan & ~VALID_DMA_MASK)
200 panic("isa_dmacascade: channel out of range");
201#endif
202
203 /* set dma channel mode, and set dma channel mode */
204 if ((chan & 4) == 0) {
205 outb(DMA1_MODE, DMA37MD_CASCADE | chan);
206 outb(DMA1_SMSK, chan);
207 } else {
208 outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
209 outb(DMA2_SMSK, chan & 3);
210 }
211}
212
213/*
214 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
215 * problems by using a bounce buffer.
216 */
217void
218isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
219{
220 vm_paddr_t phys;
221 int waport;
222 caddr_t newaddr;
223
224 GIANT_REQUIRED;
225
226#ifdef DIAGNOSTIC
227 if (chan & ~VALID_DMA_MASK)
228 panic("isa_dmastart: channel out of range");
229
230 if ((chan < 4 && nbytes > (1<<16))
231 || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1)))
232 panic("isa_dmastart: impossible request");
233
234 if ((dma_inuse & (1 << chan)) == 0)
235 printf("isa_dmastart: channel %d not acquired\n", chan);
236#endif
237
238#if 0
239 /*
240 * XXX This should be checked, but drivers like ad1848 only call
241 * isa_dmastart() once because they use Auto DMA mode. If we
242 * leave this in, drivers that do this will print this continuously.
243 */
244 if (dma_busy & (1 << chan))
245 printf("isa_dmastart: channel %d busy\n", chan);
246#endif
247
248 dma_busy |= (1 << chan);
249
250 if (isa_dmarangecheck(addr, nbytes, chan)) {
251 if (dma_bouncebuf[chan] == NULL
252 || dma_bouncebufsize[chan] < nbytes)
253 panic("isa_dmastart: bad bounce buffer");
254 dma_bounced |= (1 << chan);
255 newaddr = dma_bouncebuf[chan];
256
257 /* copy bounce buffer on write */
258 if (!(flags & ISADMA_READ))
259 bcopy(addr, newaddr, nbytes);
260 addr = newaddr;
261 }
262
263 /* translate to physical */
264 phys = pmap_extract(kernel_pmap, (vm_offset_t)addr);
265
266 if (flags & ISADMA_RAW) {
267 dma_auto_mode |= (1 << chan);
268 } else {
269 dma_auto_mode &= ~(1 << chan);
270 }
271
272 if ((chan & 4) == 0) {
273 /*
274 * Program one of DMA channels 0..3. These are
275 * byte mode channels.
276 */
277 /* set dma channel mode, and reset address ff */
278
279 /* If ISADMA_RAW flag is set, then use autoinitialise mode */
280 if (flags & ISADMA_RAW) {
281 if (flags & ISADMA_READ)
282 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
283 else
284 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
285 }
286 else
287 if (flags & ISADMA_READ)
288 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
289 else
290 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
291 outb(DMA1_FFC, 0);
292
293 /* send start address */
294 waport = DMA1_CHN(chan);
295 outb(waport, phys);
296 outb(waport, phys>>8);
297 outb(dmapageport[chan], phys>>16);
298
299 /* send count */
300 outb(waport + 1, --nbytes);
301 outb(waport + 1, nbytes>>8);
302
303 /* unmask channel */
304 outb(DMA1_SMSK, chan);
305 } else {
306 /*
307 * Program one of DMA channels 4..7. These are
308 * word mode channels.
309 */
310 /* set dma channel mode, and reset address ff */
311
312 /* If ISADMA_RAW flag is set, then use autoinitialise mode */
313 if (flags & ISADMA_RAW) {
314 if (flags & ISADMA_READ)
315 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
316 else
317 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
318 }
319 else
320 if (flags & ISADMA_READ)
321 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
322 else
323 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
324 outb(DMA2_FFC, 0);
325
326 /* send start address */
327 waport = DMA2_CHN(chan - 4);
328 outb(waport, phys>>1);
329 outb(waport, phys>>9);
330 outb(dmapageport[chan], phys>>16);
331
332 /* send count */
333 nbytes >>= 1;
334 outb(waport + 2, --nbytes);
335 outb(waport + 2, nbytes>>8);
336
337 /* unmask channel */
338 outb(DMA2_SMSK, chan & 3);
339 }
340}
341
342void
343isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
344{
345#ifdef DIAGNOSTIC
346 if (chan & ~VALID_DMA_MASK)
347 panic("isa_dmadone: channel out of range");
348
349 if ((dma_inuse & (1 << chan)) == 0)
350 printf("isa_dmadone: channel %d not acquired\n", chan);
351#endif
352
353 if (((dma_busy & (1 << chan)) == 0) &&
354 (dma_auto_mode & (1 << chan)) == 0 )
355 printf("isa_dmadone: channel %d not busy\n", chan);
356
357 if ((dma_auto_mode & (1 << chan)) == 0)
358 outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
359
360 if (dma_bounced & (1 << chan)) {
361 /* copy bounce buffer on read */
362 if (flags & ISADMA_READ)
363 bcopy(dma_bouncebuf[chan], addr, nbytes);
364
365 dma_bounced &= ~(1 << chan);
366 }
367 dma_busy &= ~(1 << chan);
368}
369
370/*
371 * Check for problems with the address range of a DMA transfer
372 * (non-contiguous physical pages, outside of bus address space,
373 * crossing DMA page boundaries).
374 * Return true if special handling needed.
375 */
376
377static int
378isa_dmarangecheck(caddr_t va, u_int length, int chan)
379{
380 vm_paddr_t phys, priorpage = 0;
381 vm_offset_t endva;
382 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1);
383
384 GIANT_REQUIRED;
385
386 endva = (vm_offset_t)round_page((vm_offset_t)va + length);
387 for (; va < (caddr_t) endva ; va += PAGE_SIZE) {
388 phys = trunc_page(pmap_extract(kernel_pmap, (vm_offset_t)va));
389#define ISARAM_END RAM_END
390 if (phys == 0)
391 panic("isa_dmacheck: no physical page present");
392 if (phys >= ISARAM_END)
393 return (1);
394 if (priorpage) {
395 if (priorpage + PAGE_SIZE != phys)
396 return (1);
397 /* check if crossing a DMA page boundary */
398 if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk)
399 return (1);
400 }
401 priorpage = phys;
402 }
403 return (0);
404}
405
406/*
407 * Query the progress of a transfer on a DMA channel.
408 *
409 * To avoid having to interrupt a transfer in progress, we sample
410 * each of the high and low databytes twice, and apply the following
411 * logic to determine the correct count.
412 *
413 * Reads are performed with interrupts disabled, thus it is to be
414 * expected that the time between reads is very small. At most
415 * one rollover in the low count byte can be expected within the
416 * four reads that are performed.
417 *
418 * There are three gaps in which a rollover can occur :
419 *
420 * - read low1
421 * gap1
422 * - read high1
423 * gap2
424 * - read low2
425 * gap3
426 * - read high2
427 *
428 * If a rollover occurs in gap1 or gap2, the low2 value will be
429 * greater than the low1 value. In this case, low2 and high2 are a
430 * corresponding pair.
431 *
432 * In any other case, low1 and high1 can be considered to be correct.
433 *
434 * The function returns the number of bytes remaining in the transfer,
435 * or -1 if the channel requested is not active.
436 *
437 */
438int
439isa_dmastatus(int chan)
440{
441 u_long cnt = 0;
442 int ffport, waport;
443 u_long low1, high1, low2, high2;
444
445 /* channel active? */
446 if ((dma_inuse & (1 << chan)) == 0) {
447 printf("isa_dmastatus: channel %d not active\n", chan);
448 return(-1);
449 }
450 /* channel busy? */
451
452 if (((dma_busy & (1 << chan)) == 0) &&
453 (dma_auto_mode & (1 << chan)) == 0 ) {
454 printf("chan %d not busy\n", chan);
455 return -2 ;
456 }
457 if (chan < 4) { /* low DMA controller */
458 ffport = DMA1_FFC;
459 waport = DMA1_CHN(chan) + 1;
460 } else { /* high DMA controller */
461 ffport = DMA2_FFC;
462 waport = DMA2_CHN(chan - 4) + 2;
463 }
464
465 disable_intr(); /* no interrupts Mr Jones! */
466 outb(ffport, 0); /* clear register LSB flipflop */
467 low1 = inb(waport);
468 high1 = inb(waport);
469 outb(ffport, 0); /* clear again */
470 low2 = inb(waport);
471 high2 = inb(waport);
472 enable_intr(); /* enable interrupts again */
473
474 /*
475 * Now decide if a wrap has tried to skew our results.
476 * Note that after TC, the count will read 0xffff, while we want
477 * to return zero, so we add and then mask to compensate.
478 */
479 if (low1 >= low2) {
480 cnt = (low1 + (high1 << 8) + 1) & 0xffff;
481 } else {
482 cnt = (low2 + (high2 << 8) + 1) & 0xffff;
483 }
484
485 if (chan >= 4) /* high channels move words */
486 cnt *= 2;
487 return(cnt);
488}
489
490/*
| 64static int isa_dmarangecheck(caddr_t va, u_int length, int chan);
65
66static caddr_t dma_bouncebuf[8];
67static u_int dma_bouncebufsize[8];
68static u_int8_t dma_bounced = 0;
69static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */
70static u_int8_t dma_inuse = 0; /* User for acquire/release */
71static u_int8_t dma_auto_mode = 0;
72
73#define VALID_DMA_MASK (7)
74
75/* high byte of address is stored in this port for i-th dma channel */
76static int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
77
78/*
79 * Setup a DMA channel's bounce buffer.
80 */
81int
82isa_dma_init(int chan, u_int bouncebufsize, int flag)
83{
84 void *buf;
85
86 /*
87 * If a DMA channel is shared, both drivers have to call isa_dma_init
88 * since they don't know that the other driver will do it.
89 * Just return if we're already set up good.
90 * XXX: this only works if they agree on the bouncebuf size. This
91 * XXX: is typically the case since they are multiple instances of
92 * XXX: the same driver.
93 */
94 if (dma_bouncebuf[chan] != NULL)
95 return (0);
96
97#ifdef DIAGNOSTIC
98 if (chan & ~VALID_DMA_MASK)
99 panic("isa_dma_init: channel out of range");
100#endif
101
102 dma_bouncebufsize[chan] = bouncebufsize;
103
104 /* Try malloc() first. It works better if it works. */
105 buf = malloc(bouncebufsize, M_DEVBUF, flag);
106 if (buf != NULL) {
107 if (isa_dmarangecheck(buf, bouncebufsize, chan) == 0) {
108 dma_bouncebuf[chan] = buf;
109 return (0);
110 }
111 free(buf, M_DEVBUF);
112 }
113 buf = contigmalloc(bouncebufsize, M_DEVBUF, flag, 0ul, 0xfffffful,
114 1ul, chan & 4 ? 0x20000ul : 0x10000ul);
115 if (buf == NULL)
116 return (ENOMEM);
117 dma_bouncebuf[chan] = buf;
118 return (0);
119}
120
121/*
122 * Register a DMA channel's usage. Usually called from a device driver
123 * in open() or during its initialization.
124 */
125int
126isa_dma_acquire(chan)
127 int chan;
128{
129#ifdef DIAGNOSTIC
130 if (chan & ~VALID_DMA_MASK)
131 panic("isa_dma_acquire: channel out of range");
132#endif
133
134 if (dma_inuse & (1 << chan)) {
135 printf("isa_dma_acquire: channel %d already in use\n", chan);
136 return (EBUSY);
137 }
138 dma_inuse |= (1 << chan);
139 dma_auto_mode &= ~(1 << chan);
140
141 return (0);
142}
143
144/*
145 * Unregister a DMA channel's usage. Usually called from a device driver
146 * during close() or during its shutdown.
147 */
148void
149isa_dma_release(chan)
150 int chan;
151{
152#ifdef DIAGNOSTIC
153 if (chan & ~VALID_DMA_MASK)
154 panic("isa_dma_release: channel out of range");
155
156 if ((dma_inuse & (1 << chan)) == 0)
157 printf("isa_dma_release: channel %d not in use\n", chan);
158#endif
159
160 if (dma_busy & (1 << chan)) {
161 dma_busy &= ~(1 << chan);
162 /*
163 * XXX We should also do "dma_bounced &= (1 << chan);"
164 * because we are acting on behalf of isa_dmadone() which
165 * was not called to end the last DMA operation. This does
166 * not matter now, but it may in the future.
167 */
168 }
169
170 dma_inuse &= ~(1 << chan);
171 dma_auto_mode &= ~(1 << chan);
172}
173
174/*
175 * isa_dmacascade(): program 8237 DMA controller channel to accept
176 * external dma control by a board.
177 */
178void
179isa_dmacascade(chan)
180 int chan;
181{
182#ifdef DIAGNOSTIC
183 if (chan & ~VALID_DMA_MASK)
184 panic("isa_dmacascade: channel out of range");
185#endif
186
187 /* set dma channel mode, and set dma channel mode */
188 if ((chan & 4) == 0) {
189 outb(DMA1_MODE, DMA37MD_CASCADE | chan);
190 outb(DMA1_SMSK, chan);
191 } else {
192 outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
193 outb(DMA2_SMSK, chan & 3);
194 }
195}
196
197/*
198 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
199 * problems by using a bounce buffer.
200 */
201void
202isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
203{
204 vm_paddr_t phys;
205 int waport;
206 caddr_t newaddr;
207
208 GIANT_REQUIRED;
209
210#ifdef DIAGNOSTIC
211 if (chan & ~VALID_DMA_MASK)
212 panic("isa_dmastart: channel out of range");
213
214 if ((chan < 4 && nbytes > (1<<16))
215 || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1)))
216 panic("isa_dmastart: impossible request");
217
218 if ((dma_inuse & (1 << chan)) == 0)
219 printf("isa_dmastart: channel %d not acquired\n", chan);
220#endif
221
222#if 0
223 /*
224 * XXX This should be checked, but drivers like ad1848 only call
225 * isa_dmastart() once because they use Auto DMA mode. If we
226 * leave this in, drivers that do this will print this continuously.
227 */
228 if (dma_busy & (1 << chan))
229 printf("isa_dmastart: channel %d busy\n", chan);
230#endif
231
232 dma_busy |= (1 << chan);
233
234 if (isa_dmarangecheck(addr, nbytes, chan)) {
235 if (dma_bouncebuf[chan] == NULL
236 || dma_bouncebufsize[chan] < nbytes)
237 panic("isa_dmastart: bad bounce buffer");
238 dma_bounced |= (1 << chan);
239 newaddr = dma_bouncebuf[chan];
240
241 /* copy bounce buffer on write */
242 if (!(flags & ISADMA_READ))
243 bcopy(addr, newaddr, nbytes);
244 addr = newaddr;
245 }
246
247 /* translate to physical */
248 phys = pmap_extract(kernel_pmap, (vm_offset_t)addr);
249
250 if (flags & ISADMA_RAW) {
251 dma_auto_mode |= (1 << chan);
252 } else {
253 dma_auto_mode &= ~(1 << chan);
254 }
255
256 if ((chan & 4) == 0) {
257 /*
258 * Program one of DMA channels 0..3. These are
259 * byte mode channels.
260 */
261 /* set dma channel mode, and reset address ff */
262
263 /* If ISADMA_RAW flag is set, then use autoinitialise mode */
264 if (flags & ISADMA_RAW) {
265 if (flags & ISADMA_READ)
266 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
267 else
268 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
269 }
270 else
271 if (flags & ISADMA_READ)
272 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
273 else
274 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
275 outb(DMA1_FFC, 0);
276
277 /* send start address */
278 waport = DMA1_CHN(chan);
279 outb(waport, phys);
280 outb(waport, phys>>8);
281 outb(dmapageport[chan], phys>>16);
282
283 /* send count */
284 outb(waport + 1, --nbytes);
285 outb(waport + 1, nbytes>>8);
286
287 /* unmask channel */
288 outb(DMA1_SMSK, chan);
289 } else {
290 /*
291 * Program one of DMA channels 4..7. These are
292 * word mode channels.
293 */
294 /* set dma channel mode, and reset address ff */
295
296 /* If ISADMA_RAW flag is set, then use autoinitialise mode */
297 if (flags & ISADMA_RAW) {
298 if (flags & ISADMA_READ)
299 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
300 else
301 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
302 }
303 else
304 if (flags & ISADMA_READ)
305 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
306 else
307 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
308 outb(DMA2_FFC, 0);
309
310 /* send start address */
311 waport = DMA2_CHN(chan - 4);
312 outb(waport, phys>>1);
313 outb(waport, phys>>9);
314 outb(dmapageport[chan], phys>>16);
315
316 /* send count */
317 nbytes >>= 1;
318 outb(waport + 2, --nbytes);
319 outb(waport + 2, nbytes>>8);
320
321 /* unmask channel */
322 outb(DMA2_SMSK, chan & 3);
323 }
324}
325
326void
327isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
328{
329#ifdef DIAGNOSTIC
330 if (chan & ~VALID_DMA_MASK)
331 panic("isa_dmadone: channel out of range");
332
333 if ((dma_inuse & (1 << chan)) == 0)
334 printf("isa_dmadone: channel %d not acquired\n", chan);
335#endif
336
337 if (((dma_busy & (1 << chan)) == 0) &&
338 (dma_auto_mode & (1 << chan)) == 0 )
339 printf("isa_dmadone: channel %d not busy\n", chan);
340
341 if ((dma_auto_mode & (1 << chan)) == 0)
342 outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
343
344 if (dma_bounced & (1 << chan)) {
345 /* copy bounce buffer on read */
346 if (flags & ISADMA_READ)
347 bcopy(dma_bouncebuf[chan], addr, nbytes);
348
349 dma_bounced &= ~(1 << chan);
350 }
351 dma_busy &= ~(1 << chan);
352}
353
354/*
355 * Check for problems with the address range of a DMA transfer
356 * (non-contiguous physical pages, outside of bus address space,
357 * crossing DMA page boundaries).
358 * Return true if special handling needed.
359 */
360
361static int
362isa_dmarangecheck(caddr_t va, u_int length, int chan)
363{
364 vm_paddr_t phys, priorpage = 0;
365 vm_offset_t endva;
366 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1);
367
368 GIANT_REQUIRED;
369
370 endva = (vm_offset_t)round_page((vm_offset_t)va + length);
371 for (; va < (caddr_t) endva ; va += PAGE_SIZE) {
372 phys = trunc_page(pmap_extract(kernel_pmap, (vm_offset_t)va));
373#define ISARAM_END RAM_END
374 if (phys == 0)
375 panic("isa_dmacheck: no physical page present");
376 if (phys >= ISARAM_END)
377 return (1);
378 if (priorpage) {
379 if (priorpage + PAGE_SIZE != phys)
380 return (1);
381 /* check if crossing a DMA page boundary */
382 if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk)
383 return (1);
384 }
385 priorpage = phys;
386 }
387 return (0);
388}
389
390/*
391 * Query the progress of a transfer on a DMA channel.
392 *
393 * To avoid having to interrupt a transfer in progress, we sample
394 * each of the high and low databytes twice, and apply the following
395 * logic to determine the correct count.
396 *
397 * Reads are performed with interrupts disabled, thus it is to be
398 * expected that the time between reads is very small. At most
399 * one rollover in the low count byte can be expected within the
400 * four reads that are performed.
401 *
402 * There are three gaps in which a rollover can occur :
403 *
404 * - read low1
405 * gap1
406 * - read high1
407 * gap2
408 * - read low2
409 * gap3
410 * - read high2
411 *
412 * If a rollover occurs in gap1 or gap2, the low2 value will be
413 * greater than the low1 value. In this case, low2 and high2 are a
414 * corresponding pair.
415 *
416 * In any other case, low1 and high1 can be considered to be correct.
417 *
418 * The function returns the number of bytes remaining in the transfer,
419 * or -1 if the channel requested is not active.
420 *
421 */
422int
423isa_dmastatus(int chan)
424{
425 u_long cnt = 0;
426 int ffport, waport;
427 u_long low1, high1, low2, high2;
428
429 /* channel active? */
430 if ((dma_inuse & (1 << chan)) == 0) {
431 printf("isa_dmastatus: channel %d not active\n", chan);
432 return(-1);
433 }
434 /* channel busy? */
435
436 if (((dma_busy & (1 << chan)) == 0) &&
437 (dma_auto_mode & (1 << chan)) == 0 ) {
438 printf("chan %d not busy\n", chan);
439 return -2 ;
440 }
441 if (chan < 4) { /* low DMA controller */
442 ffport = DMA1_FFC;
443 waport = DMA1_CHN(chan) + 1;
444 } else { /* high DMA controller */
445 ffport = DMA2_FFC;
446 waport = DMA2_CHN(chan - 4) + 2;
447 }
448
449 disable_intr(); /* no interrupts Mr Jones! */
450 outb(ffport, 0); /* clear register LSB flipflop */
451 low1 = inb(waport);
452 high1 = inb(waport);
453 outb(ffport, 0); /* clear again */
454 low2 = inb(waport);
455 high2 = inb(waport);
456 enable_intr(); /* enable interrupts again */
457
458 /*
459 * Now decide if a wrap has tried to skew our results.
460 * Note that after TC, the count will read 0xffff, while we want
461 * to return zero, so we add and then mask to compensate.
462 */
463 if (low1 >= low2) {
464 cnt = (low1 + (high1 << 8) + 1) & 0xffff;
465 } else {
466 cnt = (low2 + (high2 << 8) + 1) & 0xffff;
467 }
468
469 if (chan >= 4) /* high channels move words */
470 cnt *= 2;
471 return(cnt);
472}
473
474/*
|
491 * Stop a DMA transfer currently in progress.
492 */
493int
494isa_dmastop(int chan)
495{
496 if ((dma_inuse & (1 << chan)) == 0)
497 printf("isa_dmastop: channel %d not acquired\n", chan);
498
499 if (((dma_busy & (1 << chan)) == 0) &&
500 ((dma_auto_mode & (1 << chan)) == 0)) {
501 printf("chan %d not busy\n", chan);
502 return -2 ;
503 }
504
505 if ((chan & 4) == 0) {
506 outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */);
507 } else {
508 outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */);
509 }
510 return(isa_dmastatus(chan));
511}
512
513/*
514 * Attach to the ISA PnP descriptor for the AT DMA controller
515 */
516static struct isa_pnp_id atdma_ids[] = {
517 { 0x0002d041 /* PNP0200 */, "AT DMA controller" },
518 { 0 }
519};
520
521static int
522atdma_probe(device_t dev)
523{
524 int result;
525
526 if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0)
527 device_quiet(dev);
528 return(result);
529}
530
531static int
532atdma_attach(device_t dev)
533{
534 return(0);
535}
536
537static device_method_t atdma_methods[] = {
538 /* Device interface */
539 DEVMETHOD(device_probe, atdma_probe),
540 DEVMETHOD(device_attach, atdma_attach),
541 DEVMETHOD(device_detach, bus_generic_detach),
542 DEVMETHOD(device_shutdown, bus_generic_shutdown),
543 DEVMETHOD(device_suspend, bus_generic_suspend),
544 DEVMETHOD(device_resume, bus_generic_resume),
545 { 0, 0 }
546};
547
548static driver_t atdma_driver = {
549 "atdma",
550 atdma_methods,
551 1, /* no softc */
552};
553
554static devclass_t atdma_devclass;
555
556DRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0);
557DRIVER_MODULE(atdma, acpi, atdma_driver, atdma_devclass, 0, 0);
| 488 * Stop a DMA transfer currently in progress.
489 */
490int
491isa_dmastop(int chan)
492{
493 if ((dma_inuse & (1 << chan)) == 0)
494 printf("isa_dmastop: channel %d not acquired\n", chan);
495
496 if (((dma_busy & (1 << chan)) == 0) &&
497 ((dma_auto_mode & (1 << chan)) == 0)) {
498 printf("chan %d not busy\n", chan);
499 return -2 ;
500 }
501
502 if ((chan & 4) == 0) {
503 outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */);
504 } else {
505 outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */);
506 }
507 return(isa_dmastatus(chan));
508}
509
510/*
511 * Attach to the ISA PnP descriptor for the AT DMA controller
512 */
513static struct isa_pnp_id atdma_ids[] = {
514 { 0x0002d041 /* PNP0200 */, "AT DMA controller" },
515 { 0 }
516};
517
518static int
519atdma_probe(device_t dev)
520{
521 int result;
522
523 if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0)
524 device_quiet(dev);
525 return(result);
526}
527
528static int
529atdma_attach(device_t dev)
530{
531 return(0);
532}
533
534static device_method_t atdma_methods[] = {
535 /* Device interface */
536 DEVMETHOD(device_probe, atdma_probe),
537 DEVMETHOD(device_attach, atdma_attach),
538 DEVMETHOD(device_detach, bus_generic_detach),
539 DEVMETHOD(device_shutdown, bus_generic_shutdown),
540 DEVMETHOD(device_suspend, bus_generic_suspend),
541 DEVMETHOD(device_resume, bus_generic_resume),
542 { 0, 0 }
543};
544
545static driver_t atdma_driver = {
546 "atdma",
547 atdma_methods,
548 1, /* no softc */
549};
550
551static devclass_t atdma_devclass;
552
553DRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0);
554DRIVER_MODULE(atdma, acpi, atdma_driver, atdma_devclass, 0, 0);
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