| elcr.c (241856) | elcr.c (241885) |
|---|---|
| 1/*- 2 * Copyright (c) 2004 John Baldwin <jhb@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 14 unchanged lines hidden (view full) --- 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2004 John Baldwin <jhb@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 14 unchanged lines hidden (view full) --- 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30#include <sys/cdefs.h> |
| 31__FBSDID("$FreeBSD: head/sys/x86/isa/elcr.c 241856 2012-10-22 03:41:14Z eadler $"); | 31__FBSDID("$FreeBSD: head/sys/x86/isa/elcr.c 241885 2012-10-22 13:06:09Z eadler $"); |
| 32 33/* 34 * The ELCR is a register that controls the trigger mode and polarity of 35 * EISA and ISA interrupts. In FreeBSD 3.x and 4.x, the ELCR was only 36 * consulted for determining the appropriate trigger mode of EISA 37 * interrupts when using an APIC. However, it seems that almost all 38 * systems that include PCI also include an ELCR that manages the ISA 39 * IRQs 0 through 15. Thus, we check for the presence of an ELCR on --- 39 unchanged lines hidden (view full) --- 79 printf("\n"); 80 for (i = 0; i < 16; i++) 81 if (elcr_status & ELCR_MASK(i)) 82 printf(" L"); 83 else 84 printf(" E"); 85 printf("\n"); 86 } | 32 33/* 34 * The ELCR is a register that controls the trigger mode and polarity of 35 * EISA and ISA interrupts. In FreeBSD 3.x and 4.x, the ELCR was only 36 * consulted for determining the appropriate trigger mode of EISA 37 * interrupts when using an APIC. However, it seems that almost all 38 * systems that include PCI also include an ELCR that manages the ISA 39 * IRQs 0 through 15. Thus, we check for the presence of an ELCR on --- 39 unchanged lines hidden (view full) --- 79 printf("\n"); 80 for (i = 0; i < 16; i++) 81 if (elcr_status & ELCR_MASK(i)) 82 printf(" L"); 83 else 84 printf(" E"); 85 printf("\n"); 86 } |
| 87 if (resource_disabled("elcr", 0)) 88 return (ENXIO); |
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| 87 elcr_found = 1; 88 return (0); 89} 90 91/* 92 * Returns 1 for level trigger, 0 for edge. 93 */ 94enum intr_trigger --- 43 unchanged lines hidden --- | 89 elcr_found = 1; 90 return (0); 91} 92 93/* 94 * Returns 1 for level trigger, 0 for edge. 95 */ 96enum intr_trigger --- 43 unchanged lines hidden --- |