| exception.S (166105) | exception.S (172066) |
|---|---|
| 1/*- 2 * Copyright (c) 1997 Berkeley Software Design, Inc. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 40 unchanged lines hidden (view full) --- 49 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 50 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 51 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 52 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 53 * SUCH DAMAGE. 54 */ 55 56#include <machine/asm.h> | 1/*- 2 * Copyright (c) 1997 Berkeley Software Design, Inc. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 40 unchanged lines hidden (view full) --- 49 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 50 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 51 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 52 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 53 * SUCH DAMAGE. 54 */ 55 56#include <machine/asm.h> |
| 57__FBSDID("$FreeBSD: head/sys/sparc64/sparc64/exception.S 166105 2007-01-19 11:15:34Z marius $"); | 57__FBSDID("$FreeBSD: head/sys/sparc64/sparc64/exception.S 172066 2007-09-06 19:16:30Z marius $"); |
| 58 59#include "opt_compat.h" 60#include "opt_ddb.h" 61 62#include <machine/asi.h> 63#include <machine/asmacros.h> 64#include <machine/frame.h> 65#include <machine/fsr.h> --- 2259 unchanged lines hidden (view full) --- 2325 stx %i1, [%sp + SPOFF + CCFSZ + TF_O1] 2326 stx %i2, [%sp + SPOFF + CCFSZ + TF_O2] 2327 stx %i3, [%sp + SPOFF + CCFSZ + TF_O3] 2328 stx %i4, [%sp + SPOFF + CCFSZ + TF_O4] 2329 stx %i5, [%sp + SPOFF + CCFSZ + TF_O5] 2330 stx %i6, [%sp + SPOFF + CCFSZ + TF_O6] 2331 stx %i7, [%sp + SPOFF + CCFSZ + TF_O7] 2332 | 58 59#include "opt_compat.h" 60#include "opt_ddb.h" 61 62#include <machine/asi.h> 63#include <machine/asmacros.h> 64#include <machine/frame.h> 65#include <machine/fsr.h> --- 2259 unchanged lines hidden (view full) --- 2325 stx %i1, [%sp + SPOFF + CCFSZ + TF_O1] 2326 stx %i2, [%sp + SPOFF + CCFSZ + TF_O2] 2327 stx %i3, [%sp + SPOFF + CCFSZ + TF_O3] 2328 stx %i4, [%sp + SPOFF + CCFSZ + TF_O4] 2329 stx %i5, [%sp + SPOFF + CCFSZ + TF_O5] 2330 stx %i6, [%sp + SPOFF + CCFSZ + TF_O6] 2331 stx %i7, [%sp + SPOFF + CCFSZ + TF_O7] 2332 |
| 2333 call critical_enter 2334 nop 2335 | |
| 2336 SET(intr_handlers, %l1, %l0) 2337 sllx %l3, IH_SHIFT, %l1 2338 ldx [%l0 + %l1], %l1 2339 KASSERT(%l1, "tl0_intr: ih null") 2340 call %l1 2341 add %sp, CCFSZ + SPOFF, %o0 2342 | 2333 SET(intr_handlers, %l1, %l0) 2334 sllx %l3, IH_SHIFT, %l1 2335 ldx [%l0 + %l1], %l1 2336 KASSERT(%l1, "tl0_intr: ih null") 2337 call %l1 2338 add %sp, CCFSZ + SPOFF, %o0 2339 |
| 2343 call critical_exit 2344 nop 2345 | |
| 2346 /* %l3 contains PIL */ 2347 SET(intrcnt, %l1, %l2) 2348 prefetcha [%l2] ASI_N, 1 2349 SET(pil_countp, %l1, %l0) 2350 sllx %l3, 1, %l1 2351 lduh [%l0 + %l1], %l0 2352 sllx %l0, 3, %l0 2353 add %l0, %l2, %l0 --- 488 unchanged lines hidden (view full) --- 2842 stx %g3, [%sp + SPOFF + CCFSZ + TF_G3] 2843 stx %g4, [%sp + SPOFF + CCFSZ + TF_G4] 2844 stx %g5, [%sp + SPOFF + CCFSZ + TF_G5] 2845 2846 mov %l4, PCB_REG 2847 mov %l5, PCPU_REG 2848 wrpr %g0, PSTATE_KERNEL, %pstate 2849 | 2340 /* %l3 contains PIL */ 2341 SET(intrcnt, %l1, %l2) 2342 prefetcha [%l2] ASI_N, 1 2343 SET(pil_countp, %l1, %l0) 2344 sllx %l3, 1, %l1 2345 lduh [%l0 + %l1], %l0 2346 sllx %l0, 3, %l0 2347 add %l0, %l2, %l0 --- 488 unchanged lines hidden (view full) --- 2836 stx %g3, [%sp + SPOFF + CCFSZ + TF_G3] 2837 stx %g4, [%sp + SPOFF + CCFSZ + TF_G4] 2838 stx %g5, [%sp + SPOFF + CCFSZ + TF_G5] 2839 2840 mov %l4, PCB_REG 2841 mov %l5, PCPU_REG 2842 wrpr %g0, PSTATE_KERNEL, %pstate 2843 |
| 2850 call critical_enter 2851 nop 2852 | |
| 2853 SET(intr_handlers, %l5, %l4) 2854 sllx %l7, IH_SHIFT, %l5 2855 ldx [%l4 + %l5], %l5 2856 KASSERT(%l5, "tl1_intr: ih null") 2857 call %l5 2858 add %sp, CCFSZ + SPOFF, %o0 2859 | 2844 SET(intr_handlers, %l5, %l4) 2845 sllx %l7, IH_SHIFT, %l5 2846 ldx [%l4 + %l5], %l5 2847 KASSERT(%l5, "tl1_intr: ih null") 2848 call %l5 2849 add %sp, CCFSZ + SPOFF, %o0 2850 |
| 2860 call critical_exit 2861 nop 2862 | |
| 2863 /* %l7 contains PIL */ 2864 SET(intrcnt, %l5, %l4) 2865 prefetcha [%l4] ASI_N, 1 2866 SET(pil_countp, %l5, %l6) 2867 sllx %l7, 1, %l5 2868 lduh [%l5 + %l6], %l5 2869 sllx %l5, 3, %l5 2870 add %l5, %l4, %l4 --- 80 unchanged lines hidden --- | 2851 /* %l7 contains PIL */ 2852 SET(intrcnt, %l5, %l4) 2853 prefetcha [%l4] ASI_N, 1 2854 SET(pil_countp, %l5, %l6) 2855 sllx %l7, 1, %l5 2856 lduh [%l5 + %l6], %l5 2857 sllx %l5, 3, %l5 2858 add %l5, %l4, %l4 --- 80 unchanged lines hidden --- |