| platform_powermac.c (260674) | platform_powermac.c (262675) |
|---|---|
| 1/*- 2 * Copyright (c) 2008 Marcel Moolenaar 3 * Copyright (c) 2009 Nathan Whitehorn 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 12 unchanged lines hidden (view full) --- 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2008 Marcel Moolenaar 3 * Copyright (c) 2009 Nathan Whitehorn 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 12 unchanged lines hidden (view full) --- 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> |
| 29__FBSDID("$FreeBSD: stable/10/sys/powerpc/powermac/platform_powermac.c 260674 2014-01-15 06:17:15Z jhibbits $"); | 29__FBSDID("$FreeBSD: stable/10/sys/powerpc/powermac/platform_powermac.c 262675 2014-03-02 02:35:46Z jhibbits $"); |
| 30 31#include <sys/param.h> 32#include <sys/systm.h> 33#include <sys/kernel.h> 34#include <sys/bus.h> 35#include <sys/pcpu.h> 36#include <sys/proc.h> 37#include <sys/smp.h> 38#include <vm/vm.h> 39#include <vm/pmap.h> 40 | 30 31#include <sys/param.h> 32#include <sys/systm.h> 33#include <sys/kernel.h> 34#include <sys/bus.h> 35#include <sys/pcpu.h> 36#include <sys/proc.h> 37#include <sys/smp.h> 38#include <vm/vm.h> 39#include <vm/pmap.h> 40 |
| 41#include <machine/altivec.h> /* For save_vec() */ |
|
| 41#include <machine/bus.h> 42#include <machine/cpu.h> | 42#include <machine/bus.h> 43#include <machine/cpu.h> |
| 44#include <machine/fpu.h> /* For save_fpu() */ |
|
| 43#include <machine/hid.h> 44#include <machine/platformvar.h> 45#include <machine/pmap.h> | 45#include <machine/hid.h> 46#include <machine/platformvar.h> 47#include <machine/pmap.h> |
| 48#include <machine/setjmp.h> |
|
| 46#include <machine/smp.h> 47#include <machine/spr.h> 48 49#include <dev/ofw/openfirm.h> 50#include <machine/ofw_machdep.h> 51 52#include "platform_if.h" 53 | 49#include <machine/smp.h> 50#include <machine/spr.h> 51 52#include <dev/ofw/openfirm.h> 53#include <machine/ofw_machdep.h> 54 55#include "platform_if.h" 56 |
| 54#ifdef SMP | |
| 55extern void *ap_pcpu; | 57extern void *ap_pcpu; |
| 56#endif | |
| 57 58static int powermac_probe(platform_t); 59static int powermac_attach(platform_t); 60void powermac_mem_regions(platform_t, struct mem_region **phys, int *physsz, 61 struct mem_region **avail, int *availsz); 62static u_long powermac_timebase_freq(platform_t, struct cpuref *cpuref); 63static int powermac_smp_first_cpu(platform_t, struct cpuref *cpuref); 64static int powermac_smp_next_cpu(platform_t, struct cpuref *cpuref); 65static int powermac_smp_get_bsp(platform_t, struct cpuref *cpuref); 66static int powermac_smp_start_cpu(platform_t, struct pcpu *cpu); 67static void powermac_reset(platform_t); | 58 59static int powermac_probe(platform_t); 60static int powermac_attach(platform_t); 61void powermac_mem_regions(platform_t, struct mem_region **phys, int *physsz, 62 struct mem_region **avail, int *availsz); 63static u_long powermac_timebase_freq(platform_t, struct cpuref *cpuref); 64static int powermac_smp_first_cpu(platform_t, struct cpuref *cpuref); 65static int powermac_smp_next_cpu(platform_t, struct cpuref *cpuref); 66static int powermac_smp_get_bsp(platform_t, struct cpuref *cpuref); 67static int powermac_smp_start_cpu(platform_t, struct pcpu *cpu); 68static void powermac_reset(platform_t); |
| 69static void powermac_sleep(platform_t); |
|
| 68 69static platform_method_t powermac_methods[] = { 70 PLATFORMMETHOD(platform_probe, powermac_probe), 71 PLATFORMMETHOD(platform_attach, powermac_attach), 72 PLATFORMMETHOD(platform_mem_regions, powermac_mem_regions), 73 PLATFORMMETHOD(platform_timebase_freq, powermac_timebase_freq), 74 75 PLATFORMMETHOD(platform_smp_first_cpu, powermac_smp_first_cpu), 76 PLATFORMMETHOD(platform_smp_next_cpu, powermac_smp_next_cpu), 77 PLATFORMMETHOD(platform_smp_get_bsp, powermac_smp_get_bsp), 78 PLATFORMMETHOD(platform_smp_start_cpu, powermac_smp_start_cpu), 79 80 PLATFORMMETHOD(platform_reset, powermac_reset), | 70 71static platform_method_t powermac_methods[] = { 72 PLATFORMMETHOD(platform_probe, powermac_probe), 73 PLATFORMMETHOD(platform_attach, powermac_attach), 74 PLATFORMMETHOD(platform_mem_regions, powermac_mem_regions), 75 PLATFORMMETHOD(platform_timebase_freq, powermac_timebase_freq), 76 77 PLATFORMMETHOD(platform_smp_first_cpu, powermac_smp_first_cpu), 78 PLATFORMMETHOD(platform_smp_next_cpu, powermac_smp_next_cpu), 79 PLATFORMMETHOD(platform_smp_get_bsp, powermac_smp_get_bsp), 80 PLATFORMMETHOD(platform_smp_start_cpu, powermac_smp_start_cpu), 81 82 PLATFORMMETHOD(platform_reset, powermac_reset), |
| 83 PLATFORMMETHOD(platform_sleep, powermac_sleep), |
|
| 81 82 PLATFORMMETHOD_END 83}; 84 85static platform_def_t powermac_platform = { 86 "powermac", 87 powermac_methods, 88 0 --- 232 unchanged lines hidden (view full) --- 321 322 return ((pc->pc_awake) ? 0 : EBUSY); 323#else 324 /* No SMP support */ 325 return (ENXIO); 326#endif 327} 328 | 84 85 PLATFORMMETHOD_END 86}; 87 88static platform_def_t powermac_platform = { 89 "powermac", 90 powermac_methods, 91 0 --- 232 unchanged lines hidden (view full) --- 324 325 return ((pc->pc_awake) ? 0 : EBUSY); 326#else 327 /* No SMP support */ 328 return (ENXIO); 329#endif 330} 331 |
| 329/* From p3-53 of the MPC7450 RISC Microprocessor Family Reference Manual */ 330void 331flush_disable_caches(void) 332{ 333 register_t msr; 334 register_t msscr0; 335 register_t cache_reg; 336 volatile uint32_t *memp; 337 uint32_t temp; 338 int i; 339 int x; 340 341 msr = mfmsr(); 342 powerpc_sync(); 343 mtmsr(msr & ~(PSL_EE | PSL_DR)); 344 msscr0 = mfspr(SPR_MSSCR0); 345 msscr0 &= ~MSSCR0_L2PFE; 346 mtspr(SPR_MSSCR0, msscr0); 347 powerpc_sync(); 348 isync(); 349 __asm__ __volatile__("dssall; sync"); 350 powerpc_sync(); 351 isync(); 352 __asm__ __volatile__("dcbf 0,%0" :: "r"(0)); 353 __asm__ __volatile__("dcbf 0,%0" :: "r"(0)); 354 __asm__ __volatile__("dcbf 0,%0" :: "r"(0)); 355 356 /* Lock the L1 Data cache. */ 357 mtspr(SPR_LDSTCR, mfspr(SPR_LDSTCR) | 0xFF); 358 powerpc_sync(); 359 isync(); 360 361 mtspr(SPR_LDSTCR, 0); 362 363 /* 364 * Perform this in two stages: Flush the cache starting in RAM, then do it 365 * from ROM. 366 */ 367 memp = (volatile uint32_t *)0x00000000; 368 for (i = 0; i < 128 * 1024; i++) { 369 temp = *memp; 370 __asm__ __volatile__("dcbf 0,%0" :: "r"(memp)); 371 memp += 32/sizeof(*memp); 372 } 373 374 memp = (volatile uint32_t *)0xfff00000; 375 x = 0xfe; 376 377 for (; x != 0xff;) { 378 mtspr(SPR_LDSTCR, x); 379 for (i = 0; i < 128; i++) { 380 temp = *memp; 381 __asm__ __volatile__("dcbf 0,%0" :: "r"(memp)); 382 memp += 32/sizeof(*memp); 383 } 384 x = ((x << 1) | 1) & 0xff; 385 } 386 mtspr(SPR_LDSTCR, 0); 387 388 cache_reg = mfspr(SPR_L2CR); 389 if (cache_reg & L2CR_L2E) { 390 cache_reg &= ~(L2CR_L2IO_7450 | L2CR_L2DO_7450); 391 mtspr(SPR_L2CR, cache_reg); 392 powerpc_sync(); 393 mtspr(SPR_L2CR, cache_reg | L2CR_L2HWF); 394 while (mfspr(SPR_L2CR) & L2CR_L2HWF) 395 ; /* Busy wait for cache to flush */ 396 powerpc_sync(); 397 cache_reg &= ~L2CR_L2E; 398 mtspr(SPR_L2CR, cache_reg); 399 powerpc_sync(); 400 mtspr(SPR_L2CR, cache_reg | L2CR_L2I); 401 powerpc_sync(); 402 while (mfspr(SPR_L2CR) & L2CR_L2I) 403 ; /* Busy wait for L2 cache invalidate */ 404 powerpc_sync(); 405 } 406 407 cache_reg = mfspr(SPR_L3CR); 408 if (cache_reg & L3CR_L3E) { 409 cache_reg &= ~(L3CR_L3IO | L3CR_L3DO); 410 mtspr(SPR_L3CR, cache_reg); 411 powerpc_sync(); 412 mtspr(SPR_L3CR, cache_reg | L3CR_L3HWF); 413 while (mfspr(SPR_L3CR) & L3CR_L3HWF) 414 ; /* Busy wait for cache to flush */ 415 powerpc_sync(); 416 cache_reg &= ~L3CR_L3E; 417 mtspr(SPR_L3CR, cache_reg); 418 powerpc_sync(); 419 mtspr(SPR_L3CR, cache_reg | L3CR_L3I); 420 powerpc_sync(); 421 while (mfspr(SPR_L3CR) & L3CR_L3I) 422 ; /* Busy wait for L3 cache invalidate */ 423 powerpc_sync(); 424 } 425 426 mtspr(SPR_HID0, mfspr(SPR_HID0) & ~HID0_DCE); 427 powerpc_sync(); 428 isync(); 429 430 mtmsr(msr); 431} 432 | |
| 433static void 434powermac_reset(platform_t platform) 435{ 436 OF_reboot(); 437} 438 | 332static void 333powermac_reset(platform_t platform) 334{ 335 OF_reboot(); 336} 337 |
| 338void 339powermac_sleep(platform_t platform) 340{ 341 342 *(unsigned long *)0x80 = 0x100; 343 cpu_sleep(); 344} 345 |
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