| cbus.h (22975) | cbus.h (48217) |
|---|---|
| 1/*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 20 unchanged lines hidden (view full) --- 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: @(#)isa.h 5.7 (Berkeley) 5/9/91 | 1/*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 20 unchanged lines hidden (view full) --- 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: @(#)isa.h 5.7 (Berkeley) 5/9/91 |
| 37 * $Id$ | 37 * $Id: pc98.h,v 1.10 1997/02/22 09:43:42 peter Exp $ |
| 38 */ 39 40#ifndef _PC98_PC98_PC98_H_ 41#define _PC98_PC98_PC98_H_ 42 43/* BEWARE: Included in both assembler and C code */ 44 45/* 46 * PC98 Bus conventions | 38 */ 39 40#ifndef _PC98_PC98_PC98_H_ 41#define _PC98_PC98_PC98_H_ 42 43/* BEWARE: Included in both assembler and C code */ 44 45/* 46 * PC98 Bus conventions |
| 47 */ 48/* 49 * PC98 Bus conventions | |
| 50 * modified for PC9801 by A.Kojima F.Ukai M.Ishii 51 * Kyoto University Microcomputer Club (KMC) 52 */ 53 54/* 55 * Input / Output Port Assignments 56 */ | 47 * modified for PC9801 by A.Kojima F.Ukai M.Ishii 48 * Kyoto University Microcomputer Club (KMC) 49 */ 50 51/* 52 * Input / Output Port Assignments 53 */ |
| 57 | |
| 58#ifndef IO_ISABEGIN 59#define IO_ISABEGIN 0x000 /* 0x000 - Beginning of I/O Registers */ 60 61/* PC98 IO address ... very dirty (^_^; */ 62 | 54#ifndef IO_ISABEGIN 55#define IO_ISABEGIN 0x000 /* 0x000 - Beginning of I/O Registers */ 56 57/* PC98 IO address ... very dirty (^_^; */ 58 |
| 63#define IO_ICU1 0x000 /* 8259A Interrupt Controller #1 */ 64#define IO_DMA 0x001 /* 8237A DMA Controller */ 65#define IO_ICU2 0x008 /* 8259A Interrupt Controller #2 */ 66#define IO_RTC 0x020 /* 4990A RTC */ 67#define IO_DMAPG 0x021 /* DMA Page Registers */ 68#define IO_COM1 0x030 /* 8251A RS232C serial I/O (int) */ 69#define IO_SYSPORT 0x031 /* 8255A System Port */ 70#define IO_PPI 0x035 /* Programmable Peripheral Interface */ 71#define IO_LPT 0x040 /* 8255A Printer Port */ 72#define IO_KBD 0x041 /* 8251A Keyboard */ 73#define IO_NMI 0x050 /* NMI Control */ 74#define IO_WAIT 0x05F /* WAIT 0.6 us */ 75#define IO_GDC1 0x060 /* 7220 GDC Text Control */ 76#define IO_TIMER1 0x071 /* 8253C Timer */ 77#define IO_SASI 0x080 /* SASI Hard Disk Controller */ 78#define IO_FD1 0x090 /* 765A 1MB FDC */ 79#define IO_GDC2 0x0a0 /* 7220 GDC Graphic Control */ 80#define IO_CGROM 0x0a1 /* Character ROM */ 81#define IO_COM2 0x0b1 /* 8251A RS232C serial I/O (ext) */ 82#define IO_COM3 0x0b9 /* 8251A RS232C serial I/O (ext) */ 83#define IO_FDPORT 0x0be /* FD I/F port (1M<->640K,EMTON) */ 84#define IO_FD2 0x0c8 /* 765A 640KB FDC */ 85#define IO_SIO1 0x0d0 /* MC16550II ext RS232C */ 86#define IO_REEST 0x0F0 /* CPU FPU reset */ 87#define IO_A2OEN 0x0F2 /* A20 enable */ 88#define IO_A20CT 0x0F6 /* A20 control enable/disable */ 89#define IO_NPX 0x0F8 /* Numeric Coprocessor */ | 59#define IO_ICU1 0x000 /* 8259A Interrupt Controller #1 */ 60#define IO_DMA 0x001 /* 8237A DMA Controller */ 61#define IO_ICU2 0x008 /* 8259A Interrupt Controller #2 */ 62#define IO_RTC 0x020 /* 4990A RTC */ 63#define IO_DMAPG 0x021 /* DMA Page Registers */ 64#define IO_COM1 0x030 /* 8251A RS232C serial I/O (int) */ 65#define IO_SYSPORT 0x031 /* 8255A System Port */ 66#define IO_PPI 0x035 /* Programmable Peripheral Interface */ 67#define IO_LPT 0x040 /* 8255A Printer Port */ 68#define IO_KBD 0x041 /* 8251A Keyboard */ 69#define IO_NMI 0x050 /* NMI Control */ 70#define IO_WAIT 0x05F /* WAIT 0.6 us */ 71#define IO_GDC1 0x060 /* 7220 GDC Text Control */ 72#define IO_TIMER1 0x071 /* 8253C Timer */ 73#define IO_SASI 0x080 /* SASI Hard Disk Controller */ 74#define IO_FD1 0x090 /* 765A 1MB FDC */ 75#define IO_GDC2 0x0A0 /* 7220 GDC Graphic Control */ 76#define IO_CGROM 0x0A1 /* Character ROM */ 77#define IO_COM2 0x0B1 /* 8251A RS232C serial I/O (ext) */ 78#define IO_COM3 0x0B9 /* 8251A RS232C serial I/O (ext) */ 79#define IO_FDPORT 0x0BE /* FD I/F port (1M<->640K,EMTON) */ 80#define IO_FD2 0x0C8 /* 765A 640KB FDC */ 81#define IO_SIO1 0x0D0 /* MC16550II ext RS232C */ 82#define IO_REEST 0x0F0 /* CPU FPU reset */ 83#define IO_A2OEN 0x0F2 /* A20 enable */ 84#define IO_A20CT 0x0F6 /* A20 control enable/disable */ 85#define IO_NPX 0x0F8 /* Numeric Coprocessor */ |
| 90#define IO_SOUND 0x188 /* YM2203 FM sound board */ | 86#define IO_SOUND 0x188 /* YM2203 FM sound board */ |
| 91#define IO_EGC 0x4a0 /* 7220 GDC Graphic Control */ 92#define IO_SCSI 0xcc0 /* SCSI Controller */ 93#define IO_SIO2 0x8d0 /* MC16550II ext RS232C */ 94#define IO_BEEPF 0x3fdb /* beep frequency */ 95#define IO_MOUSE 0x7fd9 /* mouse */ 96#define IO_BMS 0x7fd9 /* Bus Mouse */ 97#define IO_MSE 0x7fd9 /* Bus Mouse */ 98#define IO_MOUSETM 0xdfbd /* mouse timer */ 99 100#define IO_WD1_NEC 0x640 /* 98note IDE Hard disk controller */ 101#define IO_WD1_EPSON 0x80 /* 386note Hard disk controller */ | 87#define IO_EGC 0x4A0 /* 7220 GDC Graphic Control */ 88#define IO_SCSI 0xCC0 /* SCSI Controller */ 89#define IO_SIO2 0x8D0 /* MC16550II ext RS232C */ 90#define IO_BEEPF 0x3FDB /* beep frequency */ 91#define IO_MOUSE 0x7FD9 /* mouse */ 92#define IO_BMS 0x7FD9 /* Bus Mouse */ 93#define IO_MSE 0x7FD9 /* Bus Mouse */ 94#define IO_MOUSETM 0xDFBD /* mouse timer */ 95 96#define IO_WD1_NEC 0x640 /* 98note IDE Hard disk controller */ 97#define IO_WD1_EPSON 0x80 /* 386note Hard disk controller */ |
| 102#define IO_WD1 IO_WD1_NEC /* IDE Hard disk controller */ 103 104#define IO_ISAEND 0xFFFF /* - 0x3FF End of I/O Registers */ 105#endif /* !IO_ISABEGIN */ 106 107/* 108 * Input / Output Port Sizes - these are from several sources, and tend 109 * to be the larger of what was found, ie COM ports can be 4, but some 110 * boards do not fully decode the address, thus 8 ports are used. 111 */ | 98#define IO_WD1 IO_WD1_NEC /* IDE Hard disk controller */ 99 100#define IO_ISAEND 0xFFFF /* - 0x3FF End of I/O Registers */ 101#endif /* !IO_ISABEGIN */ 102 103/* 104 * Input / Output Port Sizes - these are from several sources, and tend 105 * to be the larger of what was found, ie COM ports can be 4, but some 106 * boards do not fully decode the address, thus 8 ports are used. 107 */ |
| 112 | |
| 113#ifndef IO_ISASIZES 114#define IO_ISASIZES 115 | 108#ifndef IO_ISASIZES 109#define IO_ISASIZES 110 |
| 116#define IO_COMSIZE 8 /* 8250, 16X50 com controllers (4?) */ | 111#define IO_ASCSIZE 5 /* AmiScan GI1904-based hand scanner */ |
| 117#define IO_CGASIZE 16 /* CGA controllers */ | 112#define IO_CGASIZE 16 /* CGA controllers */ |
| 113#define IO_COMSIZE 8 /* 8250, 16X50 com controllers (4?) */ |
|
| 118#define IO_DMASIZE 16 /* 8237 DMA controllers */ 119#define IO_DPGSIZE 32 /* 74LS612 DMA page registers */ | 114#define IO_DMASIZE 16 /* 8237 DMA controllers */ 115#define IO_DPGSIZE 32 /* 74LS612 DMA page registers */ |
| 116#define IO_EISASIZE 4096 /* EISA controllers */ |
|
| 120#define IO_FDCSIZE 8 /* Nec765 floppy controllers */ | 117#define IO_FDCSIZE 8 /* Nec765 floppy controllers */ |
| 121#define IO_WDCSIZE 8 /* WD compatible disk controllers */ | |
| 122#define IO_GAMSIZE 16 /* AT compatible game controllers */ | 118#define IO_GAMSIZE 16 /* AT compatible game controllers */ |
| 119#define IO_GSCSIZE 8 /* GeniScan GS-4500G hand scanner */ |
|
| 123#define IO_ICUSIZE 16 /* 8259A interrupt controllers */ 124#define IO_KBDSIZE 16 /* 8042 Keyboard controllers */ 125#define IO_LPTSIZE 8 /* LPT controllers, some use only 4 */ 126#define IO_MDASIZE 16 /* Monochrome display controllers */ | 120#define IO_ICUSIZE 16 /* 8259A interrupt controllers */ 121#define IO_KBDSIZE 16 /* 8042 Keyboard controllers */ 122#define IO_LPTSIZE 8 /* LPT controllers, some use only 4 */ 123#define IO_MDASIZE 16 /* Monochrome display controllers */ |
| 124#define IO_NPXSIZE 16 /* 80387/80487 NPX registers */ 125#define IO_PMPSIZE 2 /* 82347 power management peripheral */ 126#define IO_PSMSIZE 5 /* 8042 Keyboard controllers */ |
|
| 127#define IO_RTCSIZE 16 /* CMOS real time clock, NMI control */ 128#define IO_TMRSIZE 16 /* 8253 programmable timers */ | 127#define IO_RTCSIZE 16 /* CMOS real time clock, NMI control */ 128#define IO_TMRSIZE 16 /* 8253 programmable timers */ |
| 129#define IO_NPXSIZE 16 /* 80387/80487 NPX registers */ | |
| 130#define IO_VGASIZE 16 /* VGA controllers */ | 129#define IO_VGASIZE 16 /* VGA controllers */ |
| 131#define IO_EISASIZE 4096 /* EISA controllers */ 132#define IO_PMPSIZE 2 /* 82347 power management peripheral */ | 130#define IO_WDCSIZE 8 /* WD compatible disk controllers */ |
| 133 134#endif /* !IO_ISASIZES */ 135 136/* 137 * Input / Output Memory Physical Addresses 138 */ | 131 132#endif /* !IO_ISASIZES */ 133 134/* 135 * Input / Output Memory Physical Addresses 136 */ |
| 139 | |
| 140#ifndef IOM_BEGIN | 137#ifndef IOM_BEGIN |
| 141#define IOM_BEGIN 0x0a0000 /* Start of I/O Memory "hole" */ 142#define IOM_END 0x100000 /* End of I/O Memory "hole" */ | 138#define IOM_BEGIN 0x0A0000 /* Start of I/O Memory "hole" */ 139#define IOM_END 0x100000 /* End of I/O Memory "hole" */ |
| 143#define IOM_SIZE (IOM_END - IOM_BEGIN) | 140#define IOM_SIZE (IOM_END - IOM_BEGIN) |
| 144#endif /* !RAM_BEGIN */ | 141#endif /* !IOM_BEGIN */ |
| 145 146/* 147 * RAM Physical Address Space (ignoring the above mentioned "hole") 148 */ | 142 143/* 144 * RAM Physical Address Space (ignoring the above mentioned "hole") 145 */ |
| 149 | |
| 150#ifndef RAM_BEGIN 151#define RAM_BEGIN 0x0000000 /* Start of RAM Memory */ 152#ifdef EPSON_BOUNCEDMA 153#define RAM_END 0x0f00000 /* End of EPSON GR?? RAM Memory */ 154#else 155#define RAM_END 0x1000000 /* End of RAM Memory */ 156#endif 157#define RAM_SIZE (RAM_END - RAM_BEGIN) 158#endif /* !RAM_BEGIN */ 159 160#ifndef PC98 /* IBM-PC */ 161/* 162 * Oddball Physical Memory Addresses 163 */ 164#ifndef COMPAQ_RAMRELOC | 146#ifndef RAM_BEGIN 147#define RAM_BEGIN 0x0000000 /* Start of RAM Memory */ 148#ifdef EPSON_BOUNCEDMA 149#define RAM_END 0x0f00000 /* End of EPSON GR?? RAM Memory */ 150#else 151#define RAM_END 0x1000000 /* End of RAM Memory */ 152#endif 153#define RAM_SIZE (RAM_END - RAM_BEGIN) 154#endif /* !RAM_BEGIN */ 155 156#ifndef PC98 /* IBM-PC */ 157/* 158 * Oddball Physical Memory Addresses 159 */ 160#ifndef COMPAQ_RAMRELOC |
| 165#define COMPAQ_RAMRELOC 0x80c00000 /* Compaq RAM relocation/diag */ 166#define COMPAQ_RAMSETUP 0x80c00002 /* Compaq RAM setup */ | 161#define COMPAQ_RAMRELOC 0x80C00000 /* Compaq RAM relocation/diag */ 162#define COMPAQ_RAMSETUP 0x80C00002 /* Compaq RAM setup */ |
| 167#define WEITEK_FPU 0xC0000000 /* WTL 2167 */ 168#define CYRIX_EMC 0xC0000000 /* Cyrix EMC */ | 163#define WEITEK_FPU 0xC0000000 /* WTL 2167 */ 164#define CYRIX_EMC 0xC0000000 /* Cyrix EMC */ |
| 169#endif COMPAQ_RAMRELOC | 165#endif /* !COMPAQ_RAMRELOC */ |
| 170#endif 171 172#define M_NEC_PC98 0x0001 173#define M_EPSON_PC98 0x0002 174#define M_NOT_H98 0x0010 175#define M_H98 0x0020 176#define M_NOTE 0x0040 177#define M_NORMAL 0x1000 178#define M_8M 0x8000 179 180/* 181 * Obtained from NetBSD/pc98 182 */ 183#define MADDRUNK -1 184#define IRQUNK 0 185#define DRQUNK -1 186 187#endif /* !_PC98_PC98_PC98_H_ */ | 166#endif 167 168#define M_NEC_PC98 0x0001 169#define M_EPSON_PC98 0x0002 170#define M_NOT_H98 0x0010 171#define M_H98 0x0020 172#define M_NOTE 0x0040 173#define M_NORMAL 0x1000 174#define M_8M 0x8000 175 176/* 177 * Obtained from NetBSD/pc98 178 */ 179#define MADDRUNK -1 180#define IRQUNK 0 181#define DRQUNK -1 182 183#endif /* !_PC98_PC98_PC98_H_ */ |