1/* $OpenBSD: trap.h,v 1.3 1999/01/27 04:46:06 imp Exp $ */
2
3/*-
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1992, 1993
6 * The Regents of the University of California. All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department and Ralph Campbell.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 4. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * from: Utah Hdr: trap.h 1.1 90/07/09
37 * from: @(#)trap.h 8.1 (Berkeley) 6/10/93
38 * JNPR: trap.h,v 1.3 2006/12/02 09:53:41 katta
| 1/* $OpenBSD: trap.h,v 1.3 1999/01/27 04:46:06 imp Exp $ */
2
3/*-
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1992, 1993
6 * The Regents of the University of California. All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department and Ralph Campbell.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 4. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * from: Utah Hdr: trap.h 1.1 90/07/09
37 * from: @(#)trap.h 8.1 (Berkeley) 6/10/93
38 * JNPR: trap.h,v 1.3 2006/12/02 09:53:41 katta
|
39 * $FreeBSD: head/sys/mips/include/trap.h 205360 2010-03-20 05:07:15Z neel $
| 39 * $FreeBSD: head/sys/mips/include/trap.h 206717 2010-04-17 01:17:31Z jmallett $
|
40 */
41
42#ifndef _MACHINE_TRAP_H_
43#define _MACHINE_TRAP_H_
44
45/*
46 * Trap codes also known in trap.c for name strings.
47 * Used for indexing so modify with care.
48 */
49
50#define T_INT 0 /* Interrupt pending */
51#define T_TLB_MOD 1 /* TLB modified fault */
52#define T_TLB_LD_MISS 2 /* TLB miss on load or ifetch */
53#define T_TLB_ST_MISS 3 /* TLB miss on a store */
54#define T_ADDR_ERR_LD 4 /* Address error on a load or ifetch */
55#define T_ADDR_ERR_ST 5 /* Address error on a store */
56#define T_BUS_ERR_IFETCH 6 /* Bus error on an ifetch */
57#define T_BUS_ERR_LD_ST 7 /* Bus error on a load or store */
58#define T_SYSCALL 8 /* System call */
59#define T_BREAK 9 /* Breakpoint */
60#define T_RES_INST 10 /* Reserved instruction exception */
61#define T_COP_UNUSABLE 11 /* Coprocessor unusable */
62#define T_OVFLOW 12 /* Arithmetic overflow */
63#define T_TRAP 13 /* Trap instruction */
64#define T_VCEI 14 /* Virtual coherency instruction */
65#define T_FPE 15 /* Floating point exception */
66#define T_IWATCH 16 /* Inst. Watch address reference */
67#define T_C2E 18 /* Exception from coprocessor 2 */
68#define T_DWATCH 23 /* Data Watch address reference */
69#define T_MCHECK 24 /* Received an MCHECK */
70#define T_VCED 31 /* Virtual coherency data */
71
72#define T_USER 0x20 /* user-mode flag or'ed with type */
73
74#if !defined(SMP) && (defined(DDB) || defined(DEBUG))
75
76struct trapdebug { /* trap history buffer for debugging */
| 40 */
41
42#ifndef _MACHINE_TRAP_H_
43#define _MACHINE_TRAP_H_
44
45/*
46 * Trap codes also known in trap.c for name strings.
47 * Used for indexing so modify with care.
48 */
49
50#define T_INT 0 /* Interrupt pending */
51#define T_TLB_MOD 1 /* TLB modified fault */
52#define T_TLB_LD_MISS 2 /* TLB miss on load or ifetch */
53#define T_TLB_ST_MISS 3 /* TLB miss on a store */
54#define T_ADDR_ERR_LD 4 /* Address error on a load or ifetch */
55#define T_ADDR_ERR_ST 5 /* Address error on a store */
56#define T_BUS_ERR_IFETCH 6 /* Bus error on an ifetch */
57#define T_BUS_ERR_LD_ST 7 /* Bus error on a load or store */
58#define T_SYSCALL 8 /* System call */
59#define T_BREAK 9 /* Breakpoint */
60#define T_RES_INST 10 /* Reserved instruction exception */
61#define T_COP_UNUSABLE 11 /* Coprocessor unusable */
62#define T_OVFLOW 12 /* Arithmetic overflow */
63#define T_TRAP 13 /* Trap instruction */
64#define T_VCEI 14 /* Virtual coherency instruction */
65#define T_FPE 15 /* Floating point exception */
66#define T_IWATCH 16 /* Inst. Watch address reference */
67#define T_C2E 18 /* Exception from coprocessor 2 */
68#define T_DWATCH 23 /* Data Watch address reference */
69#define T_MCHECK 24 /* Received an MCHECK */
70#define T_VCED 31 /* Virtual coherency data */
71
72#define T_USER 0x20 /* user-mode flag or'ed with type */
73
74#if !defined(SMP) && (defined(DDB) || defined(DEBUG))
75
76struct trapdebug { /* trap history buffer for debugging */
|
77 u_int status;
78 u_int cause;
79 u_int vadr;
80 u_int pc;
81 u_int ra;
82 u_int sp;
83 u_int code;
| 77 register_t status;
78 register_t cause;
79 register_t vadr;
80 register_t pc;
81 register_t ra;
82 register_t sp;
83 register_t code;
|
84};
85
86#define trapdebug_enter(x, cd) { \
| 84};
85
86#define trapdebug_enter(x, cd) { \
|
87 intrmask_t s = disableintr(); \
| 87 register_t s = intr_disable(); \
|
88 trp->status = x->sr; \
89 trp->cause = x->cause; \
90 trp->vadr = x->badvaddr; \
91 trp->pc = x->pc; \
92 trp->sp = x->sp; \
93 trp->ra = x->ra; \
94 trp->code = cd; \
95 if (++trp == &trapdebug[TRAPSIZE]) \
96 trp = trapdebug; \
| 88 trp->status = x->sr; \
89 trp->cause = x->cause; \
90 trp->vadr = x->badvaddr; \
91 trp->pc = x->pc; \
92 trp->sp = x->sp; \
93 trp->ra = x->ra; \
94 trp->code = cd; \
95 if (++trp == &trapdebug[TRAPSIZE]) \
96 trp = trapdebug; \
|
97 restoreintr(s); \
| 97 intr_restore(s); \
|
98}
99
100#define TRAPSIZE 10 /* Trap log buffer length */
101extern struct trapdebug trapdebug[TRAPSIZE], *trp;
102
103void trapDump(char *msg);
104
105#else
106
107#define trapdebug_enter(x, cd)
108
109#endif
110
111void MipsFPTrap(u_int, u_int, u_int);
112void MipsKernGenException(void);
113void MipsKernIntr(void);
114void MipsTLBInvalidException(void);
115void MipsTLBMissException(void);
116void MipsUserGenException(void);
117void MipsUserIntr(void);
118
| 98}
99
100#define TRAPSIZE 10 /* Trap log buffer length */
101extern struct trapdebug trapdebug[TRAPSIZE], *trp;
102
103void trapDump(char *msg);
104
105#else
106
107#define trapdebug_enter(x, cd)
108
109#endif
110
111void MipsFPTrap(u_int, u_int, u_int);
112void MipsKernGenException(void);
113void MipsKernIntr(void);
114void MipsTLBInvalidException(void);
115void MipsTLBMissException(void);
116void MipsUserGenException(void);
117void MipsUserIntr(void);
118
|
119u_int trap(struct trapframe *);
| 119register_t trap(struct trapframe *);
|
120
121#ifndef LOCORE /* XXX */
122int check_address(void *);
123void platform_trap_enter(void);
124void platform_trap_exit(void);
125#endif
126
127#endif /* !_MACHINE_TRAP_H_ */
| 120
121#ifndef LOCORE /* XXX */
122int check_address(void *);
123void platform_trap_enter(void);
124void platform_trap_exit(void);
125#endif
126
127#endif /* !_MACHINE_TRAP_H_ */
|