| divsi3.S (245548) | divsi3.S (248367) |
|---|---|
| 1/* $NetBSD: divsi3.S,v 1.4 2003/04/05 23:27:15 bjh21 Exp $ */ 2 3/*- 4 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 5 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 6 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 7 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 8 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 9 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 10 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 11 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 12 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 13 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 14 * SUCH DAMAGE. 15 */ 16 17#include <machine/asm.h> | 1/* $NetBSD: divsi3.S,v 1.4 2003/04/05 23:27:15 bjh21 Exp $ */ 2 3/*- 4 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 5 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 6 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 7 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 8 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 9 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 10 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 11 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 12 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 13 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 14 * SUCH DAMAGE. 15 */ 16 17#include <machine/asm.h> |
| 18__FBSDID("$FreeBSD: head/sys/libkern/arm/divsi3.S 245548 2013-01-17 09:37:42Z andrew $"); | 18__FBSDID("$FreeBSD: head/sys/libkern/arm/divsi3.S 248367 2013-03-16 04:08:01Z andrew $"); |
| 19 20/* 21 * stack is aligned as there's a possibility of branching to L_overflow 22 * which makes a C call 23 */ 24 25ENTRY_NP(__umodsi3) 26 stmfd sp!, {lr} 27 sub sp, sp, #4 /* align stack */ 28 bl .L_udivide 29 add sp, sp, #4 /* unalign stack */ 30 mov r0, r1 31 ldmfd sp!, {pc} | 19 20/* 21 * stack is aligned as there's a possibility of branching to L_overflow 22 * which makes a C call 23 */ 24 25ENTRY_NP(__umodsi3) 26 stmfd sp!, {lr} 27 sub sp, sp, #4 /* align stack */ 28 bl .L_udivide 29 add sp, sp, #4 /* unalign stack */ 30 mov r0, r1 31 ldmfd sp!, {pc} |
| 32END(__umodsi3) |
|
| 32 33ENTRY_NP(__modsi3) 34 stmfd sp!, {lr} 35 sub sp, sp, #4 /* align stack */ 36 bl .L_divide 37 add sp, sp, #4 /* unalign stack */ 38 mov r0, r1 39 ldmfd sp!, {pc} 40 41.L_overflow: 42#if !defined(_KERNEL) && !defined(_STANDALONE) 43 mov r0, #8 /* SIGFPE */ 44 bl PIC_SYM(_C_LABEL(raise), PLT) /* raise it */ 45 mov r0, #0 46#else 47 /* XXX should cause a fatal error */ 48 mvn r0, #0 49#endif 50 RET | 33 34ENTRY_NP(__modsi3) 35 stmfd sp!, {lr} 36 sub sp, sp, #4 /* align stack */ 37 bl .L_divide 38 add sp, sp, #4 /* unalign stack */ 39 mov r0, r1 40 ldmfd sp!, {pc} 41 42.L_overflow: 43#if !defined(_KERNEL) && !defined(_STANDALONE) 44 mov r0, #8 /* SIGFPE */ 45 bl PIC_SYM(_C_LABEL(raise), PLT) /* raise it */ 46 mov r0, #0 47#else 48 /* XXX should cause a fatal error */ 49 mvn r0, #0 50#endif 51 RET |
| 52END(__modsi3) |
|
| 51 52#ifdef __ARM_EABI__ 53ENTRY_NP(__aeabi_uidiv) 54ENTRY_NP(__aeabi_uidivmod) 55#endif 56ENTRY_NP(__udivsi3) 57.L_udivide: /* r0 = r0 / r1; r1 = r0 % r1 */ 58 eor r0, r1, r0 --- 10 unchanged lines hidden (view full) --- 69 movs r1, r1, lsr #1 70 orrcs ip, ip, #0x10000000 /* ip bit 0x10000000 = bit 0 of r1 */ 71 b .L_divide_l1 72 73.L_divide_l0: /* r0 == 1 */ 74 mov r0, r1 75 mov r1, #0 76 RET | 53 54#ifdef __ARM_EABI__ 55ENTRY_NP(__aeabi_uidiv) 56ENTRY_NP(__aeabi_uidivmod) 57#endif 58ENTRY_NP(__udivsi3) 59.L_udivide: /* r0 = r0 / r1; r1 = r0 % r1 */ 60 eor r0, r1, r0 --- 10 unchanged lines hidden (view full) --- 71 movs r1, r1, lsr #1 72 orrcs ip, ip, #0x10000000 /* ip bit 0x10000000 = bit 0 of r1 */ 73 b .L_divide_l1 74 75.L_divide_l0: /* r0 == 1 */ 76 mov r0, r1 77 mov r1, #0 78 RET |
| 79#ifdef __ARM_EABI__ 80END(__aeabi_uidiv) 81END(__aeabi_uidivmod) 82#endif 83END(__udivsi3) |
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| 77 78#ifdef __ARM_EABI__ 79ENTRY_NP(__aeabi_idiv) 80ENTRY_NP(__aeabi_idivmod) 81#endif 82ENTRY_NP(__divsi3) 83.L_divide: /* r0 = r0 / r1; r1 = r0 % r1 */ 84 eor r0, r1, r0 --- 303 unchanged lines hidden (view full) --- 388 mov r1, r1, lsl #1 389 orrne r1, r1, #1 390 mov r3, r3, lsl #1 391 cmp r1, r0 392 subhs r1, r1, r0 393 addhs r3, r3, r2 394 mov r0, r3 395 RET | 84 85#ifdef __ARM_EABI__ 86ENTRY_NP(__aeabi_idiv) 87ENTRY_NP(__aeabi_idivmod) 88#endif 89ENTRY_NP(__divsi3) 90.L_divide: /* r0 = r0 / r1; r1 = r0 % r1 */ 91 eor r0, r1, r0 --- 303 unchanged lines hidden (view full) --- 395 mov r1, r1, lsl #1 396 orrne r1, r1, #1 397 mov r3, r3, lsl #1 398 cmp r1, r0 399 subhs r1, r1, r0 400 addhs r3, r3, r2 401 mov r0, r3 402 RET |
| 403#ifdef __ARM_EABI__ 404END(__aeabi_idiv) 405END(__aeabi_idivmod) 406#endif 407END(__divsi3) 408 |
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