| svr4_machdep.c (45270) | svr4_machdep.c (46129) |
|---|---|
| 1/* 2 * Copyright (c) 1998 Mark Newton 3 * Copyright (c) 1994 Christos Zoulas 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 113 unchanged lines hidden (view full) --- 122 r[SVR4_X86_GS] = tf->tf_vm86_gs; 123 r[SVR4_X86_FS] = tf->tf_vm86_fs; 124 r[SVR4_X86_ES] = tf->tf_vm86_es; 125 r[SVR4_X86_DS] = tf->tf_vm86_ds; 126 r[SVR4_X86_EFL] = get_vflags(p); 127 } else 128#endif 129 { | 1/* 2 * Copyright (c) 1998 Mark Newton 3 * Copyright (c) 1994 Christos Zoulas 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 113 unchanged lines hidden (view full) --- 122 r[SVR4_X86_GS] = tf->tf_vm86_gs; 123 r[SVR4_X86_FS] = tf->tf_vm86_fs; 124 r[SVR4_X86_ES] = tf->tf_vm86_es; 125 r[SVR4_X86_DS] = tf->tf_vm86_ds; 126 r[SVR4_X86_EFL] = get_vflags(p); 127 } else 128#endif 129 { |
| 130#if defined(__NetBSD__) |
|
| 130 __asm("movl %%gs,%w0" : "=r" (r[SVR4_X86_GS])); 131 __asm("movl %%fs,%w0" : "=r" (r[SVR4_X86_FS])); | 131 __asm("movl %%gs,%w0" : "=r" (r[SVR4_X86_GS])); 132 __asm("movl %%fs,%w0" : "=r" (r[SVR4_X86_FS])); |
| 133#else 134 r[SVR4_X86_GS] = rgs(); 135 r[SVR4_X86_FS] = tf->tf_fs; 136#endif |
|
| 132 r[SVR4_X86_ES] = tf->tf_es; 133 r[SVR4_X86_DS] = tf->tf_ds; 134 r[SVR4_X86_EFL] = tf->tf_eflags; 135 } 136 r[SVR4_X86_EDI] = tf->tf_edi; 137 r[SVR4_X86_ESI] = tf->tf_esi; 138 r[SVR4_X86_EBP] = tf->tf_ebp; 139 r[SVR4_X86_ESP] = tf->tf_esp; --- 85 unchanged lines hidden (view full) --- 225 * protected mode, the CPU will validate the segment registers 226 * automatically and generate a trap on violations. We handle 227 * the trap, rather than doing all of the checking here. 228 */ 229 if (((r[SVR4_X86_EFL] ^ tf->tf_eflags) & PSL_USERSTATIC) != 0 || 230 !USERMODE(r[SVR4_X86_CS], r[SVR4_X86_EFL])) 231 return (EINVAL); 232 | 137 r[SVR4_X86_ES] = tf->tf_es; 138 r[SVR4_X86_DS] = tf->tf_ds; 139 r[SVR4_X86_EFL] = tf->tf_eflags; 140 } 141 r[SVR4_X86_EDI] = tf->tf_edi; 142 r[SVR4_X86_ESI] = tf->tf_esi; 143 r[SVR4_X86_EBP] = tf->tf_ebp; 144 r[SVR4_X86_ESP] = tf->tf_esp; --- 85 unchanged lines hidden (view full) --- 230 * protected mode, the CPU will validate the segment registers 231 * automatically and generate a trap on violations. We handle 232 * the trap, rather than doing all of the checking here. 233 */ 234 if (((r[SVR4_X86_EFL] ^ tf->tf_eflags) & PSL_USERSTATIC) != 0 || 235 !USERMODE(r[SVR4_X86_CS], r[SVR4_X86_EFL])) 236 return (EINVAL); 237 |
| 238#if defined(__NetBSD__) |
|
| 233 /* %fs and %gs were restored by the trampoline. */ | 239 /* %fs and %gs were restored by the trampoline. */ |
| 240#else 241 /* %gs was restored by the trampoline. */ 242 tf->tf_fs = r[SVR4_X86_FS]; 243#endif |
|
| 234 tf->tf_es = r[SVR4_X86_ES]; 235 tf->tf_ds = r[SVR4_X86_DS]; 236 tf->tf_eflags = r[SVR4_X86_EFL]; 237 } 238 tf->tf_edi = r[SVR4_X86_EDI]; 239 tf->tf_esi = r[SVR4_X86_ESI]; 240 tf->tf_ebp = r[SVR4_X86_EBP]; 241 tf->tf_ebx = r[SVR4_X86_EBX]; --- 202 unchanged lines hidden (view full) --- 444 tf->tf_esp = (int)fp; 445 tf->tf_ss = GSEL(GUSERLDT_SEL, SEL_UPL); 446#else 447 tf->tf_esp = (int)fp; 448 tf->tf_eip = (int)(((char *)PS_STRINGS) - *(p->p_sysent->sv_szsigcode)); 449 tf->tf_cs = _ucodesel; 450 tf->tf_ds = _udatasel; 451 tf->tf_es = _udatasel; | 244 tf->tf_es = r[SVR4_X86_ES]; 245 tf->tf_ds = r[SVR4_X86_DS]; 246 tf->tf_eflags = r[SVR4_X86_EFL]; 247 } 248 tf->tf_edi = r[SVR4_X86_EDI]; 249 tf->tf_esi = r[SVR4_X86_ESI]; 250 tf->tf_ebp = r[SVR4_X86_EBP]; 251 tf->tf_ebx = r[SVR4_X86_EBX]; --- 202 unchanged lines hidden (view full) --- 454 tf->tf_esp = (int)fp; 455 tf->tf_ss = GSEL(GUSERLDT_SEL, SEL_UPL); 456#else 457 tf->tf_esp = (int)fp; 458 tf->tf_eip = (int)(((char *)PS_STRINGS) - *(p->p_sysent->sv_szsigcode)); 459 tf->tf_cs = _ucodesel; 460 tf->tf_ds = _udatasel; 461 tf->tf_es = _udatasel; |
| 462 tf->tf_fs = _udatasel; |
|
| 452 tf->tf_ss = _udatasel; 453#endif 454} 455 456 457 458int 459svr4_sys_sysarch(p, v) --- 84 unchanged lines hidden --- | 463 tf->tf_ss = _udatasel; 464#endif 465} 466 467 468 469int 470svr4_sys_sysarch(p, v) --- 84 unchanged lines hidden --- |