if_urtw.c (196969) | if_urtw.c (196970) |
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1/*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org> 3 * 4 * Permission to use, copy, modify, and distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org> 3 * 4 * Permission to use, copy, modify, and distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#include <sys/cdefs.h> |
18__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_urtw.c 196969 2009-09-08 13:16:55Z phk $"); | 18__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_urtw.c 196970 2009-09-08 13:19:05Z phk $"); |
19#include <sys/param.h> 20#include <sys/sockio.h> 21#include <sys/sysctl.h> 22#include <sys/lock.h> 23#include <sys/mutex.h> 24#include <sys/mbuf.h> 25#include <sys/kernel.h> 26#include <sys/socket.h> --- 29 unchanged lines hidden (view full) --- 56 57#include <dev/usb/usb.h> 58#include <dev/usb/usbdi.h> 59#include "usbdevs.h" 60 61#include <dev/usb/wlan/if_urtwreg.h> 62#include <dev/usb/wlan/if_urtwvar.h> 63 | 19#include <sys/param.h> 20#include <sys/sockio.h> 21#include <sys/sysctl.h> 22#include <sys/lock.h> 23#include <sys/mutex.h> 24#include <sys/mbuf.h> 25#include <sys/kernel.h> 26#include <sys/socket.h> --- 29 unchanged lines hidden (view full) --- 56 57#include <dev/usb/usb.h> 58#include <dev/usb/usbdi.h> 59#include "usbdevs.h" 60 61#include <dev/usb/wlan/if_urtwreg.h> 62#include <dev/usb/wlan/if_urtwvar.h> 63 |
64#define nitems(a) (sizeof(a) / sizeof((a)[0])) 65 | |
66SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW, 0, "USB Realtek 8187L"); 67#ifdef URTW_DEBUG 68int urtw_debug = 0; 69SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RW, &urtw_debug, 0, 70 "control debugging printfs"); 71TUNABLE_INT("hw.usb.urtw.debug", &urtw_debug); 72enum { 73 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ --- 98 unchanged lines hidden (view full) --- 172 goto fail; \ 173} while (0) 174 175struct urtw_pair { 176 uint32_t reg; 177 uint32_t val; 178}; 179 | 64SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW, 0, "USB Realtek 8187L"); 65#ifdef URTW_DEBUG 66int urtw_debug = 0; 67SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RW, &urtw_debug, 0, 68 "control debugging printfs"); 69TUNABLE_INT("hw.usb.urtw.debug", &urtw_debug); 70enum { 71 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ --- 98 unchanged lines hidden (view full) --- 170 goto fail; \ 171} while (0) 172 173struct urtw_pair { 174 uint32_t reg; 175 uint32_t val; 176}; 177 |
180static const uint8_t urtw_8187b_reg_table[][3] = { 181 { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 }, 182 { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 }, 183 { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 }, 184 { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 }, 185 { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 }, 186 { 0xff, 0x00, 0 }, 187 188 { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 }, { 0x5a, 0x4b, 1 }, 189 { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 }, { 0x61, 0x09, 1 }, 190 { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 }, { 0xce, 0x0f, 1 }, 191 { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 }, { 0xe1, 0x0f, 1 }, 192 { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 }, { 0xf1, 0x01, 1 }, 193 { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 }, { 0xf4, 0x04, 1 }, 194 { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 }, { 0xf7, 0x07, 1 }, 195 { 0xf8, 0x08, 1 }, 196 197 { 0x4e, 0x00, 2 }, { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, 198 { 0x22, 0x68, 2 }, { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, 199 { 0x25, 0x7d, 2 }, { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, 200 { 0x4d, 0x08, 2 }, { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, 201 { 0x52, 0x04, 2 }, { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, 202 { 0x55, 0x23, 2 }, { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, 203 { 0x58, 0x08, 2 }, { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, 204 { 0x5b, 0x08, 2 }, { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, 205 { 0x62, 0x08, 2 }, { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, 206 { 0x72, 0x56, 2 }, { 0x73, 0x9a, 2 }, 207 208 { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 }, { 0x5b, 0x40, 0 }, 209 { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 }, { 0x88, 0x54, 0 }, 210 { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 }, { 0x8d, 0x00, 0 }, 211 { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 }, { 0x96, 0x00, 0 }, 212 { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 }, { 0x9f, 0x10, 0 }, 213 { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 }, { 0xdb, 0x00, 0 }, 214 { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 }, 215 216 { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 }, 217 { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 } 218}; 219 | |
220static uint8_t urtw_8225_agc[] = { 221 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b, 222 0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 223 0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85, 224 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, 225 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 226 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 227 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 228 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 229 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 230 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 231 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 232 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 233}; 234 | 178static uint8_t urtw_8225_agc[] = { 179 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b, 180 0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 181 0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85, 182 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, 183 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 184 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 185 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 186 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 187 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 188 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 189 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 190 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 191}; 192 |
193static uint8_t urtw_8225z2_agc[] = { 194 0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 0x55, 0x53, 0x51, 195 0x4f, 0x4d, 0x4b, 0x49, 0x47, 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 196 0x39, 0x37, 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 0x25, 197 0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x11, 0x0f, 198 0x0d, 0x0b, 0x09, 0x07, 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 199 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x19, 0x19, 200 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x20, 0x21, 0x22, 0x23, 201 0x24, 0x25, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a, 202 0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d, 203 0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31, 204 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 205 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31 206}; 207 |
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235static uint32_t urtw_8225_channel[] = { 236 0x0000, /* dummy channel 0 */ 237 0x085c, /* 1 */ 238 0x08dc, /* 2 */ 239 0x095c, /* 3 */ 240 0x09dc, /* 4 */ 241 0x0a5c, /* 5 */ 242 0x0adc, /* 6 */ --- 16 unchanged lines hidden (view full) --- 259 0x53, 0x60, 0x73, 0xc5, /* -70dbm */ 260 0x63, 0x58, 0x70, 0xc5, /* -66dbm */ 261}; 262 263static struct urtw_pair urtw_8225_rf_part1[] = { 264 { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 265 { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a }, 266 { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 }, | 208static uint32_t urtw_8225_channel[] = { 209 0x0000, /* dummy channel 0 */ 210 0x085c, /* 1 */ 211 0x08dc, /* 2 */ 212 0x095c, /* 3 */ 213 0x09dc, /* 4 */ 214 0x0a5c, /* 5 */ 215 0x0adc, /* 6 */ --- 16 unchanged lines hidden (view full) --- 232 0x53, 0x60, 0x73, 0xc5, /* -70dbm */ 233 0x63, 0x58, 0x70, 0xc5, /* -66dbm */ 234}; 235 236static struct urtw_pair urtw_8225_rf_part1[] = { 237 { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 238 { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a }, 239 { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 }, |
267 { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 } | 240 { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 }, |
268}; 269 270static struct urtw_pair urtw_8225_rf_part2[] = { 271 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 272 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 273 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 }, 274 { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 }, 275 { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 }, --- 25 unchanged lines hidden (view full) --- 301 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 302 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 303 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 304 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3, 305 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb 306}; 307 308static uint8_t urtw_8225_threshold[] = { | 241}; 242 243static struct urtw_pair urtw_8225_rf_part2[] = { 244 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 245 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 246 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 }, 247 { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 }, 248 { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 }, --- 25 unchanged lines hidden (view full) --- 274 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 275 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 276 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 277 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3, 278 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb 279}; 280 281static uint8_t urtw_8225_threshold[] = { |
309 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd | 282 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd, |
310}; 311 312static uint8_t urtw_8225_tx_gain_cck_ofdm[] = { 313 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e 314}; 315 316static uint8_t urtw_8225_txpwr_cck[] = { 317 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02, --- 8 unchanged lines hidden (view full) --- 326 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00, 327 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00, 328 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00, 329 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00, 330 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00, 331 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00 332}; 333 | 283}; 284 285static uint8_t urtw_8225_tx_gain_cck_ofdm[] = { 286 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e 287}; 288 289static uint8_t urtw_8225_txpwr_cck[] = { 290 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02, --- 8 unchanged lines hidden (view full) --- 299 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00, 300 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00, 301 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00, 302 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00, 303 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00, 304 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00 305}; 306 |
334static uint8_t urtw_8225_txpwr_ofdm[] = { | 307static uint8_t urtw_8225_txpwr_ofdm[]={ |
335 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4 336}; 337 | 308 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4 309}; 310 |
338static uint8_t urtw_8225z2_agc[] = { 339 0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 340 0x55, 0x53, 0x51, 0x4f, 0x4d, 0x4b, 0x49, 0x47, 341 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 0x39, 0x37, 342 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 343 0x25, 0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 344 0x15, 0x13, 0x11, 0x0f, 0x0d, 0x0b, 0x09, 0x07, 345 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 346 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 347 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 348 0x19, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 349 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a, 350 0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 351 0x2d, 0x2d, 0x2d, 0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 352 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31, 0x31, 0x31, 353 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 354 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31 355}; 356 | |
357static uint8_t urtw_8225v2_gain_bg[]={ 358 0x23, 0x15, 0xa5, /* -82-1dbm */ 359 0x23, 0x15, 0xb5, /* -82-2dbm */ 360 0x23, 0x15, 0xc5, /* -82-3dbm */ 361 0x33, 0x15, 0xc5, /* -78dbm */ 362 0x43, 0x15, 0xc5, /* -74dbm */ 363 0x53, 0x15, 0xc5, /* -70dbm */ 364 0x63, 0x15, 0xc5, /* -66dbm */ --- 86 unchanged lines hidden (view full) --- 451}; 452 453static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = { 454 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 455 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 456 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 457 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 458 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, | 311static uint8_t urtw_8225v2_gain_bg[]={ 312 0x23, 0x15, 0xa5, /* -82-1dbm */ 313 0x23, 0x15, 0xb5, /* -82-2dbm */ 314 0x23, 0x15, 0xc5, /* -82-3dbm */ 315 0x33, 0x15, 0xc5, /* -78dbm */ 316 0x43, 0x15, 0xc5, /* -74dbm */ 317 0x53, 0x15, 0xc5, /* -70dbm */ 318 0x63, 0x15, 0xc5, /* -66dbm */ --- 86 unchanged lines hidden (view full) --- 405}; 406 407static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = { 408 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 409 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 410 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 411 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 412 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, |
459 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23 | 413 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, |
460}; 461 | 414}; 415 |
416static uint8_t urtw_8225v2_txpwr_cck[] = { 417 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04 418}; 419 |
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462static uint8_t urtw_8225v2_txpwr_cck_ch14[] = { 463 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00 464}; 465 466static uint8_t urtw_8225v2b_txpwr_cck[] = { 467 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04, 468 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03, 469 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03, 470 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03 471}; 472 | 420static uint8_t urtw_8225v2_txpwr_cck_ch14[] = { 421 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00 422}; 423 424static uint8_t urtw_8225v2b_txpwr_cck[] = { 425 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04, 426 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03, 427 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03, 428 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03 429}; 430 |
473static uint8_t urtw_8225v2_txpwr_cck[] = { 474 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04 475}; 476 | |
477static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = { 478 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00, 479 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 480 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 481 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00 482}; 483 484static struct urtw_pair urtw_ratetable[] = { 485 { 2, 0 }, { 4, 1 }, { 11, 2 }, { 12, 4 }, { 18, 5 }, 486 { 22, 3 }, { 24, 6 }, { 36, 7 }, { 48, 8 }, { 72, 9 }, 487 { 96, 10 }, { 108, 11 } 488}; 489 | 431static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = { 432 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00, 433 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 434 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 435 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00 436}; 437 438static struct urtw_pair urtw_ratetable[] = { 439 { 2, 0 }, { 4, 1 }, { 11, 2 }, { 12, 4 }, { 18, 5 }, 440 { 22, 3 }, { 24, 6 }, { 36, 7 }, { 48, 8 }, { 72, 9 }, 441 { 96, 10 }, { 108, 11 } 442}; 443 |
444static const uint8_t urtw_8187b_reg_table[][3] = { 445 { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 }, 446 { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 }, 447 { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 }, 448 { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 }, 449 { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 }, 450 { 0xff, 0x00, 0 }, { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 }, 451 { 0x5a, 0x4b, 1 }, { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 }, 452 { 0x61, 0x09, 1 }, { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 }, 453 { 0xce, 0x0f, 1 }, { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 }, 454 { 0xe1, 0x0f, 1 }, { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 }, 455 { 0xf1, 0x01, 1 }, { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 }, 456 { 0xf4, 0x04, 1 }, { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 }, 457 { 0xf7, 0x07, 1 }, { 0xf8, 0x08, 1 }, { 0x4e, 0x00, 2 }, 458 { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, { 0x22, 0x68, 2 }, 459 { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, { 0x25, 0x7d, 2 }, 460 { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, { 0x4d, 0x08, 2 }, 461 { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, { 0x52, 0x04, 2 }, 462 { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, { 0x55, 0x23, 2 }, 463 { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, { 0x58, 0x08, 2 }, 464 { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, { 0x5b, 0x08, 2 }, 465 { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, { 0x62, 0x08, 2 }, 466 { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, { 0x72, 0x56, 2 }, 467 { 0x73, 0x9a, 2 }, { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 }, 468 { 0x5b, 0x40, 0 }, { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 }, 469 { 0x88, 0x54, 0 }, { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 }, 470 { 0x8d, 0x00, 0 }, { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 }, 471 { 0x96, 0x00, 0 }, { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 }, 472 { 0x9f, 0x10, 0 }, { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 }, 473 { 0xdb, 0x00, 0 }, { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 }, 474 { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 }, 475 { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 } 476}; 477 |
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490static usb_callback_t urtw_bulk_rx_callback; 491static usb_callback_t urtw_bulk_tx_callback; 492 493static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = { 494 [URTW_8187B_BULK_RX] = { 495 .type = UE_BULK, 496 .endpoint = 0x83, 497 .direction = UE_DIR_IN, --- 543 unchanged lines hidden (view full) --- 1041 URTW_LOCK(sc); 1042 urtw_init_locked(arg); 1043 URTW_UNLOCK(sc); 1044} 1045 1046static usb_error_t 1047urtw_adapter_start_b(struct urtw_softc *sc) 1048{ | 478static usb_callback_t urtw_bulk_rx_callback; 479static usb_callback_t urtw_bulk_tx_callback; 480 481static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = { 482 [URTW_8187B_BULK_RX] = { 483 .type = UE_BULK, 484 .endpoint = 0x83, 485 .direction = UE_DIR_IN, --- 543 unchanged lines hidden (view full) --- 1029 URTW_LOCK(sc); 1030 urtw_init_locked(arg); 1031 URTW_UNLOCK(sc); 1032} 1033 1034static usb_error_t 1035urtw_adapter_start_b(struct urtw_softc *sc) 1036{ |
1037#define N(a) (sizeof(a) / sizeof((a)[0])) |
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1049 int i; 1050 uint8_t data8; 1051 usb_error_t error; 1052 1053 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1054 if (error) 1055 goto fail; 1056 --- 47 unchanged lines hidden (view full) --- 1104 goto fail; 1105 urtw_read8_m(sc, URTW_CONFIG1, &data8); 1106 urtw_write8_m(sc, URTW_CONFIG1, (data8 & 0x3f) | 0x80); 1107 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1108 if (error) 1109 goto fail; 1110 1111 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); | 1038 int i; 1039 uint8_t data8; 1040 usb_error_t error; 1041 1042 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1043 if (error) 1044 goto fail; 1045 --- 47 unchanged lines hidden (view full) --- 1093 goto fail; 1094 urtw_read8_m(sc, URTW_CONFIG1, &data8); 1095 urtw_write8_m(sc, URTW_CONFIG1, (data8 & 0x3f) | 0x80); 1096 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1097 if (error) 1098 goto fail; 1099 1100 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); |
1112 for (i = 0; i < nitems(urtw_8187b_reg_table); i++) { | 1101 for (i = 0; i < N(urtw_8187b_reg_table); i++) { |
1113 error = urtw_write8_i(sc, urtw_8187b_reg_table[i][0], 1114 urtw_8187b_reg_table[i][1], urtw_8187b_reg_table[i][2]); 1115 if (error) 1116 goto fail; 1117 } 1118 1119 urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50); 1120 urtw_write16_m(sc, URTW_INT_MIG, 0); --- 93 unchanged lines hidden (view full) --- 1214 urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321B); 1215 1216 error = urtw_write16_i(sc, 0xec, 0x800, 1); 1217 if (error) 1218 goto fail; 1219 1220fail: 1221 return (error); | 1102 error = urtw_write8_i(sc, urtw_8187b_reg_table[i][0], 1103 urtw_8187b_reg_table[i][1], urtw_8187b_reg_table[i][2]); 1104 if (error) 1105 goto fail; 1106 } 1107 1108 urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50); 1109 urtw_write16_m(sc, URTW_INT_MIG, 0); --- 93 unchanged lines hidden (view full) --- 1203 urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321B); 1204 1205 error = urtw_write16_i(sc, 0xec, 0x800, 1); 1206 if (error) 1207 goto fail; 1208 1209fail: 1210 return (error); |
1211#undef N |
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1222} 1223 1224static usb_error_t 1225urtw_adapter_start(struct urtw_softc *sc) 1226{ 1227 usb_error_t error; 1228 1229 error = urtw_reset(sc); --- 48 unchanged lines hidden (view full) --- 1278 error = urtw_intr_enable(sc); 1279 if (error != 0) 1280 goto fail; 1281 1282fail: 1283 return (error); 1284} 1285 | 1212} 1213 1214static usb_error_t 1215urtw_adapter_start(struct urtw_softc *sc) 1216{ 1217 usb_error_t error; 1218 1219 error = urtw_reset(sc); --- 48 unchanged lines hidden (view full) --- 1268 error = urtw_intr_enable(sc); 1269 if (error != 0) 1270 goto fail; 1271 1272fail: 1273 return (error); 1274} 1275 |
1276static usb_error_t 1277urtw_set_mode(struct urtw_softc *sc, uint32_t mode) 1278{ 1279 uint8_t data; 1280 usb_error_t error; |
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1286 | 1281 |
1282 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 1283 data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT); 1284 data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK); 1285 urtw_write8_m(sc, URTW_EPROM_CMD, data); 1286fail: 1287 return (error); 1288} 1289 |
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1287static usb_error_t 1288urtw_8187b_cmd_reset(struct urtw_softc *sc) 1289{ 1290 int i; 1291 uint8_t data8; 1292 usb_error_t error; 1293 1294 /* XXX the code can be duplicate with urtw_reset(). */ --- 92 unchanged lines hidden (view full) --- 1387 USETW(req.wValue, val | 0xff00); 1388 USETW(req.wIndex, idx & 0x3); 1389 USETW(req.wLength, sizeof(uint32_t)); 1390 1391 return (urtw_do_request(sc, &req, &data)); 1392} 1393 1394static void | 1290static usb_error_t 1291urtw_8187b_cmd_reset(struct urtw_softc *sc) 1292{ 1293 int i; 1294 uint8_t data8; 1295 usb_error_t error; 1296 1297 /* XXX the code can be duplicate with urtw_reset(). */ --- 92 unchanged lines hidden (view full) --- 1390 USETW(req.wValue, val | 0xff00); 1391 USETW(req.wIndex, idx & 0x3); 1392 USETW(req.wLength, sizeof(uint32_t)); 1393 1394 return (urtw_do_request(sc, &req, &data)); 1395} 1396 1397static void |
1398urtw_stop_locked(struct ifnet *ifp, int disable) 1399{ 1400 struct urtw_softc *sc = ifp->if_softc; 1401 uint8_t data8; 1402 usb_error_t error; 1403 1404 (void)disable; 1405 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1406 1407 error = urtw_intr_disable(sc); 1408 if (error) 1409 goto fail; 1410 urtw_read8_m(sc, URTW_CMD, &data8); 1411 data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1412 urtw_write8_m(sc, URTW_CMD, data8); 1413 1414 error = sc->sc_rf_stop(sc); 1415 if (error != 0) 1416 goto fail; 1417 1418 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1419 if (error) 1420 goto fail; 1421 urtw_read8_m(sc, URTW_CONFIG4, &data8); 1422 urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF); 1423 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1424 if (error) 1425 goto fail; 1426fail: 1427 if (error) 1428 device_printf(sc->sc_dev, "failed to stop (%s)\n", 1429 usbd_errstr(error)); 1430 1431 usb_callout_stop(&sc->sc_led_ch); 1432 callout_stop(&sc->sc_watchdog_ch); 1433 1434 urtw_abort_xfers(sc); 1435} 1436 1437static void 1438urtw_stop(struct ifnet *ifp, int disable) 1439{ 1440 struct urtw_softc *sc = ifp->if_softc; 1441 1442 URTW_LOCK(sc); 1443 urtw_stop_locked(ifp, disable); 1444 URTW_UNLOCK(sc); 1445} 1446 1447static void |
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1395urtw_abort_xfers(struct urtw_softc *sc) 1396{ 1397 int i, max; 1398 1399 URTW_ASSERT_LOCKED(sc); 1400 1401 max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS : 1402 URTW_8187L_N_XFERS; --- 488 unchanged lines hidden (view full) --- 1891 1892 /* 1893 * XXX don't know how to set a device. Lack of docs. Just try to set 1894 * IFF_ALLMULTI flag here. 1895 */ 1896 ifp->if_flags |= IFF_ALLMULTI; 1897} 1898 | 1448urtw_abort_xfers(struct urtw_softc *sc) 1449{ 1450 int i, max; 1451 1452 URTW_ASSERT_LOCKED(sc); 1453 1454 max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS : 1455 URTW_8187L_N_XFERS; --- 488 unchanged lines hidden (view full) --- 1944 1945 /* 1946 * XXX don't know how to set a device. Lack of docs. Just try to set 1947 * IFF_ALLMULTI flag here. 1948 */ 1949 ifp->if_flags |= IFF_ALLMULTI; 1950} 1951 |
1899 | |
1900static usb_error_t | 1952static usb_error_t |
1901urtw_get_macaddr(struct urtw_softc *sc) | 1953urtw_set_rate(struct urtw_softc *sc) |
1902{ | 1954{ |
1903 uint32_t data; | 1955 int i, basic_rate, min_rr_rate, max_rr_rate; 1956 uint16_t data; |
1904 usb_error_t error; 1905 | 1957 usb_error_t error; 1958 |
1906 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data); 1907 if (error != 0) 1908 goto fail; 1909 sc->sc_bssid[0] = data & 0xff; 1910 sc->sc_bssid[1] = (data & 0xff00) >> 8; 1911 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data); 1912 if (error != 0) 1913 goto fail; 1914 sc->sc_bssid[2] = data & 0xff; 1915 sc->sc_bssid[3] = (data & 0xff00) >> 8; 1916 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data); 1917 if (error != 0) 1918 goto fail; 1919 sc->sc_bssid[4] = data & 0xff; 1920 sc->sc_bssid[5] = (data & 0xff00) >> 8; 1921fail: 1922 return (error); 1923} | 1959 basic_rate = urtw_rate2rtl(48); 1960 min_rr_rate = urtw_rate2rtl(12); 1961 max_rr_rate = urtw_rate2rtl(48); |
1924 | 1962 |
1925static usb_error_t 1926urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data) 1927{ 1928#define URTW_READCMD_LEN 3 1929 int addrlen, i; 1930 int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 }; 1931 usb_error_t error; | 1963 urtw_write8_m(sc, URTW_RESP_RATE, 1964 max_rr_rate << URTW_RESP_MAX_RATE_SHIFT | 1965 min_rr_rate << URTW_RESP_MIN_RATE_SHIFT); |
1932 | 1966 |
1933 /* NB: make sure the buffer is initialized */ 1934 *data = 0; | 1967 urtw_read16_m(sc, URTW_BRSR, &data); 1968 data &= ~URTW_BRSR_MBR_8185; |
1935 | 1969 |
1936 /* enable EPROM programming */ 1937 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE); 1938 DELAY(URTW_EPROM_DELAY); | 1970 for (i = 0; i <= basic_rate; i++) 1971 data |= (1 << i); |
1939 | 1972 |
1940 error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE); 1941 if (error != 0) 1942 goto fail; 1943 error = urtw_eprom_ck(sc); 1944 if (error != 0) 1945 goto fail; 1946 error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN); 1947 if (error != 0) 1948 goto fail; 1949 if (sc->sc_epromtype == URTW_EEPROM_93C56) { 1950 addrlen = 8; 1951 addrstr[0] = addr & (1 << 7); 1952 addrstr[1] = addr & (1 << 6); 1953 addrstr[2] = addr & (1 << 5); 1954 addrstr[3] = addr & (1 << 4); 1955 addrstr[4] = addr & (1 << 3); 1956 addrstr[5] = addr & (1 << 2); 1957 addrstr[6] = addr & (1 << 1); 1958 addrstr[7] = addr & (1 << 0); 1959 } else { 1960 addrlen=6; 1961 addrstr[0] = addr & (1 << 5); 1962 addrstr[1] = addr & (1 << 4); 1963 addrstr[2] = addr & (1 << 3); 1964 addrstr[3] = addr & (1 << 2); 1965 addrstr[4] = addr & (1 << 1); 1966 addrstr[5] = addr & (1 << 0); 1967 } 1968 error = urtw_eprom_sendbits(sc, addrstr, addrlen); 1969 if (error != 0) 1970 goto fail; 1971 1972 error = urtw_eprom_writebit(sc, 0); 1973 if (error != 0) 1974 goto fail; 1975 1976 for (i = 0; i < 16; i++) { 1977 error = urtw_eprom_ck(sc); 1978 if (error != 0) 1979 goto fail; 1980 error = urtw_eprom_readbit(sc, &data16); 1981 if (error != 0) 1982 goto fail; 1983 1984 (*data) |= (data16 << (15 - i)); 1985 } 1986 1987 error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE); 1988 if (error != 0) 1989 goto fail; 1990 error = urtw_eprom_ck(sc); 1991 if (error != 0) 1992 goto fail; 1993 1994 /* now disable EPROM programming */ 1995 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE); | 1973 urtw_write16_m(sc, URTW_BRSR, data); |
1996fail: 1997 return (error); | 1974fail: 1975 return (error); |
1998#undef URTW_READCMD_LEN | |
1999} 2000 | 1976} 1977 |
2001static usb_error_t 2002urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data) | 1978static uint16_t 1979urtw_rate2rtl(int rate) |
2003{ | 1980{ |
2004 uint8_t data8; 2005 usb_error_t error; | 1981#define N(a) (sizeof(a) / sizeof((a)[0])) 1982 int i; |
2006 | 1983 |
2007 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 2008 *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0; 2009 DELAY(URTW_EPROM_DELAY); | 1984 for (i = 0; i < N(urtw_ratetable); i++) { 1985 if (rate == urtw_ratetable[i].reg) 1986 return urtw_ratetable[i].val; 1987 } |
2010 | 1988 |
2011fail: 2012 return (error); | 1989 return (3); 1990#undef N |
2013} 2014 | 1991} 1992 |
2015static usb_error_t 2016urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen) | 1993static uint16_t 1994urtw_rtl2rate(int rate) |
2017{ | 1995{ |
2018 int i = 0; 2019 usb_error_t error = 0; | 1996#define N(a) (sizeof(a) / sizeof((a)[0])) 1997 int i; |
2020 | 1998 |
2021 for (i = 0; i < buflen; i++) { 2022 error = urtw_eprom_writebit(sc, buf[i]); 2023 if (error != 0) 2024 goto fail; 2025 error = urtw_eprom_ck(sc); 2026 if (error != 0) 2027 goto fail; | 1999 for (i = 0; i < N(urtw_ratetable); i++) { 2000 if (rate == urtw_ratetable[i].val) 2001 return urtw_ratetable[i].reg; |
2028 } | 2002 } |
2029fail: 2030 return (error); 2031} | |
2032 | 2003 |
2033static usb_error_t 2034urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit) 2035{ 2036 uint8_t data; 2037 usb_error_t error; 2038 2039 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2040 if (bit != 0) 2041 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT); 2042 else 2043 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT); 2044 DELAY(URTW_EPROM_DELAY); 2045fail: 2046 return (error); | 2004 return (0); 2005#undef N |
2047} 2048 2049static usb_error_t | 2006} 2007 2008static usb_error_t |
2050urtw_eprom_ck(struct urtw_softc *sc) | 2009urtw_update_msr(struct urtw_softc *sc) |
2051{ | 2010{ |
2011 struct ifnet *ifp = sc->sc_ifp; 2012 struct ieee80211com *ic = ifp->if_l2com; |
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2052 uint8_t data; 2053 usb_error_t error; 2054 | 2013 uint8_t data; 2014 usb_error_t error; 2015 |
2055 /* masking */ 2056 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2057 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK); 2058 DELAY(URTW_EPROM_DELAY); 2059 /* unmasking */ 2060 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2061 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK); 2062 DELAY(URTW_EPROM_DELAY); 2063fail: 2064 return (error); 2065} | 2016 urtw_read8_m(sc, URTW_MSR, &data); 2017 data &= ~URTW_MSR_LINK_MASK; |
2066 | 2018 |
2019 if (sc->sc_state == IEEE80211_S_RUN) { 2020 switch (ic->ic_opmode) { 2021 case IEEE80211_M_STA: 2022 case IEEE80211_M_MONITOR: 2023 data |= URTW_MSR_LINK_STA; 2024 if (sc->sc_flags & URTW_RTL8187B) 2025 data |= URTW_MSR_LINK_ENEDCA; 2026 break; 2027 case IEEE80211_M_IBSS: 2028 data |= URTW_MSR_LINK_ADHOC; 2029 break; 2030 case IEEE80211_M_HOSTAP: 2031 data |= URTW_MSR_LINK_HOSTAP; 2032 break; 2033 default: 2034 panic("unsupported operation mode 0x%x\n", 2035 ic->ic_opmode); 2036 /* never reach */ 2037 } 2038 } else 2039 data |= URTW_MSR_LINK_NONE; |
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2067 | 2040 |
2068static usb_error_t 2069urtw_eprom_cs(struct urtw_softc *sc, int able) 2070{ 2071 uint8_t data; 2072 usb_error_t error; 2073 2074 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2075 if (able == URTW_EPROM_ENABLE) 2076 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS); 2077 else 2078 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS); 2079 DELAY(URTW_EPROM_DELAY); | 2041 urtw_write8_m(sc, URTW_MSR, data); |
2080fail: 2081 return (error); 2082} 2083 | 2042fail: 2043 return (error); 2044} 2045 |
2084 2085 | |
2086static usb_error_t 2087urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data) 2088{ 2089 struct usb_device_request req; 2090 usb_error_t error; 2091 2092 URTW_ASSERT_LOCKED(sc); 2093 2094 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2095 req.bRequest = URTW_8187_GETREGS_REQ; 2096 USETW(req.wValue, val | 0xff00); 2097 USETW(req.wIndex, 0); 2098 USETW(req.wLength, sizeof(uint8_t)); 2099 2100 error = urtw_do_request(sc, &req, data); 2101 return (error); 2102} 2103 2104static usb_error_t | 2046static usb_error_t 2047urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data) 2048{ 2049 struct usb_device_request req; 2050 usb_error_t error; 2051 2052 URTW_ASSERT_LOCKED(sc); 2053 2054 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2055 req.bRequest = URTW_8187_GETREGS_REQ; 2056 USETW(req.wValue, val | 0xff00); 2057 USETW(req.wIndex, 0); 2058 USETW(req.wLength, sizeof(uint8_t)); 2059 2060 error = urtw_do_request(sc, &req, data); 2061 return (error); 2062} 2063 2064static usb_error_t |
2105urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data) 2106{ 2107 struct usb_device_request req; 2108 usb_error_t error; 2109 2110 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2111 req.bRequest = URTW_8187_GETREGS_REQ; 2112 USETW(req.wValue, val | 0xfe00); 2113 USETW(req.wIndex, 0); 2114 USETW(req.wLength, sizeof(uint8_t)); 2115 2116 error = urtw_do_request(sc, &req, data); 2117 return (error); 2118} 2119 2120static usb_error_t | |
2121urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data) 2122{ 2123 struct usb_device_request req; 2124 usb_error_t error; 2125 2126 URTW_ASSERT_LOCKED(sc); 2127 2128 req.bmRequestType = UT_READ_VENDOR_DEVICE; --- 36 unchanged lines hidden (view full) --- 2165 USETW(req.wValue, val | 0xff00); 2166 USETW(req.wIndex, 0); 2167 USETW(req.wLength, sizeof(uint8_t)); 2168 2169 return (urtw_do_request(sc, &req, &data)); 2170} 2171 2172static usb_error_t | 2065urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data) 2066{ 2067 struct usb_device_request req; 2068 usb_error_t error; 2069 2070 URTW_ASSERT_LOCKED(sc); 2071 2072 req.bmRequestType = UT_READ_VENDOR_DEVICE; --- 36 unchanged lines hidden (view full) --- 2109 USETW(req.wValue, val | 0xff00); 2110 USETW(req.wIndex, 0); 2111 USETW(req.wLength, sizeof(uint8_t)); 2112 2113 return (urtw_do_request(sc, &req, &data)); 2114} 2115 2116static usb_error_t |
2173urtw_write8e(struct urtw_softc *sc, int val, uint8_t data) 2174{ 2175 struct usb_device_request req; 2176 2177 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2178 req.bRequest = URTW_8187_SETREGS_REQ; 2179 USETW(req.wValue, val | 0xfe00); 2180 USETW(req.wIndex, 0); 2181 USETW(req.wLength, sizeof(uint8_t)); 2182 2183 return (urtw_do_request(sc, &req, &data)); 2184} 2185 2186static usb_error_t | |
2187urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data) 2188{ 2189 struct usb_device_request req; 2190 2191 URTW_ASSERT_LOCKED(sc); 2192 2193 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2194 req.bRequest = URTW_8187_SETREGS_REQ; --- 16 unchanged lines hidden (view full) --- 2211 USETW(req.wValue, val | 0xff00); 2212 USETW(req.wIndex, 0); 2213 USETW(req.wLength, sizeof(uint32_t)); 2214 2215 return (urtw_do_request(sc, &req, &data)); 2216} 2217 2218static usb_error_t | 2117urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data) 2118{ 2119 struct usb_device_request req; 2120 2121 URTW_ASSERT_LOCKED(sc); 2122 2123 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2124 req.bRequest = URTW_8187_SETREGS_REQ; --- 16 unchanged lines hidden (view full) --- 2141 USETW(req.wValue, val | 0xff00); 2142 USETW(req.wIndex, 0); 2143 USETW(req.wLength, sizeof(uint32_t)); 2144 2145 return (urtw_do_request(sc, &req, &data)); 2146} 2147 2148static usb_error_t |
2219urtw_set_mode(struct urtw_softc *sc, uint32_t mode) | 2149urtw_get_macaddr(struct urtw_softc *sc) |
2220{ | 2150{ |
2221 uint8_t data; | 2151 uint32_t data; |
2222 usb_error_t error; 2223 | 2152 usb_error_t error; 2153 |
2224 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2225 data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT); 2226 data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK); 2227 urtw_write8_m(sc, URTW_EPROM_CMD, data); 2228fail: 2229 return (error); 2230} 2231 2232static usb_error_t 2233urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val) 2234{ 2235 uint8_t data; 2236 usb_error_t error; 2237 2238 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2239 if (error) | 2154 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data); 2155 if (error != 0) |
2240 goto fail; | 2156 goto fail; |
2241 2242 urtw_read8_m(sc, URTW_CONFIG3, &data); 2243 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 2244 urtw_write32_m(sc, URTW_ANAPARAM, val); 2245 urtw_read8_m(sc, URTW_CONFIG3, &data); 2246 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 2247 2248 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2249 if (error) | 2157 sc->sc_bssid[0] = data & 0xff; 2158 sc->sc_bssid[1] = (data & 0xff00) >> 8; 2159 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data); 2160 if (error != 0) |
2250 goto fail; | 2161 goto fail; |
2251fail: 2252 return (error); 2253} 2254 2255static usb_error_t 2256urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val) 2257{ 2258 uint8_t data; 2259 usb_error_t error; 2260 2261 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2262 if (error) | 2162 sc->sc_bssid[2] = data & 0xff; 2163 sc->sc_bssid[3] = (data & 0xff00) >> 8; 2164 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data); 2165 if (error != 0) |
2263 goto fail; | 2166 goto fail; |
2264 2265 urtw_read8_m(sc, URTW_CONFIG3, &data); 2266 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 2267 urtw_write32_m(sc, URTW_ANAPARAM2, val); 2268 urtw_read8_m(sc, URTW_CONFIG3, &data); 2269 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 2270 2271 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2272 if (error) 2273 goto fail; | 2167 sc->sc_bssid[4] = data & 0xff; 2168 sc->sc_bssid[5] = (data & 0xff00) >> 8; |
2274fail: 2275 return (error); 2276} 2277 | 2169fail: 2170 return (error); 2171} 2172 |
2278 | |
2279static usb_error_t | 2173static usb_error_t |
2280urtw_intr_disable(struct urtw_softc *sc) | 2174urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data) |
2281{ | 2175{ |
2176#define URTW_READCMD_LEN 3 2177 int addrlen, i; 2178 int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 }; |
|
2282 usb_error_t error; 2283 | 2179 usb_error_t error; 2180 |
2284 urtw_write16_m(sc, URTW_INTR_MASK, 0); 2285fail: 2286 return (error); 2287} | 2181 /* NB: make sure the buffer is initialized */ 2182 *data = 0; |
2288 | 2183 |
2289static usb_error_t 2290urtw_reset(struct urtw_softc *sc) 2291{ 2292 uint8_t data; 2293 usb_error_t error; | 2184 /* enable EPROM programming */ 2185 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE); 2186 DELAY(URTW_EPROM_DELAY); |
2294 | 2187 |
2295 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2296 if (error) | 2188 error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE); 2189 if (error != 0) |
2297 goto fail; | 2190 goto fail; |
2298 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2299 if (error) | 2191 error = urtw_eprom_ck(sc); 2192 if (error != 0) |
2300 goto fail; | 2193 goto fail; |
2301 2302 error = urtw_intr_disable(sc); 2303 if (error) 2304 goto fail; 2305 usb_pause_mtx(&sc->sc_mtx, 100); 2306 2307 error = urtw_write8e(sc, 0x18, 0x10); | 2194 error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN); |
2308 if (error != 0) 2309 goto fail; | 2195 if (error != 0) 2196 goto fail; |
2310 error = urtw_write8e(sc, 0x18, 0x11); | 2197 if (sc->sc_epromtype == URTW_EEPROM_93C56) { 2198 addrlen = 8; 2199 addrstr[0] = addr & (1 << 7); 2200 addrstr[1] = addr & (1 << 6); 2201 addrstr[2] = addr & (1 << 5); 2202 addrstr[3] = addr & (1 << 4); 2203 addrstr[4] = addr & (1 << 3); 2204 addrstr[5] = addr & (1 << 2); 2205 addrstr[6] = addr & (1 << 1); 2206 addrstr[7] = addr & (1 << 0); 2207 } else { 2208 addrlen=6; 2209 addrstr[0] = addr & (1 << 5); 2210 addrstr[1] = addr & (1 << 4); 2211 addrstr[2] = addr & (1 << 3); 2212 addrstr[3] = addr & (1 << 2); 2213 addrstr[4] = addr & (1 << 1); 2214 addrstr[5] = addr & (1 << 0); 2215 } 2216 error = urtw_eprom_sendbits(sc, addrstr, addrlen); |
2311 if (error != 0) 2312 goto fail; | 2217 if (error != 0) 2218 goto fail; |
2313 error = urtw_write8e(sc, 0x18, 0x00); | 2219 2220 error = urtw_eprom_writebit(sc, 0); |
2314 if (error != 0) 2315 goto fail; | 2221 if (error != 0) 2222 goto fail; |
2316 usb_pause_mtx(&sc->sc_mtx, 100); | |
2317 | 2223 |
2318 urtw_read8_m(sc, URTW_CMD, &data); 2319 data = (data & 0x2) | URTW_CMD_RST; 2320 urtw_write8_m(sc, URTW_CMD, data); 2321 usb_pause_mtx(&sc->sc_mtx, 100); | 2224 for (i = 0; i < 16; i++) { 2225 error = urtw_eprom_ck(sc); 2226 if (error != 0) 2227 goto fail; 2228 error = urtw_eprom_readbit(sc, &data16); 2229 if (error != 0) 2230 goto fail; |
2322 | 2231 |
2323 urtw_read8_m(sc, URTW_CMD, &data); 2324 if (data & URTW_CMD_RST) { 2325 device_printf(sc->sc_dev, "reset timeout\n"); 2326 goto fail; | 2232 (*data) |= (data16 << (15 - i)); |
2327 } 2328 | 2233 } 2234 |
2329 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 2330 if (error) | 2235 error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE); 2236 if (error != 0) |
2331 goto fail; | 2237 goto fail; |
2332 usb_pause_mtx(&sc->sc_mtx, 100); 2333 2334 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2335 if (error) | 2238 error = urtw_eprom_ck(sc); 2239 if (error != 0) |
2336 goto fail; | 2240 goto fail; |
2337 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2338 if (error) 2339 goto fail; 2340fail: 2341 return (error); 2342} | |
2343 | 2241 |
2344static usb_error_t 2345urtw_led_on(struct urtw_softc *sc, int type) 2346{ 2347 usb_error_t error; 2348 2349 if (type == URTW_LED_GPIO) { 2350 switch (sc->sc_gpio_ledpin) { 2351 case URTW_LED_PIN_GPIO0: 2352 urtw_write8_m(sc, URTW_GPIO, 0x01); 2353 urtw_write8_m(sc, URTW_GP_ENABLE, 0x00); 2354 break; 2355 default: 2356 panic("unsupported LED PIN type 0x%x", 2357 sc->sc_gpio_ledpin); 2358 /* never reach */ 2359 } 2360 } else { 2361 panic("unsupported LED type 0x%x", type); 2362 /* never reach */ 2363 } 2364 2365 sc->sc_gpio_ledon = 1; | 2242 /* now disable EPROM programming */ 2243 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE); |
2366fail: 2367 return (error); | 2244fail: 2245 return (error); |
2246#undef URTW_READCMD_LEN |
|
2368} 2369 2370static usb_error_t | 2247} 2248 2249static usb_error_t |
2371urtw_led_off(struct urtw_softc *sc, int type) | 2250urtw_eprom_cs(struct urtw_softc *sc, int able) |
2372{ | 2251{ |
2252 uint8_t data; |
|
2373 usb_error_t error; 2374 | 2253 usb_error_t error; 2254 |
2375 if (type == URTW_LED_GPIO) { 2376 switch (sc->sc_gpio_ledpin) { 2377 case URTW_LED_PIN_GPIO0: 2378 urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1); 2379 urtw_write8_m(sc, 2380 URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1); 2381 break; 2382 default: 2383 panic("unsupported LED PIN type 0x%x", 2384 sc->sc_gpio_ledpin); 2385 /* never reach */ 2386 } 2387 } else { 2388 panic("unsupported LED type 0x%x", type); 2389 /* never reach */ 2390 } 2391 2392 sc->sc_gpio_ledon = 0; 2393 | 2255 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2256 if (able == URTW_EPROM_ENABLE) 2257 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS); 2258 else 2259 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS); 2260 DELAY(URTW_EPROM_DELAY); |
2394fail: 2395 return (error); 2396} 2397 | 2261fail: 2262 return (error); 2263} 2264 |
2398 | |
2399static usb_error_t | 2265static usb_error_t |
2400urtw_led_mode0(struct urtw_softc *sc, int mode) | 2266urtw_eprom_ck(struct urtw_softc *sc) |
2401{ | 2267{ |
2402 2403 switch (mode) { 2404 case URTW_LED_CTL_POWER_ON: 2405 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK; 2406 break; 2407 case URTW_LED_CTL_TX: 2408 if (sc->sc_gpio_ledinprogress == 1) 2409 return (0); 2410 2411 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL; 2412 sc->sc_gpio_blinktime = 2; 2413 break; 2414 case URTW_LED_CTL_LINK: 2415 sc->sc_gpio_ledstate = URTW_LED_ON; 2416 break; 2417 default: 2418 panic("unsupported LED mode 0x%x", mode); 2419 /* never reach */ 2420 } 2421 2422 switch (sc->sc_gpio_ledstate) { 2423 case URTW_LED_ON: 2424 if (sc->sc_gpio_ledinprogress != 0) 2425 break; 2426 urtw_led_on(sc, URTW_LED_GPIO); 2427 break; 2428 case URTW_LED_BLINK_NORMAL: 2429 if (sc->sc_gpio_ledinprogress != 0) 2430 break; 2431 sc->sc_gpio_ledinprogress = 1; 2432 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ? 2433 URTW_LED_OFF : URTW_LED_ON; 2434 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 2435 break; 2436 case URTW_LED_POWER_ON_BLINK: 2437 urtw_led_on(sc, URTW_LED_GPIO); 2438 usb_pause_mtx(&sc->sc_mtx, 100); 2439 urtw_led_off(sc, URTW_LED_GPIO); 2440 break; 2441 default: 2442 panic("unknown LED status 0x%x", sc->sc_gpio_ledstate); 2443 /* never reach */ 2444 } 2445 return (0); 2446} 2447 2448static usb_error_t 2449urtw_led_mode1(struct urtw_softc *sc, int mode) 2450{ 2451 2452 return (USB_ERR_INVAL); 2453} 2454 2455static usb_error_t 2456urtw_led_mode2(struct urtw_softc *sc, int mode) 2457{ 2458 2459 return (USB_ERR_INVAL); 2460} 2461 2462static usb_error_t 2463urtw_led_mode3(struct urtw_softc *sc, int mode) 2464{ 2465 2466 return (USB_ERR_INVAL); 2467} 2468 2469static void 2470urtw_ledtask(void *arg, int pending) 2471{ 2472 struct urtw_softc *sc = arg; 2473 2474 if (sc->sc_strategy != URTW_SW_LED_MODE0) 2475 panic("could not process a LED strategy 0x%x", sc->sc_strategy); 2476 2477 URTW_LOCK(sc); 2478 urtw_led_blink(sc); 2479 URTW_UNLOCK(sc); 2480} 2481 2482static usb_error_t 2483urtw_led_ctl(struct urtw_softc *sc, int mode) 2484{ 2485 usb_error_t error = 0; 2486 2487 switch (sc->sc_strategy) { 2488 case URTW_SW_LED_MODE0: 2489 error = urtw_led_mode0(sc, mode); 2490 break; 2491 case URTW_SW_LED_MODE1: 2492 error = urtw_led_mode1(sc, mode); 2493 break; 2494 case URTW_SW_LED_MODE2: 2495 error = urtw_led_mode2(sc, mode); 2496 break; 2497 case URTW_SW_LED_MODE3: 2498 error = urtw_led_mode3(sc, mode); 2499 break; 2500 default: 2501 panic("unsupported LED mode %d\n", sc->sc_strategy); 2502 /* never reach */ 2503 } 2504 2505 return (error); 2506} 2507 2508static usb_error_t 2509urtw_led_blink(struct urtw_softc *sc) 2510{ 2511 uint8_t ing = 0; 2512 usb_error_t error; 2513 2514 if (sc->sc_gpio_blinkstate == URTW_LED_ON) 2515 error = urtw_led_on(sc, URTW_LED_GPIO); 2516 else 2517 error = urtw_led_off(sc, URTW_LED_GPIO); 2518 sc->sc_gpio_blinktime--; 2519 if (sc->sc_gpio_blinktime == 0) 2520 ing = 1; 2521 else { 2522 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL && 2523 sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY && 2524 sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3) 2525 ing = 1; 2526 } 2527 if (ing == 1) { 2528 if (sc->sc_gpio_ledstate == URTW_LED_ON && 2529 sc->sc_gpio_ledon == 0) 2530 error = urtw_led_on(sc, URTW_LED_GPIO); 2531 else if (sc->sc_gpio_ledstate == URTW_LED_OFF && 2532 sc->sc_gpio_ledon == 1) 2533 error = urtw_led_off(sc, URTW_LED_GPIO); 2534 2535 sc->sc_gpio_blinktime = 0; 2536 sc->sc_gpio_ledinprogress = 0; 2537 return (0); 2538 } 2539 2540 sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ? 2541 URTW_LED_ON : URTW_LED_OFF; 2542 2543 switch (sc->sc_gpio_ledstate) { 2544 case URTW_LED_BLINK_NORMAL: 2545 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 2546 break; 2547 default: 2548 panic("unknown LED status 0x%x", sc->sc_gpio_ledstate); 2549 /* never reach */ 2550 } 2551 return (0); 2552} 2553 2554static usb_error_t 2555urtw_update_msr(struct urtw_softc *sc) 2556{ 2557 struct ifnet *ifp = sc->sc_ifp; 2558 struct ieee80211com *ic = ifp->if_l2com; | |
2559 uint8_t data; 2560 usb_error_t error; 2561 | 2268 uint8_t data; 2269 usb_error_t error; 2270 |
2562 urtw_read8_m(sc, URTW_MSR, &data); 2563 data &= ~URTW_MSR_LINK_MASK; 2564 2565 if (sc->sc_state == IEEE80211_S_RUN) { 2566 switch (ic->ic_opmode) { 2567 case IEEE80211_M_STA: 2568 case IEEE80211_M_MONITOR: 2569 data |= URTW_MSR_LINK_STA; 2570 if (sc->sc_flags & URTW_RTL8187B) 2571 data |= URTW_MSR_LINK_ENEDCA; 2572 break; 2573 case IEEE80211_M_IBSS: 2574 data |= URTW_MSR_LINK_ADHOC; 2575 break; 2576 case IEEE80211_M_HOSTAP: 2577 data |= URTW_MSR_LINK_HOSTAP; 2578 break; 2579 default: 2580 panic("unsupported operation mode 0x%x\n", 2581 ic->ic_opmode); 2582 /* never reach */ 2583 } 2584 } else 2585 data |= URTW_MSR_LINK_NONE; 2586 2587 urtw_write8_m(sc, URTW_MSR, data); | 2271 /* masking */ 2272 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2273 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK); 2274 DELAY(URTW_EPROM_DELAY); 2275 /* unmasking */ 2276 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2277 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK); 2278 DELAY(URTW_EPROM_DELAY); |
2588fail: 2589 return (error); 2590} 2591 | 2279fail: 2280 return (error); 2281} 2282 |
2592static uint16_t 2593urtw_rate2rtl(int rate) 2594{ 2595 int i; 2596 2597 for (i = 0; i < nitems(urtw_ratetable); i++) { 2598 if (rate == urtw_ratetable[i].reg) 2599 return urtw_ratetable[i].val; 2600 } 2601 2602 return (3); 2603} 2604 2605static uint16_t 2606urtw_rtl2rate(int rate) 2607{ 2608 int i; 2609 2610 for (i = 0; i < nitems(urtw_ratetable); i++) { 2611 if (rate == urtw_ratetable[i].val) 2612 return urtw_ratetable[i].reg; 2613 } 2614 2615 return (0); 2616} 2617 | |
2618static usb_error_t | 2283static usb_error_t |
2619urtw_set_rate(struct urtw_softc *sc) | 2284urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data) |
2620{ | 2285{ |
2621 int i, basic_rate, min_rr_rate, max_rr_rate; 2622 uint16_t data; | 2286 uint8_t data8; |
2623 usb_error_t error; 2624 | 2287 usb_error_t error; 2288 |
2625 basic_rate = urtw_rate2rtl(48); 2626 min_rr_rate = urtw_rate2rtl(12); 2627 max_rr_rate = urtw_rate2rtl(48); | 2289 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 2290 *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0; 2291 DELAY(URTW_EPROM_DELAY); |
2628 | 2292 |
2629 urtw_write8_m(sc, URTW_RESP_RATE, 2630 max_rr_rate << URTW_RESP_MAX_RATE_SHIFT | 2631 min_rr_rate << URTW_RESP_MIN_RATE_SHIFT); 2632 2633 urtw_read16_m(sc, URTW_BRSR, &data); 2634 data &= ~URTW_BRSR_MBR_8185; 2635 2636 for (i = 0; i <= basic_rate; i++) 2637 data |= (1 << i); 2638 2639 urtw_write16_m(sc, URTW_BRSR, data); | |
2640fail: 2641 return (error); 2642} 2643 2644static usb_error_t | 2293fail: 2294 return (error); 2295} 2296 2297static usb_error_t |
2645urtw_intr_enable(struct urtw_softc *sc) | 2298urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit) |
2646{ | 2299{ |
2647 usb_error_t error; 2648 2649 urtw_write16_m(sc, URTW_INTR_MASK, 0xffff); 2650fail: 2651 return (error); 2652} 2653 2654static usb_error_t 2655urtw_rx_setconf(struct urtw_softc *sc) 2656{ 2657 struct ifnet *ifp = sc->sc_ifp; 2658 struct ieee80211com *ic = ifp->if_l2com; 2659 uint32_t data; 2660 usb_error_t error; 2661 2662 urtw_read32_m(sc, URTW_RX, &data); 2663 data = data &~ URTW_RX_FILTER_MASK; 2664 if (sc->sc_flags & URTW_RTL8187B) { 2665 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA | 2666 URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST | 2667 URTW_RX_FILTER_NICMAC | URTW_RX_CHECK_BSSID | 2668 URTW_RX_FIFO_THRESHOLD_NONE | 2669 URTW_MAX_RX_DMA_2048 | 2670 URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT; 2671 } else { 2672 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA; 2673 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST; 2674 2675 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 2676 data = data | URTW_RX_FILTER_ICVERR; 2677 data = data | URTW_RX_FILTER_PWR; 2678 } 2679 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR) 2680 data = data | URTW_RX_FILTER_CRCERR; 2681 2682 if (ic->ic_opmode == IEEE80211_M_MONITOR || 2683 (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) { 2684 data = data | URTW_RX_FILTER_ALLMAC; 2685 } else { 2686 data = data | URTW_RX_FILTER_NICMAC; 2687 data = data | URTW_RX_CHECK_BSSID; 2688 } 2689 2690 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK; 2691 data = data | URTW_RX_FIFO_THRESHOLD_NONE | 2692 URTW_RX_AUTORESETPHY; 2693 data = data &~ URTW_MAX_RX_DMA_MASK; 2694 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT; 2695 } 2696 2697 urtw_write32_m(sc, URTW_RX, data); 2698fail: 2699 return (error); 2700} 2701 2702 2703static usb_error_t 2704urtw_rx_enable(struct urtw_softc *sc) 2705{ | |
2706 uint8_t data; 2707 usb_error_t error; 2708 | 2300 uint8_t data; 2301 usb_error_t error; 2302 |
2709 usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ? 2710 sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]); 2711 2712 error = urtw_rx_setconf(sc); 2713 if (error != 0) 2714 goto fail; 2715 2716 urtw_read8_m(sc, URTW_CMD, &data); 2717 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE); | 2303 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2304 if (bit != 0) 2305 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT); 2306 else 2307 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT); 2308 DELAY(URTW_EPROM_DELAY); |
2718fail: 2719 return (error); 2720} 2721 2722static usb_error_t | 2309fail: 2310 return (error); 2311} 2312 2313static usb_error_t |
2723urtw_tx_enable(struct urtw_softc *sc) | 2314urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen) |
2724{ | 2315{ |
2725 uint8_t data8; 2726 uint32_t data; 2727 usb_error_t error; | 2316 int i = 0; 2317 usb_error_t error = 0; |
2728 | 2318 |
2729 if (sc->sc_flags & URTW_RTL8187B) { 2730 urtw_read32_m(sc, URTW_TX_CONF, &data); 2731 data &= ~URTW_TX_LOOPBACK_MASK; 2732 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 2733 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 2734 data &= ~URTW_TX_SWPLCPLEN; 2735 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE | 2736 (7 << 8) | /* short retry limit */ 2737 (7 << 0) | /* long retry limit */ 2738 (7 << 21); /* MAX TX DMA */ 2739 urtw_write32_m(sc, URTW_TX_CONF, data); 2740 2741 urtw_read8_m(sc, URTW_CMD, &data8); 2742 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 2743 return (error); | 2319 for (i = 0; i < buflen; i++) { 2320 error = urtw_eprom_writebit(sc, buf[i]); 2321 if (error != 0) 2322 goto fail; 2323 error = urtw_eprom_ck(sc); 2324 if (error != 0) 2325 goto fail; |
2744 } | 2326 } |
2745 2746 urtw_read8_m(sc, URTW_CW_CONF, &data8); 2747 data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY); 2748 urtw_write8_m(sc, URTW_CW_CONF, data8); 2749 2750 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 2751 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN; 2752 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 2753 data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT; 2754 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 2755 2756 urtw_read32_m(sc, URTW_TX_CONF, &data); 2757 data &= ~URTW_TX_LOOPBACK_MASK; 2758 data |= URTW_TX_LOOPBACK_NONE; 2759 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 2760 data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT; 2761 data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT; 2762 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 2763 data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW; 2764 data &= ~URTW_TX_SWPLCPLEN; 2765 data |= URTW_TX_NOICV; 2766 urtw_write32_m(sc, URTW_TX_CONF, data); 2767 2768 urtw_read8_m(sc, URTW_CMD, &data8); 2769 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); | |
2770fail: 2771 return (error); 2772} 2773 2774 2775static usb_error_t 2776urtw_get_txpwr(struct urtw_softc *sc) 2777{ --- 148 unchanged lines hidden (view full) --- 2926 } 2927 2928 sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0; 2929 2930fail: 2931 return (error); 2932} 2933 | 2327fail: 2328 return (error); 2329} 2330 2331 2332static usb_error_t 2333urtw_get_txpwr(struct urtw_softc *sc) 2334{ --- 148 unchanged lines hidden (view full) --- 2483 } 2484 2485 sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0; 2486 2487fail: 2488 return (error); 2489} 2490 |
2491 |
|
2934static usb_error_t | 2492static usb_error_t |
2493urtw_8225_rf_init(struct urtw_softc *sc) 2494{ 2495#define N(a) (sizeof(a) / sizeof((a)[0])) 2496 int i; 2497 uint16_t data; 2498 usb_error_t error; 2499 2500 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2501 if (error) 2502 goto fail; 2503 2504 error = urtw_8225_usb_init(sc); 2505 if (error) 2506 goto fail; 2507 2508 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2509 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2510 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2511 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2512 2513 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2514 if (error) 2515 goto fail; 2516 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2517 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2518 if (error) 2519 goto fail; 2520 2521 error = urtw_8185_rf_pins_enable(sc); 2522 if (error) 2523 goto fail; 2524 usb_pause_mtx(&sc->sc_mtx, 1000); 2525 2526 for (i = 0; i < N(urtw_8225_rf_part1); i++) { 2527 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg, 2528 urtw_8225_rf_part1[i].val); 2529 usb_pause_mtx(&sc->sc_mtx, 1); 2530 } 2531 usb_pause_mtx(&sc->sc_mtx, 100); 2532 urtw_8225_write(sc, 2533 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2534 usb_pause_mtx(&sc->sc_mtx, 200); 2535 urtw_8225_write(sc, 2536 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2537 usb_pause_mtx(&sc->sc_mtx, 200); 2538 urtw_8225_write(sc, 2539 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3); 2540 2541 for (i = 0; i < 95; i++) { 2542 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2543 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]); 2544 } 2545 2546 urtw_8225_write(sc, 2547 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4); 2548 urtw_8225_write(sc, 2549 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5); 2550 2551 for (i = 0; i < 128; i++) { 2552 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2553 usb_pause_mtx(&sc->sc_mtx, 1); 2554 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2555 usb_pause_mtx(&sc->sc_mtx, 1); 2556 } 2557 2558 for (i = 0; i < N(urtw_8225_rf_part2); i++) { 2559 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg, 2560 urtw_8225_rf_part2[i].val); 2561 usb_pause_mtx(&sc->sc_mtx, 1); 2562 } 2563 2564 error = urtw_8225_setgain(sc, 4); 2565 if (error) 2566 goto fail; 2567 2568 for (i = 0; i < N(urtw_8225_rf_part3); i++) { 2569 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg, 2570 urtw_8225_rf_part3[i].val); 2571 usb_pause_mtx(&sc->sc_mtx, 1); 2572 } 2573 2574 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2575 2576 error = urtw_8225_set_txpwrlvl(sc, 1); 2577 if (error) 2578 goto fail; 2579 2580 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2581 usb_pause_mtx(&sc->sc_mtx, 1); 2582 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2583 usb_pause_mtx(&sc->sc_mtx, 1); 2584 2585 /* TX ant A, 0x0 for B */ 2586 error = urtw_8185_tx_antenna(sc, 0x3); 2587 if (error) 2588 goto fail; 2589 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2590 2591 error = urtw_8225_rf_set_chan(sc, 1); 2592fail: 2593 return (error); 2594#undef N 2595} 2596 2597static usb_error_t |
|
2935urtw_8185_rf_pins_enable(struct urtw_softc *sc) 2936{ 2937 usb_error_t error = 0; 2938 2939 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7); 2940fail: 2941 return (error); 2942} --- 147 unchanged lines hidden (view full) --- 3090 3091 error = urtw_do_request(sc, req, buf); 3092 3093 free(buf, M_80211_VAP); 3094fail1: free(req, M_80211_VAP); 3095fail0: return (error); 3096} 3097 | 2598urtw_8185_rf_pins_enable(struct urtw_softc *sc) 2599{ 2600 usb_error_t error = 0; 2601 2602 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7); 2603fail: 2604 return (error); 2605} --- 147 unchanged lines hidden (view full) --- 2753 2754 error = urtw_do_request(sc, req, buf); 2755 2756 free(buf, M_80211_VAP); 2757fail1: free(req, M_80211_VAP); 2758fail0: return (error); 2759} 2760 |
3098 | |
3099static usb_error_t | 2761static usb_error_t |
3100urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan) 3101{ 3102 int i, idx, set; 3103 uint8_t *cck_pwltable; 3104 uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max; 3105 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3106 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3107 usb_error_t error; 3108 3109 cck_pwrlvl_max = 11; 3110 ofdm_pwrlvl_max = 25; /* 12 -> 25 */ 3111 ofdm_pwrlvl_min = 10; 3112 3113 /* CCK power setting */ 3114 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 3115 idx = cck_pwrlvl % 6; 3116 set = cck_pwrlvl / 6; 3117 cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 : 3118 urtw_8225_txpwr_cck; 3119 3120 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3121 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 3122 for (i = 0; i < 8; i++) { 3123 urtw_8187_write_phy_cck(sc, 0x44 + i, 3124 cck_pwltable[idx * 8 + i]); 3125 } 3126 usb_pause_mtx(&sc->sc_mtx, 1); 3127 3128 /* OFDM power setting */ 3129 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 3130 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 3131 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3132 3133 idx = ofdm_pwrlvl % 6; 3134 set = ofdm_pwrlvl / 6; 3135 3136 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3137 if (error) 3138 goto fail; 3139 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 3140 urtw_8187_write_phy_ofdm(sc, 6, 0); 3141 urtw_8187_write_phy_ofdm(sc, 8, 0); 3142 3143 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3144 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 3145 urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]); 3146 urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]); 3147 usb_pause_mtx(&sc->sc_mtx, 1); 3148fail: 3149 return (error); 3150} 3151 3152 3153static usb_error_t 3154urtw_8225_rf_stop(struct urtw_softc *sc) 3155{ 3156 uint8_t data; 3157 usb_error_t error; 3158 3159 urtw_8225_write(sc, 0x4, 0x1f); 3160 3161 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3162 if (error) 3163 goto fail; 3164 3165 urtw_read8_m(sc, URTW_CONFIG3, &data); 3166 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3167 if (sc->sc_flags & URTW_RTL8187B) { 3168 urtw_write32_m(sc, URTW_ANAPARAM2, 3169 URTW_8187B_8225_ANAPARAM2_OFF); 3170 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF); 3171 urtw_write32_m(sc, URTW_ANAPARAM3, 3172 URTW_8187B_8225_ANAPARAM3_OFF); 3173 } else { 3174 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF); 3175 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF); 3176 } 3177 3178 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3179 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3180 if (error) 3181 goto fail; 3182 3183fail: 3184 return (error); 3185} 3186 3187 3188static usb_error_t 3189urtw_8225_rf_init(struct urtw_softc *sc) 3190{ 3191 int i; 3192 uint16_t data; 3193 usb_error_t error; 3194 3195 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3196 if (error) 3197 goto fail; 3198 3199 error = urtw_8225_usb_init(sc); 3200 if (error) 3201 goto fail; 3202 3203 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 3204 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 3205 urtw_write16_m(sc, URTW_BRSR, 0xffff); 3206 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 3207 3208 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3209 if (error) 3210 goto fail; 3211 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 3212 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3213 if (error) 3214 goto fail; 3215 3216 error = urtw_8185_rf_pins_enable(sc); 3217 if (error) 3218 goto fail; 3219 usb_pause_mtx(&sc->sc_mtx, 1000); 3220 3221 for (i = 0; i < nitems(urtw_8225_rf_part1); i++) { 3222 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg, 3223 urtw_8225_rf_part1[i].val); 3224 usb_pause_mtx(&sc->sc_mtx, 1); 3225 } 3226 usb_pause_mtx(&sc->sc_mtx, 100); 3227 urtw_8225_write(sc, 3228 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 3229 usb_pause_mtx(&sc->sc_mtx, 200); 3230 urtw_8225_write(sc, 3231 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 3232 usb_pause_mtx(&sc->sc_mtx, 200); 3233 urtw_8225_write(sc, 3234 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3); 3235 3236 for (i = 0; i < nitems(urtw_8225_rxgain); i++) { 3237 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 3238 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]); 3239 } 3240 3241 urtw_8225_write(sc, 3242 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4); 3243 urtw_8225_write(sc, 3244 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5); 3245 3246 for (i = 0; i < nitems(urtw_8225_agc); i++) { 3247 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 3248 usb_pause_mtx(&sc->sc_mtx, 1); 3249 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 3250 usb_pause_mtx(&sc->sc_mtx, 1); 3251 } 3252 3253 for (i = 0; i < nitems(urtw_8225_rf_part2); i++) { 3254 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg, 3255 urtw_8225_rf_part2[i].val); 3256 usb_pause_mtx(&sc->sc_mtx, 1); 3257 } 3258 3259 error = urtw_8225_setgain(sc, 4); 3260 if (error) 3261 goto fail; 3262 3263 for (i = 0; i < nitems(urtw_8225_rf_part3); i++) { 3264 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg, 3265 urtw_8225_rf_part3[i].val); 3266 usb_pause_mtx(&sc->sc_mtx, 1); 3267 } 3268 3269 urtw_write8_m(sc, URTW_TESTR, 0x0d); 3270 3271 error = urtw_8225_set_txpwrlvl(sc, 1); 3272 if (error) 3273 goto fail; 3274 3275 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 3276 usb_pause_mtx(&sc->sc_mtx, 1); 3277 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 3278 usb_pause_mtx(&sc->sc_mtx, 1); 3279 3280 /* TX ant A, 0x0 for B */ 3281 error = urtw_8185_tx_antenna(sc, 0x3); 3282 if (error) 3283 goto fail; 3284 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 3285 3286 error = urtw_8225_rf_set_chan(sc, 1); 3287fail: 3288 return (error); 3289} 3290 3291static usb_error_t | |
3292urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan) 3293{ 3294 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 3295 struct ieee80211_channel *c = ic->ic_curchan; 3296 usb_error_t error; 3297 3298 error = urtw_8225_set_txpwrlvl(sc, chan); 3299 if (error) --- 46 unchanged lines hidden (view full) --- 3346 goto fail; 3347 3348 urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]); 3349 3350fail: 3351 return (error); 3352} 3353 | 2762urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan) 2763{ 2764 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 2765 struct ieee80211_channel *c = ic->ic_curchan; 2766 usb_error_t error; 2767 2768 error = urtw_8225_set_txpwrlvl(sc, chan); 2769 if (error) --- 46 unchanged lines hidden (view full) --- 2816 goto fail; 2817 2818 urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]); 2819 2820fail: 2821 return (error); 2822} 2823 |
3354static void 3355urtw_stop_locked(struct ifnet *ifp, int disable) | 2824static usb_error_t 2825urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan) |
3356{ | 2826{ |
3357 struct urtw_softc *sc = ifp->if_softc; 3358 uint8_t data8; | 2827 int i, idx, set; 2828 uint8_t *cck_pwltable; 2829 uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max; 2830 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 2831 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; |
3359 usb_error_t error; 3360 | 2832 usb_error_t error; 2833 |
3361 (void)disable; 3362 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); | 2834 cck_pwrlvl_max = 11; 2835 ofdm_pwrlvl_max = 25; /* 12 -> 25 */ 2836 ofdm_pwrlvl_min = 10; |
3363 | 2837 |
3364 error = urtw_intr_disable(sc); 3365 if (error) 3366 goto fail; 3367 urtw_read8_m(sc, URTW_CMD, &data8); 3368 data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 3369 urtw_write8_m(sc, URTW_CMD, data8); | 2838 /* CCK power setting */ 2839 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 2840 idx = cck_pwrlvl % 6; 2841 set = cck_pwrlvl / 6; 2842 cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 : 2843 urtw_8225_txpwr_cck; |
3370 | 2844 |
3371 error = sc->sc_rf_stop(sc); 3372 if (error != 0) 3373 goto fail; 3374 3375 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3376 if (error) 3377 goto fail; 3378 urtw_read8_m(sc, URTW_CONFIG4, &data8); 3379 urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF); 3380 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3381 if (error) 3382 goto fail; 3383fail: 3384 if (error) 3385 device_printf(sc->sc_dev, "failed to stop (%s)\n", 3386 usbd_errstr(error)); 3387 3388 usb_callout_stop(&sc->sc_led_ch); 3389 callout_stop(&sc->sc_watchdog_ch); 3390 3391 urtw_abort_xfers(sc); 3392} 3393 3394static void 3395urtw_stop(struct ifnet *ifp, int disable) 3396{ 3397 struct urtw_softc *sc = ifp->if_softc; 3398 3399 URTW_LOCK(sc); 3400 urtw_stop_locked(ifp, disable); 3401 URTW_UNLOCK(sc); 3402} 3403 3404 3405static int 3406urtw_isbmode(uint16_t rate) 3407{ 3408 3409 rate = urtw_rtl2rate(rate); 3410 3411 return ((rate <= 22 && rate != 12 && rate != 18) || 3412 rate == 44) ? (1) : (0); 3413} 3414 3415static struct mbuf * 3416urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p, 3417 int8_t *nf_p) 3418{ 3419 int actlen, flen, len, nf = -95, rssi; 3420 struct ieee80211_frame *wh; 3421 struct mbuf *m, *mnew; 3422 struct urtw_8187b_rxhdr *bhdr; 3423 struct urtw_softc *sc = data->sc; 3424 struct ifnet *ifp = sc->sc_ifp; 3425 struct ieee80211com *ic = ifp->if_l2com; 3426 uint8_t *desc, quality = 0, rate; 3427 3428 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 3429 3430 if (actlen < URTW_MIN_RXBUFSZ) { 3431 ifp->if_ierrors++; 3432 return (NULL); | 2845 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 2846 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2847 for (i = 0; i < 8; i++) { 2848 urtw_8187_write_phy_cck(sc, 0x44 + i, 2849 cck_pwltable[idx * 8 + i]); |
3433 } | 2850 } |
2851 usb_pause_mtx(&sc->sc_mtx, 1); |
|
3434 | 2852 |
3435 if (sc->sc_flags & URTW_RTL8187B) { 3436 len = actlen - (sizeof(struct urtw_8187b_rxhdr)); 3437 bhdr = (struct urtw_8187b_rxhdr *)(data->buf + len); 3438 desc = data->buf + len; 3439 flen = ((desc[1] & 0x0f) << 8) + (desc[0] & 0xff); 3440 if (flen > actlen) { 3441 ifp->if_ierrors++; 3442 return (NULL); 3443 } 3444 rate = (le32toh(bhdr->flags) >> 20) & 0xf; 3445 rssi = 14 + (bhdr->rssi / 2); 3446 if (rssi > 95) 3447 rssi = 95; 3448 } else { 3449 /* 4 dword and 4 byte CRC */ 3450 len = actlen - (4 * 4); 3451 desc = data->buf + len; 3452 flen = ((desc[1] & 0x0f) << 8) + (desc[0] & 0xff); 3453 if (flen > actlen) { 3454 ifp->if_ierrors++; 3455 return (NULL); 3456 } | 2853 /* OFDM power setting */ 2854 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 2855 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 2856 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; |
3457 | 2857 |
3458 rate = (desc[2] & 0xf0) >> 4; 3459 quality = desc[4] & 0xff; 3460 /* XXX correct? */ 3461 rssi = (desc[6] & 0xfe) >> 1; 3462 if (!urtw_isbmode(rate)) { 3463 rssi = (rssi > 90) ? 90 : ((rssi < 25) ? 25 : rssi); 3464 rssi = ((90 - rssi) * 100) / 65; 3465 } else { 3466 rssi = (rssi > 90) ? 95 : ((rssi < 30) ? 30 : rssi); 3467 rssi = ((95 - rssi) * 100) / 65; 3468 } 3469 } | 2858 idx = ofdm_pwrlvl % 6; 2859 set = ofdm_pwrlvl / 6; |
3470 | 2860 |
3471 mnew = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 3472 if (mnew == NULL) { 3473 ifp->if_ierrors++; 3474 return (NULL); 3475 } | 2861 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2862 if (error) 2863 goto fail; 2864 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 2865 urtw_8187_write_phy_ofdm(sc, 6, 0); 2866 urtw_8187_write_phy_ofdm(sc, 8, 0); |
3476 | 2867 |
3477 m = data->m; 3478 data->m = mnew; 3479 data->buf = mtod(mnew, uint8_t *); 3480 3481 /* finalize mbuf */ 3482 m->m_pkthdr.rcvif = ifp; 3483 m->m_pkthdr.len = m->m_len = flen - 4; 3484 3485 if (ieee80211_radiotap_active(ic)) { 3486 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap; 3487 3488 /* XXX Are variables correct? */ 3489 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 3490 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 3491 tap->wr_dbm_antsignal = (int8_t)rssi; 3492 } 3493 3494 wh = mtod(m, struct ieee80211_frame *); 3495 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA) 3496 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate; 3497 /* XXX correct? */ 3498 if ((sc->sc_flags & URTW_RTL8187B) == 0) 3499 nf = (quality > 64) ? 0 : ((64 - quality) * 100) / 64; 3500 3501 *rssi_p = rssi; 3502 *nf_p = nf; 3503 3504 return (m); 3505} 3506 3507static usb_error_t 3508urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain) 3509{ 3510 uint8_t *gainp; 3511 usb_error_t error; 3512 3513 /* XXX for A? */ 3514 gainp = urtw_8225v2_gain_bg; 3515 urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]); | 2868 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 2869 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2870 urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]); 2871 urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]); |
3516 usb_pause_mtx(&sc->sc_mtx, 1); | 2872 usb_pause_mtx(&sc->sc_mtx, 1); |
3517 urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]); 3518 usb_pause_mtx(&sc->sc_mtx, 1); 3519 urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]); 3520 usb_pause_mtx(&sc->sc_mtx, 1); 3521 urtw_8187_write_phy_ofdm(sc, 0x21, 0x17); 3522 usb_pause_mtx(&sc->sc_mtx, 1); | |
3523fail: 3524 return (error); 3525} 3526 | 2873fail: 2874 return (error); 2875} 2876 |
2877 |
|
3527static usb_error_t | 2878static usb_error_t |
3528urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan) | 2879urtw_8225_rf_stop(struct urtw_softc *sc) |
3529{ | 2880{ |
3530 int i; 3531 uint8_t *cck_pwrtable; 3532 uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10; 3533 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3534 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; | 2881 uint8_t data; |
3535 usb_error_t error; 3536 | 2882 usb_error_t error; 2883 |
3537 /* CCK power setting */ 3538 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 3539 cck_pwrlvl += sc->sc_txpwr_cck_base; 3540 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3541 cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 : 3542 urtw_8225v2_txpwr_cck; | 2884 urtw_8225_write(sc, 0x4, 0x1f); |
3543 | 2885 |
3544 for (i = 0; i < 8; i++) 3545 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); | 2886 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2887 if (error) 2888 goto fail; |
3546 | 2889 |
3547 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3548 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]); 3549 usb_pause_mtx(&sc->sc_mtx, 1); | 2890 urtw_read8_m(sc, URTW_CONFIG3, &data); 2891 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 2892 if (sc->sc_flags & URTW_RTL8187B) { 2893 urtw_write32_m(sc, URTW_ANAPARAM2, 2894 URTW_8187B_8225_ANAPARAM2_OFF); 2895 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF); 2896 urtw_write32_m(sc, URTW_ANAPARAM3, 2897 URTW_8187B_8225_ANAPARAM3_OFF); 2898 } else { 2899 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF); 2900 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF); 2901 } |
3550 | 2902 |
3551 /* OFDM power setting */ 3552 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 3553 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 3554 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3555 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3556 3557 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); | 2903 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 2904 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); |
3558 if (error) 3559 goto fail; 3560 | 2905 if (error) 2906 goto fail; 2907 |
3561 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 3562 urtw_8187_write_phy_ofdm(sc, 5, 0x0); 3563 urtw_8187_write_phy_ofdm(sc, 6, 0x40); 3564 urtw_8187_write_phy_ofdm(sc, 7, 0x0); 3565 urtw_8187_write_phy_ofdm(sc, 8, 0x40); 3566 3567 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3568 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]); 3569 usb_pause_mtx(&sc->sc_mtx, 1); | |
3570fail: 3571 return (error); 3572} 3573 | 2908fail: 2909 return (error); 2910} 2911 |
3574 | |
3575static usb_error_t 3576urtw_8225v2_rf_init(struct urtw_softc *sc) 3577{ | 2912static usb_error_t 2913urtw_8225v2_rf_init(struct urtw_softc *sc) 2914{ |
2915#define N(a) (sizeof(a) / sizeof((a)[0])) |
|
3578 int i; 3579 uint16_t data; 3580 uint32_t data32; 3581 usb_error_t error; 3582 3583 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3584 if (error) 3585 goto fail; --- 16 unchanged lines hidden (view full) --- 3602 goto fail; 3603 3604 error = urtw_8185_rf_pins_enable(sc); 3605 if (error) 3606 goto fail; 3607 3608 usb_pause_mtx(&sc->sc_mtx, 500); 3609 | 2916 int i; 2917 uint16_t data; 2918 uint32_t data32; 2919 usb_error_t error; 2920 2921 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2922 if (error) 2923 goto fail; --- 16 unchanged lines hidden (view full) --- 2940 goto fail; 2941 2942 error = urtw_8185_rf_pins_enable(sc); 2943 if (error) 2944 goto fail; 2945 2946 usb_pause_mtx(&sc->sc_mtx, 500); 2947 |
3610 for (i = 0; i < nitems(urtw_8225v2_rf_part1); i++) { | 2948 for (i = 0; i < N(urtw_8225v2_rf_part1); i++) { |
3611 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg, 3612 urtw_8225v2_rf_part1[i].val); 3613 } 3614 usb_pause_mtx(&sc->sc_mtx, 50); 3615 3616 urtw_8225_write(sc, 3617 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 3618 --- 38 unchanged lines hidden (view full) --- 3657 3658 urtw_8225_write(sc, 3659 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6); 3660 for (i = 0; i < 128; i++) { 3661 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 3662 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 3663 } 3664 | 2949 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg, 2950 urtw_8225v2_rf_part1[i].val); 2951 } 2952 usb_pause_mtx(&sc->sc_mtx, 50); 2953 2954 urtw_8225_write(sc, 2955 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 2956 --- 38 unchanged lines hidden (view full) --- 2995 2996 urtw_8225_write(sc, 2997 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6); 2998 for (i = 0; i < 128; i++) { 2999 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 3000 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 3001 } 3002 |
3665 for (i = 0; i < nitems(urtw_8225v2_rf_part2); i++) { | 3003 for (i = 0; i < N(urtw_8225v2_rf_part2); i++) { |
3666 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg, 3667 urtw_8225v2_rf_part2[i].val); 3668 } 3669 3670 error = urtw_8225v2_setgain(sc, 4); 3671 if (error) 3672 goto fail; 3673 | 3004 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg, 3005 urtw_8225v2_rf_part2[i].val); 3006 } 3007 3008 error = urtw_8225v2_setgain(sc, 4); 3009 if (error) 3010 goto fail; 3011 |
3674 for (i = 0; i < nitems(urtw_8225v2_rf_part3); i++) { | 3012 for (i = 0; i < N(urtw_8225v2_rf_part3); i++) { |
3675 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg, 3676 urtw_8225v2_rf_part3[i].val); 3677 } 3678 3679 urtw_write8_m(sc, URTW_TESTR, 0x0d); 3680 3681 error = urtw_8225v2_set_txpwrlvl(sc, 1); 3682 if (error) --- 6 unchanged lines hidden (view full) --- 3689 error = urtw_8185_tx_antenna(sc, 0x3); 3690 if (error) 3691 goto fail; 3692 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 3693 3694 error = urtw_8225_rf_set_chan(sc, 1); 3695fail: 3696 return (error); | 3013 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg, 3014 urtw_8225v2_rf_part3[i].val); 3015 } 3016 3017 urtw_write8_m(sc, URTW_TESTR, 0x0d); 3018 3019 error = urtw_8225v2_set_txpwrlvl(sc, 1); 3020 if (error) --- 6 unchanged lines hidden (view full) --- 3027 error = urtw_8185_tx_antenna(sc, 0x3); 3028 if (error) 3029 goto fail; 3030 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 3031 3032 error = urtw_8225_rf_set_chan(sc, 1); 3033fail: 3034 return (error); |
3035#undef N |
|
3697} 3698 3699static usb_error_t 3700urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan) 3701{ 3702 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 3703 struct ieee80211_channel *c = ic->ic_curchan; 3704 usb_error_t error; --- 116 unchanged lines hidden (view full) --- 3821 if (data != NULL) 3822 *data = value; 3823fail: 3824 return (error); 3825} 3826 3827 3828static usb_error_t | 3036} 3037 3038static usb_error_t 3039urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan) 3040{ 3041 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 3042 struct ieee80211_channel *c = ic->ic_curchan; 3043 usb_error_t error; --- 116 unchanged lines hidden (view full) --- 3160 if (data != NULL) 3161 *data = value; 3162fail: 3163 return (error); 3164} 3165 3166 3167static usb_error_t |
3168urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan) 3169{ 3170 int i; 3171 uint8_t *cck_pwrtable; 3172 uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10; 3173 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3174 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3175 usb_error_t error; 3176 3177 /* CCK power setting */ 3178 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 3179 cck_pwrlvl += sc->sc_txpwr_cck_base; 3180 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3181 cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 : 3182 urtw_8225v2_txpwr_cck; 3183 3184 for (i = 0; i < 8; i++) 3185 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3186 3187 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3188 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]); 3189 usb_pause_mtx(&sc->sc_mtx, 1); 3190 3191 /* OFDM power setting */ 3192 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 3193 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 3194 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3195 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3196 3197 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3198 if (error) 3199 goto fail; 3200 3201 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 3202 urtw_8187_write_phy_ofdm(sc, 5, 0x0); 3203 urtw_8187_write_phy_ofdm(sc, 6, 0x40); 3204 urtw_8187_write_phy_ofdm(sc, 7, 0x0); 3205 urtw_8187_write_phy_ofdm(sc, 8, 0x40); 3206 3207 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3208 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]); 3209 usb_pause_mtx(&sc->sc_mtx, 1); 3210fail: 3211 return (error); 3212} 3213 3214static usb_error_t 3215urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain) 3216{ 3217 uint8_t *gainp; 3218 usb_error_t error; 3219 3220 /* XXX for A? */ 3221 gainp = urtw_8225v2_gain_bg; 3222 urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]); 3223 usb_pause_mtx(&sc->sc_mtx, 1); 3224 urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]); 3225 usb_pause_mtx(&sc->sc_mtx, 1); 3226 urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]); 3227 usb_pause_mtx(&sc->sc_mtx, 1); 3228 urtw_8187_write_phy_ofdm(sc, 0x21, 0x17); 3229 usb_pause_mtx(&sc->sc_mtx, 1); 3230fail: 3231 return (error); 3232} 3233 3234static usb_error_t |
|
3829urtw_8225_isv2(struct urtw_softc *sc, int *ret) 3830{ 3831 uint32_t data; 3832 usb_error_t error; 3833 3834 *ret = 1; 3835 3836 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5); --- 17 unchanged lines hidden (view full) --- 3854 *ret = 0; 3855 } 3856 3857 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3858 URTW_8225_ADDR_0_DATA_MAGIC2); 3859fail: 3860 return (error); 3861} | 3235urtw_8225_isv2(struct urtw_softc *sc, int *ret) 3236{ 3237 uint32_t data; 3238 usb_error_t error; 3239 3240 *ret = 1; 3241 3242 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5); --- 17 unchanged lines hidden (view full) --- 3260 *ret = 0; 3261 } 3262 3263 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3264 URTW_8225_ADDR_0_DATA_MAGIC2); 3265fail: 3266 return (error); 3267} |
3268 3269static usb_error_t 3270urtw_8225v2b_rf_init(struct urtw_softc *sc) 3271{ 3272#define N(a) (sizeof(a) / sizeof((a)[0])) 3273 int i; 3274 usb_error_t error; 3275 3276 for (i = 0; i < N(urtw_8225v2b_rf_part1); i++) 3277 urtw_8225_write(sc, urtw_8225v2b_rf_part1[i].reg, 3278 urtw_8225v2b_rf_part1[i].val); 3279 3280 urtw_8225_write(sc, 3281 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 3282 3283 for (i = 0; i < N(urtw_8225v2b_rxgain); i++) { 3284 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 3285 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 3286 urtw_8225v2b_rxgain[i]); 3287 } 3288 3289 urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080); 3290 urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004); 3291 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7); 3292 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d); 3293 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d); 3294 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf); 3295 3296 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03); 3297 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07); 3298 urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03); 3299 3300 urtw_8187_write_phy_ofdm(sc, 0x80, 0x12); 3301 for (i = 0; i < N(urtw_8225z2_agc); i++) { 3302 urtw_8187_write_phy_ofdm(sc, 0xf, urtw_8225z2_agc[i]); 3303 urtw_8187_write_phy_ofdm(sc, 0xe, 0x80 + i); 3304 urtw_8187_write_phy_ofdm(sc, 0xe, 0); 3305 } 3306 urtw_8187_write_phy_ofdm(sc, 0x80, 0x10); 3307 3308 for (i = 0; i < N(urtw_8225v2b_rf_part2); i++) 3309 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val); 3310 3311 urtw_write32_m(sc, 0xf0, (7 << 12) | (3 << 8) | 0x1c); 3312 urtw_write32_m(sc, 0xf4, (7 << 12) | (3 << 8) | 0x1c); 3313 urtw_write32_m(sc, 0xf8, (7 << 12) | (3 << 8) | 0x1c); 3314 urtw_write32_m(sc, 0xfc, (7 << 12) | (3 << 8) | 0x1c); 3315 urtw_write8_m(sc, URTW_ACM_CONTROL, 0); 3316 3317 urtw_8187_write_phy_ofdm(sc, 0x97, 0x46); 3318 urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6); 3319 urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc); 3320 urtw_8187_write_phy_cck(sc, 0xc1, 0x88); 3321fail: 3322 return (error); 3323#undef N 3324} 3325 3326static usb_error_t 3327urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan) 3328{ 3329 int ack; 3330 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 3331 usb_error_t error; 3332 3333 error = urtw_8225v2b_set_txpwrlvl(sc, chan); 3334 if (error) 3335 goto fail; 3336 3337 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3338 usb_pause_mtx(&sc->sc_mtx, 10); 3339 3340 urtw_write8_m(sc, URTW_SIFS, 0xa); 3341 if (ic->ic_flags & IEEE80211_F_SHSLOT) { 3342 urtw_write8_m(sc, URTW_SLOT, 0x9); 3343 urtw_write8_m(sc, URTW_DIFS, 0x1c); 3344 /* In 8187B, BRSR + 1 ==> EIFS register */ 3345 urtw_write8_m(sc, URTW_BRSR + 1, 0x53); 3346 3347 ack = 112 + 48 + 0x1c; 3348 ack += (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 3349 72 : 144; 3350 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 3351 roundup2(ack, 4)); 3352 } else { 3353 urtw_write8_m(sc, URTW_SLOT, 0x14); 3354 urtw_write8_m(sc, URTW_DIFS, 0x32); 3355 /* In 8187B, BRSR + 1 ==> EIFS register */ 3356 urtw_write8_m(sc, URTW_BRSR + 1, 0x5b); 3357 3358 ack = 112 + 48 + 0x32; 3359 ack += (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 3360 72 : 144; 3361 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 3362 roundup2(ack, 4)); 3363 3364 } 3365 3366fail: 3367 return (error); 3368} 3369 3370static usb_error_t 3371urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan) 3372{ 3373 int i; 3374 uint8_t *cck_pwrtable; 3375 uint8_t cck_pwrlvl_max = 15; 3376 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3377 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3378 usb_error_t error; 3379 3380 /* CCK power setting */ 3381 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? 3382 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) : 3383 (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7)); 3384 cck_pwrlvl += sc->sc_txpwr_cck_base; 3385 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3386 cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 : 3387 urtw_8225v2b_txpwr_cck; 3388 3389 if (sc->sc_flags & URTW_RTL8187B_REV_B) 3390 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 : 3391 ((cck_pwrlvl <= 11) ? 8 : 16); 3392 else 3393 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 : 3394 ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24)); 3395 3396 for (i = 0; i < 8; i++) 3397 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3398 3399 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3400 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1); 3401 usb_pause_mtx(&sc->sc_mtx, 1); 3402 3403 /* OFDM power setting */ 3404 ofdm_pwrlvl = (ofdm_pwrlvl > 15) ? 3405 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) : 3406 (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10)); 3407 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3408 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3409 3410 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3411 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1); 3412 3413 if (sc->sc_flags & URTW_RTL8187B_REV_B) { 3414 if (ofdm_pwrlvl <= 11) { 3415 urtw_8187_write_phy_ofdm(sc, 0x87, 0x60); 3416 urtw_8187_write_phy_ofdm(sc, 0x89, 0x60); 3417 } else { 3418 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3419 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3420 } 3421 } else { 3422 if (ofdm_pwrlvl <= 11) { 3423 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3424 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3425 } else if (ofdm_pwrlvl <= 17) { 3426 urtw_8187_write_phy_ofdm(sc, 0x87, 0x54); 3427 urtw_8187_write_phy_ofdm(sc, 0x89, 0x54); 3428 } else { 3429 urtw_8187_write_phy_ofdm(sc, 0x87, 0x50); 3430 urtw_8187_write_phy_ofdm(sc, 0x89, 0x50); 3431 } 3432 } 3433 usb_pause_mtx(&sc->sc_mtx, 1); 3434fail: 3435 return (error); 3436} 3437 3438static usb_error_t 3439urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data) 3440{ 3441 struct usb_device_request req; 3442 usb_error_t error; 3443 3444 req.bmRequestType = UT_READ_VENDOR_DEVICE; 3445 req.bRequest = URTW_8187_GETREGS_REQ; 3446 USETW(req.wValue, val | 0xfe00); 3447 USETW(req.wIndex, 0); 3448 USETW(req.wLength, sizeof(uint8_t)); 3449 3450 error = urtw_do_request(sc, &req, data); 3451 return (error); 3452} 3453 3454static usb_error_t 3455urtw_write8e(struct urtw_softc *sc, int val, uint8_t data) 3456{ 3457 struct usb_device_request req; 3458 3459 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 3460 req.bRequest = URTW_8187_SETREGS_REQ; 3461 USETW(req.wValue, val | 0xfe00); 3462 USETW(req.wIndex, 0); 3463 USETW(req.wLength, sizeof(uint8_t)); 3464 3465 return (urtw_do_request(sc, &req, &data)); 3466} 3467 3468static usb_error_t 3469urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val) 3470{ 3471 uint8_t data; 3472 usb_error_t error; 3473 3474 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3475 if (error) 3476 goto fail; 3477 3478 urtw_read8_m(sc, URTW_CONFIG3, &data); 3479 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3480 urtw_write32_m(sc, URTW_ANAPARAM, val); 3481 urtw_read8_m(sc, URTW_CONFIG3, &data); 3482 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3483 3484 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3485 if (error) 3486 goto fail; 3487fail: 3488 return (error); 3489} 3490 3491static usb_error_t 3492urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val) 3493{ 3494 uint8_t data; 3495 usb_error_t error; 3496 3497 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3498 if (error) 3499 goto fail; 3500 3501 urtw_read8_m(sc, URTW_CONFIG3, &data); 3502 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3503 urtw_write32_m(sc, URTW_ANAPARAM2, val); 3504 urtw_read8_m(sc, URTW_CONFIG3, &data); 3505 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3506 3507 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3508 if (error) 3509 goto fail; 3510fail: 3511 return (error); 3512} 3513 3514static usb_error_t 3515urtw_intr_enable(struct urtw_softc *sc) 3516{ 3517 usb_error_t error; 3518 3519 urtw_write16_m(sc, URTW_INTR_MASK, 0xffff); 3520fail: 3521 return (error); 3522} 3523 3524static usb_error_t 3525urtw_intr_disable(struct urtw_softc *sc) 3526{ 3527 usb_error_t error; 3528 3529 urtw_write16_m(sc, URTW_INTR_MASK, 0); 3530fail: 3531 return (error); 3532} 3533 3534static usb_error_t 3535urtw_reset(struct urtw_softc *sc) 3536{ 3537 uint8_t data; 3538 usb_error_t error; 3539 3540 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3541 if (error) 3542 goto fail; 3543 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3544 if (error) 3545 goto fail; 3546 3547 error = urtw_intr_disable(sc); 3548 if (error) 3549 goto fail; 3550 usb_pause_mtx(&sc->sc_mtx, 100); 3551 3552 error = urtw_write8e(sc, 0x18, 0x10); 3553 if (error != 0) 3554 goto fail; 3555 error = urtw_write8e(sc, 0x18, 0x11); 3556 if (error != 0) 3557 goto fail; 3558 error = urtw_write8e(sc, 0x18, 0x00); 3559 if (error != 0) 3560 goto fail; 3561 usb_pause_mtx(&sc->sc_mtx, 100); 3562 3563 urtw_read8_m(sc, URTW_CMD, &data); 3564 data = (data & 0x2) | URTW_CMD_RST; 3565 urtw_write8_m(sc, URTW_CMD, data); 3566 usb_pause_mtx(&sc->sc_mtx, 100); 3567 3568 urtw_read8_m(sc, URTW_CMD, &data); 3569 if (data & URTW_CMD_RST) { 3570 device_printf(sc->sc_dev, "reset timeout\n"); 3571 goto fail; 3572 } 3573 3574 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 3575 if (error) 3576 goto fail; 3577 usb_pause_mtx(&sc->sc_mtx, 100); 3578 3579 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3580 if (error) 3581 goto fail; 3582 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3583 if (error) 3584 goto fail; 3585fail: 3586 return (error); 3587} 3588 3589static usb_error_t 3590urtw_led_ctl(struct urtw_softc *sc, int mode) 3591{ 3592 usb_error_t error = 0; 3593 3594 switch (sc->sc_strategy) { 3595 case URTW_SW_LED_MODE0: 3596 error = urtw_led_mode0(sc, mode); 3597 break; 3598 case URTW_SW_LED_MODE1: 3599 error = urtw_led_mode1(sc, mode); 3600 break; 3601 case URTW_SW_LED_MODE2: 3602 error = urtw_led_mode2(sc, mode); 3603 break; 3604 case URTW_SW_LED_MODE3: 3605 error = urtw_led_mode3(sc, mode); 3606 break; 3607 default: 3608 panic("unsupported LED mode %d\n", sc->sc_strategy); 3609 /* never reach */ 3610 } 3611 3612 return (error); 3613} 3614 3615static usb_error_t 3616urtw_led_mode0(struct urtw_softc *sc, int mode) 3617{ 3618 3619 switch (mode) { 3620 case URTW_LED_CTL_POWER_ON: 3621 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK; 3622 break; 3623 case URTW_LED_CTL_TX: 3624 if (sc->sc_gpio_ledinprogress == 1) 3625 return (0); 3626 3627 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL; 3628 sc->sc_gpio_blinktime = 2; 3629 break; 3630 case URTW_LED_CTL_LINK: 3631 sc->sc_gpio_ledstate = URTW_LED_ON; 3632 break; 3633 default: 3634 panic("unsupported LED mode 0x%x", mode); 3635 /* never reach */ 3636 } 3637 3638 switch (sc->sc_gpio_ledstate) { 3639 case URTW_LED_ON: 3640 if (sc->sc_gpio_ledinprogress != 0) 3641 break; 3642 urtw_led_on(sc, URTW_LED_GPIO); 3643 break; 3644 case URTW_LED_BLINK_NORMAL: 3645 if (sc->sc_gpio_ledinprogress != 0) 3646 break; 3647 sc->sc_gpio_ledinprogress = 1; 3648 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ? 3649 URTW_LED_OFF : URTW_LED_ON; 3650 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3651 break; 3652 case URTW_LED_POWER_ON_BLINK: 3653 urtw_led_on(sc, URTW_LED_GPIO); 3654 usb_pause_mtx(&sc->sc_mtx, 100); 3655 urtw_led_off(sc, URTW_LED_GPIO); 3656 break; 3657 default: 3658 panic("unknown LED status 0x%x", sc->sc_gpio_ledstate); 3659 /* never reach */ 3660 } 3661 return (0); 3662} 3663 3664static usb_error_t 3665urtw_led_mode1(struct urtw_softc *sc, int mode) 3666{ 3667 3668 return (USB_ERR_INVAL); 3669} 3670 3671static usb_error_t 3672urtw_led_mode2(struct urtw_softc *sc, int mode) 3673{ 3674 3675 return (USB_ERR_INVAL); 3676} 3677 3678static usb_error_t 3679urtw_led_mode3(struct urtw_softc *sc, int mode) 3680{ 3681 3682 return (USB_ERR_INVAL); 3683} 3684 3685static usb_error_t 3686urtw_led_on(struct urtw_softc *sc, int type) 3687{ 3688 usb_error_t error; 3689 3690 if (type == URTW_LED_GPIO) { 3691 switch (sc->sc_gpio_ledpin) { 3692 case URTW_LED_PIN_GPIO0: 3693 urtw_write8_m(sc, URTW_GPIO, 0x01); 3694 urtw_write8_m(sc, URTW_GP_ENABLE, 0x00); 3695 break; 3696 default: 3697 panic("unsupported LED PIN type 0x%x", 3698 sc->sc_gpio_ledpin); 3699 /* never reach */ 3700 } 3701 } else { 3702 panic("unsupported LED type 0x%x", type); 3703 /* never reach */ 3704 } 3705 3706 sc->sc_gpio_ledon = 1; 3707fail: 3708 return (error); 3709} 3710 3711static usb_error_t 3712urtw_led_off(struct urtw_softc *sc, int type) 3713{ 3714 usb_error_t error; 3715 3716 if (type == URTW_LED_GPIO) { 3717 switch (sc->sc_gpio_ledpin) { 3718 case URTW_LED_PIN_GPIO0: 3719 urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1); 3720 urtw_write8_m(sc, 3721 URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1); 3722 break; 3723 default: 3724 panic("unsupported LED PIN type 0x%x", 3725 sc->sc_gpio_ledpin); 3726 /* never reach */ 3727 } 3728 } else { 3729 panic("unsupported LED type 0x%x", type); 3730 /* never reach */ 3731 } 3732 3733 sc->sc_gpio_ledon = 0; 3734 3735fail: 3736 return (error); 3737} 3738 |
|
3862static void 3863urtw_led_ch(void *arg) 3864{ 3865 struct urtw_softc *sc = arg; 3866 struct ifnet *ifp = sc->sc_ifp; 3867 struct ieee80211com *ic = ifp->if_l2com; 3868 3869 ieee80211_runtask(ic, &sc->sc_led_task); 3870} | 3739static void 3740urtw_led_ch(void *arg) 3741{ 3742 struct urtw_softc *sc = arg; 3743 struct ifnet *ifp = sc->sc_ifp; 3744 struct ieee80211com *ic = ifp->if_l2com; 3745 3746 ieee80211_runtask(ic, &sc->sc_led_task); 3747} |
3748 |
|
3871static void | 3749static void |
3750urtw_ledtask(void *arg, int pending) 3751{ 3752 struct urtw_softc *sc = arg; 3753 3754 if (sc->sc_strategy != URTW_SW_LED_MODE0) 3755 panic("could not process a LED strategy 0x%x", sc->sc_strategy); 3756 3757 URTW_LOCK(sc); 3758 urtw_led_blink(sc); 3759 URTW_UNLOCK(sc); 3760} 3761 3762static usb_error_t 3763urtw_led_blink(struct urtw_softc *sc) 3764{ 3765 uint8_t ing = 0; 3766 usb_error_t error; 3767 3768 if (sc->sc_gpio_blinkstate == URTW_LED_ON) 3769 error = urtw_led_on(sc, URTW_LED_GPIO); 3770 else 3771 error = urtw_led_off(sc, URTW_LED_GPIO); 3772 sc->sc_gpio_blinktime--; 3773 if (sc->sc_gpio_blinktime == 0) 3774 ing = 1; 3775 else { 3776 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL && 3777 sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY && 3778 sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3) 3779 ing = 1; 3780 } 3781 if (ing == 1) { 3782 if (sc->sc_gpio_ledstate == URTW_LED_ON && 3783 sc->sc_gpio_ledon == 0) 3784 error = urtw_led_on(sc, URTW_LED_GPIO); 3785 else if (sc->sc_gpio_ledstate == URTW_LED_OFF && 3786 sc->sc_gpio_ledon == 1) 3787 error = urtw_led_off(sc, URTW_LED_GPIO); 3788 3789 sc->sc_gpio_blinktime = 0; 3790 sc->sc_gpio_ledinprogress = 0; 3791 return (0); 3792 } 3793 3794 sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ? 3795 URTW_LED_ON : URTW_LED_OFF; 3796 3797 switch (sc->sc_gpio_ledstate) { 3798 case URTW_LED_BLINK_NORMAL: 3799 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3800 break; 3801 default: 3802 panic("unknown LED status 0x%x", sc->sc_gpio_ledstate); 3803 /* never reach */ 3804 } 3805 return (0); 3806} 3807 3808static usb_error_t 3809urtw_rx_enable(struct urtw_softc *sc) 3810{ 3811 uint8_t data; 3812 usb_error_t error; 3813 3814 usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ? 3815 sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]); 3816 3817 error = urtw_rx_setconf(sc); 3818 if (error != 0) 3819 goto fail; 3820 3821 urtw_read8_m(sc, URTW_CMD, &data); 3822 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE); 3823fail: 3824 return (error); 3825} 3826 3827static usb_error_t 3828urtw_tx_enable(struct urtw_softc *sc) 3829{ 3830 uint8_t data8; 3831 uint32_t data; 3832 usb_error_t error; 3833 3834 if (sc->sc_flags & URTW_RTL8187B) { 3835 urtw_read32_m(sc, URTW_TX_CONF, &data); 3836 data &= ~URTW_TX_LOOPBACK_MASK; 3837 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3838 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3839 data &= ~URTW_TX_SWPLCPLEN; 3840 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE | 3841 (7 << 8) | /* short retry limit */ 3842 (7 << 0) | /* long retry limit */ 3843 (7 << 21); /* MAX TX DMA */ 3844 urtw_write32_m(sc, URTW_TX_CONF, data); 3845 3846 urtw_read8_m(sc, URTW_CMD, &data8); 3847 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 3848 return (error); 3849 } 3850 3851 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3852 data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY); 3853 urtw_write8_m(sc, URTW_CW_CONF, data8); 3854 3855 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3856 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN; 3857 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 3858 data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT; 3859 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3860 3861 urtw_read32_m(sc, URTW_TX_CONF, &data); 3862 data &= ~URTW_TX_LOOPBACK_MASK; 3863 data |= URTW_TX_LOOPBACK_NONE; 3864 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3865 data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT; 3866 data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT; 3867 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3868 data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW; 3869 data &= ~URTW_TX_SWPLCPLEN; 3870 data |= URTW_TX_NOICV; 3871 urtw_write32_m(sc, URTW_TX_CONF, data); 3872 3873 urtw_read8_m(sc, URTW_CMD, &data8); 3874 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 3875fail: 3876 return (error); 3877} 3878 3879static usb_error_t 3880urtw_rx_setconf(struct urtw_softc *sc) 3881{ 3882 struct ifnet *ifp = sc->sc_ifp; 3883 struct ieee80211com *ic = ifp->if_l2com; 3884 uint32_t data; 3885 usb_error_t error; 3886 3887 urtw_read32_m(sc, URTW_RX, &data); 3888 data = data &~ URTW_RX_FILTER_MASK; 3889 if (sc->sc_flags & URTW_RTL8187B) { 3890 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA | 3891 URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST | 3892 URTW_RX_FILTER_NICMAC | URTW_RX_CHECK_BSSID | 3893 URTW_RX_FIFO_THRESHOLD_NONE | 3894 URTW_MAX_RX_DMA_2048 | 3895 URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT; 3896 } else { 3897 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA; 3898 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST; 3899 3900 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 3901 data = data | URTW_RX_FILTER_ICVERR; 3902 data = data | URTW_RX_FILTER_PWR; 3903 } 3904 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR) 3905 data = data | URTW_RX_FILTER_CRCERR; 3906 3907 if (ic->ic_opmode == IEEE80211_M_MONITOR || 3908 (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) { 3909 data = data | URTW_RX_FILTER_ALLMAC; 3910 } else { 3911 data = data | URTW_RX_FILTER_NICMAC; 3912 data = data | URTW_RX_CHECK_BSSID; 3913 } 3914 3915 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK; 3916 data = data | URTW_RX_FIFO_THRESHOLD_NONE | 3917 URTW_RX_AUTORESETPHY; 3918 data = data &~ URTW_MAX_RX_DMA_MASK; 3919 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT; 3920 } 3921 3922 urtw_write32_m(sc, URTW_RX, data); 3923fail: 3924 return (error); 3925} 3926 3927static struct mbuf * 3928urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p, 3929 int8_t *nf_p) 3930{ 3931 int actlen, flen, len, nf = -95, rssi; 3932 struct ieee80211_frame *wh; 3933 struct mbuf *m, *mnew; 3934 struct urtw_8187b_rxhdr *bhdr; 3935 struct urtw_softc *sc = data->sc; 3936 struct ifnet *ifp = sc->sc_ifp; 3937 struct ieee80211com *ic = ifp->if_l2com; 3938 uint8_t *desc, quality = 0, rate; 3939 3940 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 3941 3942 if (actlen < URTW_MIN_RXBUFSZ) { 3943 ifp->if_ierrors++; 3944 return (NULL); 3945 } 3946 3947 if (sc->sc_flags & URTW_RTL8187B) { 3948 len = actlen - (sizeof(struct urtw_8187b_rxhdr)); 3949 bhdr = (struct urtw_8187b_rxhdr *)(data->buf + len); 3950 desc = data->buf + len; 3951 flen = ((desc[1] & 0x0f) << 8) + (desc[0] & 0xff); 3952 if (flen > actlen) { 3953 ifp->if_ierrors++; 3954 return (NULL); 3955 } 3956 rate = (le32toh(bhdr->flags) >> 20) & 0xf; 3957 rssi = 14 + (bhdr->rssi / 2); 3958 if (rssi > 95) 3959 rssi = 95; 3960 } else { 3961 /* 4 dword and 4 byte CRC */ 3962 len = actlen - (4 * 4); 3963 desc = data->buf + len; 3964 flen = ((desc[1] & 0x0f) << 8) + (desc[0] & 0xff); 3965 if (flen > actlen) { 3966 ifp->if_ierrors++; 3967 return (NULL); 3968 } 3969 3970 rate = (desc[2] & 0xf0) >> 4; 3971 quality = desc[4] & 0xff; 3972 /* XXX correct? */ 3973 rssi = (desc[6] & 0xfe) >> 1; 3974 if (!urtw_isbmode(rate)) { 3975 rssi = (rssi > 90) ? 90 : ((rssi < 25) ? 25 : rssi); 3976 rssi = ((90 - rssi) * 100) / 65; 3977 } else { 3978 rssi = (rssi > 90) ? 95 : ((rssi < 30) ? 30 : rssi); 3979 rssi = ((95 - rssi) * 100) / 65; 3980 } 3981 } 3982 3983 mnew = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 3984 if (mnew == NULL) { 3985 ifp->if_ierrors++; 3986 return (NULL); 3987 } 3988 3989 m = data->m; 3990 data->m = mnew; 3991 data->buf = mtod(mnew, uint8_t *); 3992 3993 /* finalize mbuf */ 3994 m->m_pkthdr.rcvif = ifp; 3995 m->m_pkthdr.len = m->m_len = flen - 4; 3996 3997 if (ieee80211_radiotap_active(ic)) { 3998 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap; 3999 4000 /* XXX Are variables correct? */ 4001 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 4002 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 4003 tap->wr_dbm_antsignal = (int8_t)rssi; 4004 } 4005 4006 wh = mtod(m, struct ieee80211_frame *); 4007 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA) 4008 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate; 4009 /* XXX correct? */ 4010 if ((sc->sc_flags & URTW_RTL8187B) == 0) 4011 nf = (quality > 64) ? 0 : ((64 - quality) * 100) / 64; 4012 4013 *rssi_p = rssi; 4014 *nf_p = nf; 4015 4016 return (m); 4017} 4018 4019static void |
|
3872urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 3873{ 3874 struct urtw_softc *sc = usbd_xfer_softc(xfer); 3875 struct ifnet *ifp = sc->sc_ifp; 3876 struct ieee80211com *ic = ifp->if_l2com; 3877 struct ieee80211_frame *wh; 3878 struct ieee80211_node *ni; 3879 struct mbuf *m = NULL; --- 173 unchanged lines hidden (view full) --- 4053 struct ifnet *ifp = sc->sc_ifp; 4054 4055 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__); 4056 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 4057 } 4058 return (bf); 4059} 4060 | 4020urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 4021{ 4022 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4023 struct ifnet *ifp = sc->sc_ifp; 4024 struct ieee80211com *ic = ifp->if_l2com; 4025 struct ieee80211_frame *wh; 4026 struct ieee80211_node *ni; 4027 struct mbuf *m = NULL; --- 173 unchanged lines hidden (view full) --- 4201 struct ifnet *ifp = sc->sc_ifp; 4202 4203 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__); 4204 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 4205 } 4206 return (bf); 4207} 4208 |
4061static usb_error_t 4062urtw_8225v2b_rf_init(struct urtw_softc *sc) | 4209static int 4210urtw_isbmode(uint16_t rate) |
4063{ | 4211{ |
4064 int i; 4065 usb_error_t error; | |
4066 | 4212 |
4067 for (i = 0; i < nitems(urtw_8225v2b_rf_part1); i++) 4068 urtw_8225_write(sc, urtw_8225v2b_rf_part1[i].reg, 4069 urtw_8225v2b_rf_part1[i].val); | 4213 rate = urtw_rtl2rate(rate); |
4070 | 4214 |
4071 urtw_8225_write(sc, 4072 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 4073 4074 for (i = 0; i < nitems(urtw_8225v2b_rxgain); i++) { 4075 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 4076 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 4077 urtw_8225v2b_rxgain[i]); 4078 } 4079 4080 urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080); 4081 urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004); 4082 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7); 4083 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d); 4084 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d); 4085 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf); 4086 4087 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03); 4088 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07); 4089 urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03); 4090 4091 urtw_8187_write_phy_ofdm(sc, 0x80, 0x12); 4092 for (i = 0; i < nitems(urtw_8225z2_agc); i++) { 4093 urtw_8187_write_phy_ofdm(sc, 0xf, urtw_8225z2_agc[i]); 4094 urtw_8187_write_phy_ofdm(sc, 0xe, 0x80 + i); 4095 urtw_8187_write_phy_ofdm(sc, 0xe, 0); 4096 } 4097 urtw_8187_write_phy_ofdm(sc, 0x80, 0x10); 4098 4099 for (i = 0; i < nitems(urtw_8225v2b_rf_part2); i++) 4100 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val); 4101 4102 urtw_write32_m(sc, 0xf0, (7 << 12) | (3 << 8) | 0x1c); 4103 urtw_write32_m(sc, 0xf4, (7 << 12) | (3 << 8) | 0x1c); 4104 urtw_write32_m(sc, 0xf8, (7 << 12) | (3 << 8) | 0x1c); 4105 urtw_write32_m(sc, 0xfc, (7 << 12) | (3 << 8) | 0x1c); 4106 urtw_write8_m(sc, URTW_ACM_CONTROL, 0); 4107 4108 urtw_8187_write_phy_ofdm(sc, 0x97, 0x46); 4109 urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6); 4110 urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc); 4111 urtw_8187_write_phy_cck(sc, 0xc1, 0x88); 4112fail: 4113 return (error); | 4215 return ((rate <= 22 && rate != 12 && rate != 18) || 4216 rate == 44) ? (1) : (0); |
4114} 4115 | 4217} 4218 |
4116 4117static usb_error_t 4118urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan) 4119{ 4120 int ack; 4121 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 4122 usb_error_t error; 4123 4124 error = urtw_8225v2b_set_txpwrlvl(sc, chan); 4125 if (error) 4126 goto fail; 4127 4128 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 4129 usb_pause_mtx(&sc->sc_mtx, 10); 4130 4131 urtw_write8_m(sc, URTW_SIFS, 0xa); 4132 if (ic->ic_flags & IEEE80211_F_SHSLOT) { 4133 urtw_write8_m(sc, URTW_SLOT, 0x9); 4134 urtw_write8_m(sc, URTW_DIFS, 0x1c); 4135 /* In 8187B, BRSR + 1 ==> EIFS register */ 4136 urtw_write8_m(sc, URTW_BRSR + 1, 0x53); 4137 4138 ack = 112 + 48 + 0x1c; 4139 ack += (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 4140 72 : 144; 4141 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 4142 roundup2(ack, 4)); 4143 } else { 4144 urtw_write8_m(sc, URTW_SLOT, 0x14); 4145 urtw_write8_m(sc, URTW_DIFS, 0x32); 4146 /* In 8187B, BRSR + 1 ==> EIFS register */ 4147 urtw_write8_m(sc, URTW_BRSR + 1, 0x5b); 4148 4149 ack = 112 + 48 + 0x32; 4150 ack += (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 4151 72 : 144; 4152 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 4153 roundup2(ack, 4)); 4154 4155 } 4156 4157fail: 4158 return (error); 4159} 4160 4161static usb_error_t 4162urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan) 4163{ 4164 int i; 4165 uint8_t *cck_pwrtable; 4166 uint8_t cck_pwrlvl_max = 15; 4167 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 4168 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 4169 usb_error_t error; 4170 4171 /* CCK power setting */ 4172 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? 4173 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) : 4174 (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7)); 4175 cck_pwrlvl += sc->sc_txpwr_cck_base; 4176 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 4177 cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 : 4178 urtw_8225v2b_txpwr_cck; 4179 4180 if (sc->sc_flags & URTW_RTL8187B_REV_B) 4181 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 : 4182 ((cck_pwrlvl <= 11) ? 8 : 16); 4183 else 4184 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 : 4185 ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24)); 4186 4187 for (i = 0; i < 8; i++) 4188 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 4189 4190 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 4191 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1); 4192 usb_pause_mtx(&sc->sc_mtx, 1); 4193 4194 /* OFDM power setting */ 4195 ofdm_pwrlvl = (ofdm_pwrlvl > 15) ? 4196 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) : 4197 (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10)); 4198 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 4199 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 4200 4201 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 4202 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1); 4203 4204 if (sc->sc_flags & URTW_RTL8187B_REV_B) { 4205 if (ofdm_pwrlvl <= 11) { 4206 urtw_8187_write_phy_ofdm(sc, 0x87, 0x60); 4207 urtw_8187_write_phy_ofdm(sc, 0x89, 0x60); 4208 } else { 4209 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 4210 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 4211 } 4212 } else { 4213 if (ofdm_pwrlvl <= 11) { 4214 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 4215 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 4216 } else if (ofdm_pwrlvl <= 17) { 4217 urtw_8187_write_phy_ofdm(sc, 0x87, 0x54); 4218 urtw_8187_write_phy_ofdm(sc, 0x89, 0x54); 4219 } else { 4220 urtw_8187_write_phy_ofdm(sc, 0x87, 0x50); 4221 urtw_8187_write_phy_ofdm(sc, 0x89, 0x50); 4222 } 4223 } 4224 usb_pause_mtx(&sc->sc_mtx, 1); 4225fail: 4226 return (error); 4227} 4228 4229 | |
4230static device_method_t urtw_methods[] = { 4231 DEVMETHOD(device_probe, urtw_match), 4232 DEVMETHOD(device_attach, urtw_attach), 4233 DEVMETHOD(device_detach, urtw_detach), 4234 { 0, 0 } 4235}; 4236static driver_t urtw_driver = { 4237 "urtw", 4238 urtw_methods, 4239 sizeof(struct urtw_softc) 4240}; 4241static devclass_t urtw_devclass; 4242 4243DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0); 4244MODULE_DEPEND(urtw, wlan, 1, 1, 1); 4245MODULE_DEPEND(urtw, usb, 1, 1, 1); | 4219static device_method_t urtw_methods[] = { 4220 DEVMETHOD(device_probe, urtw_match), 4221 DEVMETHOD(device_attach, urtw_attach), 4222 DEVMETHOD(device_detach, urtw_detach), 4223 { 0, 0 } 4224}; 4225static driver_t urtw_driver = { 4226 "urtw", 4227 urtw_methods, 4228 sizeof(struct urtw_softc) 4229}; 4230static devclass_t urtw_devclass; 4231 4232DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0); 4233MODULE_DEPEND(urtw, wlan, 1, 1, 1); 4234MODULE_DEPEND(urtw, usb, 1, 1, 1); |