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ohci.c (184610) ohci.c (184824)
1/*-
2 * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
3 * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
4 * Copyright (c) 1998 Lennart Augustsson. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

--- 12 unchanged lines hidden (view full) ---

21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
3 * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
4 * Copyright (c) 1998 Lennart Augustsson. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

--- 12 unchanged lines hidden (view full) ---

21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD: head/sys/dev/usb2/controller/ohci2.c 184610 2008-11-04 02:31:03Z alfred $");
29__FBSDID("$FreeBSD: head/sys/dev/usb2/controller/ohci2.c 184824 2008-11-10 20:54:31Z thompsa $");
30
31/*
32 * USB Open Host Controller driver.
33 *
34 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
35 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
36 */
37

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168
169 /* Determine in what context we are running. */
170 ctl = OREAD4(sc, OHCI_CONTROL);
171 if (ctl & OHCI_IR) {
172 /* SMM active, request change */
173 DPRINTF("SMM active, request owner change\n");
174 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_OCR);
175 for (i = 0; (i < 100) && (ctl & OHCI_IR); i++) {
30
31/*
32 * USB Open Host Controller driver.
33 *
34 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
35 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
36 */
37

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168
169 /* Determine in what context we are running. */
170 ctl = OREAD4(sc, OHCI_CONTROL);
171 if (ctl & OHCI_IR) {
172 /* SMM active, request change */
173 DPRINTF("SMM active, request owner change\n");
174 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_OCR);
175 for (i = 0; (i < 100) && (ctl & OHCI_IR); i++) {
176 usb2_pause_mtx(&sc->sc_bus.mtx, 1);
176 usb2_pause_mtx(&sc->sc_bus.bus_mtx, 1);
177 ctl = OREAD4(sc, OHCI_CONTROL);
178 }
179 if (ctl & OHCI_IR) {
180 device_printf(sc->sc_bus.bdev,
181 "SMM does not respond, resetting\n");
182 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
183 goto reset;
184 }
185 } else {
186 DPRINTF("cold started\n");
187reset:
188 /* controller was cold started */
177 ctl = OREAD4(sc, OHCI_CONTROL);
178 }
179 if (ctl & OHCI_IR) {
180 device_printf(sc->sc_bus.bdev,
181 "SMM does not respond, resetting\n");
182 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
183 goto reset;
184 }
185 } else {
186 DPRINTF("cold started\n");
187reset:
188 /* controller was cold started */
189 usb2_pause_mtx(&sc->sc_bus.mtx,
189 usb2_pause_mtx(&sc->sc_bus.bus_mtx,
190 USB_BUS_RESET_DELAY);
191 }
192
193 /*
194 * This reset should not be necessary according to the OHCI spec, but
195 * without it some controllers do not start.
196 */
197 DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
198 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
199
190 USB_BUS_RESET_DELAY);
191 }
192
193 /*
194 * This reset should not be necessary according to the OHCI spec, but
195 * without it some controllers do not start.
196 */
197 DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
198 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
199
200 usb2_pause_mtx(&sc->sc_bus.mtx,
200 usb2_pause_mtx(&sc->sc_bus.bus_mtx,
201 USB_BUS_RESET_DELAY);
202
203 /* we now own the host controller and the bus has been reset */
204 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
205
206 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
207 /* nominal time for a reset is 10 us */
208 for (i = 0; i < 10; i++) {

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255 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
256 per = OHCI_PERIODIC(ival); /* 90% periodic */
257 OWRITE4(sc, OHCI_PERIODIC_START, per);
258
259 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
260 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
261 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
262 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
201 USB_BUS_RESET_DELAY);
202
203 /* we now own the host controller and the bus has been reset */
204 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
205
206 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
207 /* nominal time for a reset is 10 us */
208 for (i = 0; i < 10; i++) {

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255 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
256 per = OHCI_PERIODIC(ival); /* 90% periodic */
257 OWRITE4(sc, OHCI_PERIODIC_START, per);
258
259 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
260 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
261 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
262 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
263 usb2_pause_mtx(&sc->sc_bus.mtx,
263 usb2_pause_mtx(&sc->sc_bus.bus_mtx,
264 OHCI_ENABLE_POWER_DELAY);
265 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
266
267 /*
268 * The AMD756 requires a delay before re-reading the register,
269 * otherwise it will occasionally report 0 ports.
270 */
271 sc->sc_noport = 0;
272 for (i = 0; (i < 10) && (sc->sc_noport == 0); i++) {
264 OHCI_ENABLE_POWER_DELAY);
265 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
266
267 /*
268 * The AMD756 requires a delay before re-reading the register,
269 * otherwise it will occasionally report 0 ports.
270 */
271 sc->sc_noport = 0;
272 for (i = 0; (i < 10) && (sc->sc_noport == 0); i++) {
273 usb2_pause_mtx(&sc->sc_bus.mtx,
273 usb2_pause_mtx(&sc->sc_bus.bus_mtx,
274 OHCI_READ_DESC_DELAY);
275 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
276 }
277
278#if USB_DEBUG
279 if (ohcidebug > 5) {
280 ohci_dumpregs(sc);
281 }

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304ohci_init(ohci_softc_t *sc)
305{
306 struct usb2_page_search buf_res;
307 uint16_t i;
308 uint16_t bit;
309 uint16_t x;
310 uint16_t y;
311
274 OHCI_READ_DESC_DELAY);
275 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
276 }
277
278#if USB_DEBUG
279 if (ohcidebug > 5) {
280 ohci_dumpregs(sc);
281 }

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304ohci_init(ohci_softc_t *sc)
305{
306 struct usb2_page_search buf_res;
307 uint16_t i;
308 uint16_t bit;
309 uint16_t x;
310 uint16_t y;
311
312 mtx_lock(&sc->sc_bus.mtx);
312 USB_BUS_LOCK(&sc->sc_bus);
313
314 DPRINTF("start\n");
315
316 sc->sc_eintrs = OHCI_NORMAL_INTRS;
317
318 /*
319 * Setup all ED's
320 */

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386 }
387 /* flush all cache into memory */
388
389 usb2_bus_mem_flush_all(&sc->sc_bus, &ohci_iterate_hw_softc);
390
391 /* set up the bus struct */
392 sc->sc_bus.methods = &ohci_bus_methods;
393
313
314 DPRINTF("start\n");
315
316 sc->sc_eintrs = OHCI_NORMAL_INTRS;
317
318 /*
319 * Setup all ED's
320 */

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386 }
387 /* flush all cache into memory */
388
389 usb2_bus_mem_flush_all(&sc->sc_bus, &ohci_iterate_hw_softc);
390
391 /* set up the bus struct */
392 sc->sc_bus.methods = &ohci_bus_methods;
393
394 usb2_callout_init_mtx(&sc->sc_tmo_rhsc, &sc->sc_bus.mtx,
394 usb2_callout_init_mtx(&sc->sc_tmo_rhsc, &sc->sc_bus.bus_mtx,
395 CALLOUT_RETURNUNLOCKED);
396
397#if USB_DEBUG
398 if (ohcidebug > 15) {
399 for (i = 0; i != OHCI_NO_EDS; i++) {
400 printf("ed#%d ", i);
401 ohci_dump_ed(sc->sc_intr_p_last[i]);
402 }
403 printf("iso ");
404 ohci_dump_ed(sc->sc_isoc_p_last);
405 }
406#endif
407
408 sc->sc_bus.usbrev = USB_REV_1_0;
409
410 if (ohci_controller_init(sc)) {
395 CALLOUT_RETURNUNLOCKED);
396
397#if USB_DEBUG
398 if (ohcidebug > 15) {
399 for (i = 0; i != OHCI_NO_EDS; i++) {
400 printf("ed#%d ", i);
401 ohci_dump_ed(sc->sc_intr_p_last[i]);
402 }
403 printf("iso ");
404 ohci_dump_ed(sc->sc_isoc_p_last);
405 }
406#endif
407
408 sc->sc_bus.usbrev = USB_REV_1_0;
409
410 if (ohci_controller_init(sc)) {
411 mtx_unlock(&sc->sc_bus.mtx);
411 USB_BUS_UNLOCK(&sc->sc_bus);
412 return (USB_ERR_INVAL);
413 } else {
412 return (USB_ERR_INVAL);
413 } else {
414 mtx_unlock(&sc->sc_bus.mtx);
414 USB_BUS_UNLOCK(&sc->sc_bus);
415 /* catch any lost interrupts */
416 ohci_do_poll(&sc->sc_bus);
417 return (USB_ERR_NORMAL_COMPLETION);
418 }
419}
420
421/*
422 * shut down the controller when the system is going down
423 */
424void
425ohci_detach(struct ohci_softc *sc)
426{
415 /* catch any lost interrupts */
416 ohci_do_poll(&sc->sc_bus);
417 return (USB_ERR_NORMAL_COMPLETION);
418 }
419}
420
421/*
422 * shut down the controller when the system is going down
423 */
424void
425ohci_detach(struct ohci_softc *sc)
426{
427 mtx_lock(&sc->sc_bus.mtx);
427 USB_BUS_LOCK(&sc->sc_bus);
428
429 usb2_callout_stop(&sc->sc_tmo_rhsc);
430
431 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
432 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
433
434 /* XXX let stray task complete */
428
429 usb2_callout_stop(&sc->sc_tmo_rhsc);
430
431 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
432 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
433
434 /* XXX let stray task complete */
435 usb2_pause_mtx(&sc->sc_bus.mtx, 50);
435 usb2_pause_mtx(&sc->sc_bus.bus_mtx, 50);
436
436
437 mtx_unlock(&sc->sc_bus.mtx);
437 USB_BUS_UNLOCK(&sc->sc_bus);
438
439 usb2_callout_drain(&sc->sc_tmo_rhsc);
440
441 return;
442}
443
444/* NOTE: suspend/resume is called from
445 * interrupt context and cannot sleep!
446 */
447void
448ohci_suspend(ohci_softc_t *sc)
449{
450 uint32_t ctl;
451
438
439 usb2_callout_drain(&sc->sc_tmo_rhsc);
440
441 return;
442}
443
444/* NOTE: suspend/resume is called from
445 * interrupt context and cannot sleep!
446 */
447void
448ohci_suspend(ohci_softc_t *sc)
449{
450 uint32_t ctl;
451
452 mtx_lock(&sc->sc_bus.mtx);
452 USB_BUS_LOCK(&sc->sc_bus);
453
454#if USB_DEBUG
455 DPRINTF("\n");
456 if (ohcidebug > 2) {
457 ohci_dumpregs(sc);
458 }
459#endif
460

--- 4 unchanged lines hidden (view full) ---

465 * does not recover them.
466 */
467 sc->sc_control = ctl;
468 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
469 }
470 ctl |= OHCI_HCFS_SUSPEND;
471 OWRITE4(sc, OHCI_CONTROL, ctl);
472
453
454#if USB_DEBUG
455 DPRINTF("\n");
456 if (ohcidebug > 2) {
457 ohci_dumpregs(sc);
458 }
459#endif
460

--- 4 unchanged lines hidden (view full) ---

465 * does not recover them.
466 */
467 sc->sc_control = ctl;
468 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
469 }
470 ctl |= OHCI_HCFS_SUSPEND;
471 OWRITE4(sc, OHCI_CONTROL, ctl);
472
473 usb2_pause_mtx(&sc->sc_bus.mtx,
473 usb2_pause_mtx(&sc->sc_bus.bus_mtx,
474 USB_RESUME_WAIT);
475
474 USB_RESUME_WAIT);
475
476 mtx_unlock(&sc->sc_bus.mtx);
476 USB_BUS_UNLOCK(&sc->sc_bus);
477 return;
478}
479
480void
481ohci_resume(ohci_softc_t *sc)
482{
483 uint32_t ctl;
484
477 return;
478}
479
480void
481ohci_resume(ohci_softc_t *sc)
482{
483 uint32_t ctl;
484
485 mtx_lock(&sc->sc_bus.mtx);
485 USB_BUS_LOCK(&sc->sc_bus);
486
487#if USB_DEBUG
488 DPRINTF("\n");
489 if (ohcidebug > 2) {
490 ohci_dumpregs(sc);
491 }
492#endif
493 /* some broken BIOSes never initialize the Controller chip */

--- 4 unchanged lines hidden (view full) ---

498 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
499 }
500 if (sc->sc_control)
501 ctl = sc->sc_control;
502 else
503 ctl = OREAD4(sc, OHCI_CONTROL);
504 ctl |= OHCI_HCFS_RESUME;
505 OWRITE4(sc, OHCI_CONTROL, ctl);
486
487#if USB_DEBUG
488 DPRINTF("\n");
489 if (ohcidebug > 2) {
490 ohci_dumpregs(sc);
491 }
492#endif
493 /* some broken BIOSes never initialize the Controller chip */

--- 4 unchanged lines hidden (view full) ---

498 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
499 }
500 if (sc->sc_control)
501 ctl = sc->sc_control;
502 else
503 ctl = OREAD4(sc, OHCI_CONTROL);
504 ctl |= OHCI_HCFS_RESUME;
505 OWRITE4(sc, OHCI_CONTROL, ctl);
506 usb2_pause_mtx(&sc->sc_bus.mtx, USB_RESUME_DELAY);
506 usb2_pause_mtx(&sc->sc_bus.bus_mtx, USB_RESUME_DELAY);
507 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
508 OWRITE4(sc, OHCI_CONTROL, ctl);
507 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
508 OWRITE4(sc, OHCI_CONTROL, ctl);
509 usb2_pause_mtx(&sc->sc_bus.mtx, USB_RESUME_RECOVERY);
509 usb2_pause_mtx(&sc->sc_bus.bus_mtx, USB_RESUME_RECOVERY);
510 sc->sc_control = sc->sc_intre = 0;
511
510 sc->sc_control = sc->sc_intre = 0;
511
512 mtx_unlock(&sc->sc_bus.mtx);
512 USB_BUS_UNLOCK(&sc->sc_bus);
513
514 /* catch any lost interrupts */
515 ohci_do_poll(&sc->sc_bus);
516
517 return;
518}
519
520#if USB_DEBUG

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694}
695
696#define OHCI_APPEND_QH(sed,td_self,last) (last) = _ohci_append_qh(sed,td_self,last)
697static ohci_ed_t *
698_ohci_append_qh(ohci_ed_t *sed, uint32_t td_self, ohci_ed_t *last)
699{
700 DPRINTFN(11, "%p to %p\n", sed, last);
701
513
514 /* catch any lost interrupts */
515 ohci_do_poll(&sc->sc_bus);
516
517 return;
518}
519
520#if USB_DEBUG

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694}
695
696#define OHCI_APPEND_QH(sed,td_self,last) (last) = _ohci_append_qh(sed,td_self,last)
697static ohci_ed_t *
698_ohci_append_qh(ohci_ed_t *sed, uint32_t td_self, ohci_ed_t *last)
699{
700 DPRINTFN(11, "%p to %p\n", sed, last);
701
702 /* (sc->sc_bus.mtx) must be locked */
702 /* (sc->sc_bus.bus_mtx) must be locked */
703
704 sed->next = last->next;
705 sed->ed_next = last->ed_next;
706 sed->ed_tailp = 0;
707 sed->ed_headp = td_self;
708
709 sed->prev = last;
710

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723}
724
725#define OHCI_REMOVE_QH(sed,last) (last) = _ohci_remove_qh(sed,last)
726static ohci_ed_t *
727_ohci_remove_qh(ohci_ed_t *sed, ohci_ed_t *last)
728{
729 DPRINTFN(11, "%p from %p\n", sed, last);
730
703
704 sed->next = last->next;
705 sed->ed_next = last->ed_next;
706 sed->ed_tailp = 0;
707 sed->ed_headp = td_self;
708
709 sed->prev = last;
710

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723}
724
725#define OHCI_REMOVE_QH(sed,last) (last) = _ohci_remove_qh(sed,last)
726static ohci_ed_t *
727_ohci_remove_qh(ohci_ed_t *sed, ohci_ed_t *last)
728{
729 DPRINTFN(11, "%p from %p\n", sed, last);
730
731 /* (sc->sc_bus.mtx) must be locked */
731 /* (sc->sc_bus.bus_mtx) must be locked */
732
733 /* only remove if not removed from a queue */
734 if (sed->prev) {
735
736 sed->prev->next = sed->next;
737 sed->prev->ed_next = sed->ed_next;
738
739 usb2_pc_cpu_flush(sed->prev->page_cache);

--- 354 unchanged lines hidden (view full) ---

1094 return (0);
1095}
1096
1097static void
1098ohci_rhsc_enable(ohci_softc_t *sc)
1099{
1100 DPRINTFN(5, "\n");
1101
732
733 /* only remove if not removed from a queue */
734 if (sed->prev) {
735
736 sed->prev->next = sed->next;
737 sed->prev->ed_next = sed->ed_next;
738
739 usb2_pc_cpu_flush(sed->prev->page_cache);

--- 354 unchanged lines hidden (view full) ---

1094 return (0);
1095}
1096
1097static void
1098ohci_rhsc_enable(ohci_softc_t *sc)
1099{
1100 DPRINTFN(5, "\n");
1101
1102 mtx_assert(&sc->sc_bus.mtx, MA_OWNED);
1102 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1103
1104 sc->sc_eintrs |= OHCI_RHSC;
1105 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1106
1107 /* acknowledge any RHSC interrupt */
1108 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_RHSC);
1109
1110 usb2_sw_transfer(&sc->sc_root_intr,
1111 &ohci_root_intr_done);
1112
1103
1104 sc->sc_eintrs |= OHCI_RHSC;
1105 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1106
1107 /* acknowledge any RHSC interrupt */
1108 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_RHSC);
1109
1110 usb2_sw_transfer(&sc->sc_root_intr,
1111 &ohci_root_intr_done);
1112
1113 mtx_unlock(&sc->sc_bus.mtx);
1113 USB_BUS_UNLOCK(&sc->sc_bus);
1114 return;
1115}
1116
1117static void
1118ohci_interrupt_poll(ohci_softc_t *sc)
1119{
1120 struct usb2_xfer *xfer;
1121

--- 19 unchanged lines hidden (view full) ---

1141 *------------------------------------------------------------------------*/
1142void
1143ohci_interrupt(ohci_softc_t *sc)
1144{
1145 struct ohci_hcca *hcca;
1146 uint32_t status;
1147 uint32_t done;
1148
1114 return;
1115}
1116
1117static void
1118ohci_interrupt_poll(ohci_softc_t *sc)
1119{
1120 struct usb2_xfer *xfer;
1121

--- 19 unchanged lines hidden (view full) ---

1141 *------------------------------------------------------------------------*/
1142void
1143ohci_interrupt(ohci_softc_t *sc)
1144{
1145 struct ohci_hcca *hcca;
1146 uint32_t status;
1147 uint32_t done;
1148
1149 mtx_lock(&sc->sc_bus.mtx);
1149 USB_BUS_LOCK(&sc->sc_bus);
1150
1151 hcca = ohci_get_hcca(sc);
1152
1153 DPRINTFN(16, "real interrupt\n");
1154
1155#if USB_DEBUG
1156 if (ohcidebug > 15) {
1157 ohci_dumpregs(sc);

--- 83 unchanged lines hidden (view full) ---

1241 sc->sc_eintrs &= ~status;
1242 printf("%s: blocking intrs 0x%x\n",
1243 __FUNCTION__, status);
1244 }
1245 /* poll all the USB transfers */
1246 ohci_interrupt_poll(sc);
1247
1248done:
1150
1151 hcca = ohci_get_hcca(sc);
1152
1153 DPRINTFN(16, "real interrupt\n");
1154
1155#if USB_DEBUG
1156 if (ohcidebug > 15) {
1157 ohci_dumpregs(sc);

--- 83 unchanged lines hidden (view full) ---

1241 sc->sc_eintrs &= ~status;
1242 printf("%s: blocking intrs 0x%x\n",
1243 __FUNCTION__, status);
1244 }
1245 /* poll all the USB transfers */
1246 ohci_interrupt_poll(sc);
1247
1248done:
1249 mtx_unlock(&sc->sc_bus.mtx);
1249 USB_BUS_UNLOCK(&sc->sc_bus);
1250 return;
1251}
1252
1253/*
1254 * called when a request does not complete
1255 */
1256static void
1257ohci_timeout(void *arg)
1258{
1259 struct usb2_xfer *xfer = arg;
1260 ohci_softc_t *sc = xfer->usb2_sc;
1261
1262 DPRINTF("xfer=%p\n", xfer);
1263
1250 return;
1251}
1252
1253/*
1254 * called when a request does not complete
1255 */
1256static void
1257ohci_timeout(void *arg)
1258{
1259 struct usb2_xfer *xfer = arg;
1260 ohci_softc_t *sc = xfer->usb2_sc;
1261
1262 DPRINTF("xfer=%p\n", xfer);
1263
1264 mtx_assert(&sc->sc_bus.mtx, MA_OWNED);
1264 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1265
1266 /* transfer is transferred */
1267 ohci_device_done(xfer, USB_ERR_TIMEOUT);
1268
1265
1266 /* transfer is transferred */
1267 ohci_device_done(xfer, USB_ERR_TIMEOUT);
1268
1269 mtx_unlock(&sc->sc_bus.mtx);
1269 USB_BUS_UNLOCK(&sc->sc_bus);
1270
1271 return;
1272}
1273
1274static void
1275ohci_do_poll(struct usb2_bus *bus)
1276{
1277 struct ohci_softc *sc = OHCI_BUS2SC(bus);
1278
1270
1271 return;
1272}
1273
1274static void
1275ohci_do_poll(struct usb2_bus *bus)
1276{
1277 struct ohci_softc *sc = OHCI_BUS2SC(bus);
1278
1279 mtx_lock(&sc->sc_bus.mtx);
1279 USB_BUS_LOCK(&sc->sc_bus);
1280 ohci_interrupt_poll(sc);
1281 ohci_root_ctrl_poll(sc);
1280 ohci_interrupt_poll(sc);
1281 ohci_root_ctrl_poll(sc);
1282 mtx_unlock(&sc->sc_bus.mtx);
1282 USB_BUS_UNLOCK(&sc->sc_bus);
1283 return;
1284}
1285
1286static void
1287ohci_setup_standard_chain_sub(struct ohci_std_temp *temp)
1288{
1289 struct usb2_page_search buf_res;
1290 ohci_td_t *td;

--- 321 unchanged lines hidden (view full) ---

1612ohci_root_intr_done(struct usb2_xfer *xfer,
1613 struct usb2_sw_transfer *std)
1614{
1615 ohci_softc_t *sc = xfer->usb2_sc;
1616 uint32_t hstatus;
1617 uint16_t i;
1618 uint16_t m;
1619
1283 return;
1284}
1285
1286static void
1287ohci_setup_standard_chain_sub(struct ohci_std_temp *temp)
1288{
1289 struct usb2_page_search buf_res;
1290 ohci_td_t *td;

--- 321 unchanged lines hidden (view full) ---

1612ohci_root_intr_done(struct usb2_xfer *xfer,
1613 struct usb2_sw_transfer *std)
1614{
1615 ohci_softc_t *sc = xfer->usb2_sc;
1616 uint32_t hstatus;
1617 uint16_t i;
1618 uint16_t m;
1619
1620 mtx_assert(&sc->sc_bus.mtx, MA_OWNED);
1620 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1621
1622 if (std->state != USB_SW_TR_PRE_DATA) {
1623 if (std->state == USB_SW_TR_PRE_CALLBACK) {
1624 /* transfer transferred */
1625 ohci_device_done(xfer, std->err);
1626 }
1627 goto done;
1628 }

--- 29 unchanged lines hidden (view full) ---

1658 */
1659static void
1660ohci_device_done(struct usb2_xfer *xfer, usb2_error_t error)
1661{
1662 struct usb2_pipe_methods *methods = xfer->pipe->methods;
1663 ohci_softc_t *sc = xfer->usb2_sc;
1664 ohci_ed_t *ed;
1665
1621
1622 if (std->state != USB_SW_TR_PRE_DATA) {
1623 if (std->state == USB_SW_TR_PRE_CALLBACK) {
1624 /* transfer transferred */
1625 ohci_device_done(xfer, std->err);
1626 }
1627 goto done;
1628 }

--- 29 unchanged lines hidden (view full) ---

1658 */
1659static void
1660ohci_device_done(struct usb2_xfer *xfer, usb2_error_t error)
1661{
1662 struct usb2_pipe_methods *methods = xfer->pipe->methods;
1663 ohci_softc_t *sc = xfer->usb2_sc;
1664 ohci_ed_t *ed;
1665
1666 mtx_assert(&sc->sc_bus.mtx, MA_OWNED);
1666 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1667
1668
1669 DPRINTFN(2, "xfer=%p, pipe=%p, error=%d\n",
1670 xfer, xfer->pipe, error);
1671
1672 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1673 if (ed) {
1674 usb2_pc_cpu_invalidate(ed->page_cache);

--- 518 unchanged lines hidden (view full) ---

2193 char *ptr;
2194 uint32_t port;
2195 uint32_t v;
2196 uint16_t value;
2197 uint16_t index;
2198 uint8_t l;
2199 uint8_t use_polling;
2200
1667
1668
1669 DPRINTFN(2, "xfer=%p, pipe=%p, error=%d\n",
1670 xfer, xfer->pipe, error);
1671
1672 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1673 if (ed) {
1674 usb2_pc_cpu_invalidate(ed->page_cache);

--- 518 unchanged lines hidden (view full) ---

2193 char *ptr;
2194 uint32_t port;
2195 uint32_t v;
2196 uint16_t value;
2197 uint16_t index;
2198 uint8_t l;
2199 uint8_t use_polling;
2200
2201 mtx_assert(&sc->sc_bus.mtx, MA_OWNED);
2201 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2202
2203 if (std->state != USB_SW_TR_SETUP) {
2204 if (std->state == USB_SW_TR_PRE_CALLBACK) {
2205 /* transfer transferred */
2206 ohci_device_done(xfer, std->err);
2207 }
2208 goto done;
2209 }
2210 /* buffer reset */
2211 std->ptr = sc->sc_hub_desc.temp;
2212 std->len = 0;
2213
2214 value = UGETW(std->req.wValue);
2215 index = UGETW(std->req.wIndex);
2216
2202
2203 if (std->state != USB_SW_TR_SETUP) {
2204 if (std->state == USB_SW_TR_PRE_CALLBACK) {
2205 /* transfer transferred */
2206 ohci_device_done(xfer, std->err);
2207 }
2208 goto done;
2209 }
2210 /* buffer reset */
2211 std->ptr = sc->sc_hub_desc.temp;
2212 std->len = 0;
2213
2214 value = UGETW(std->req.wValue);
2215 index = UGETW(std->req.wIndex);
2216
2217 use_polling = mtx_owned(xfer->priv_mtx) ? 1 : 0;
2217 use_polling = mtx_owned(xfer->xfer_mtx) ? 1 : 0;
2218
2219 DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
2220 "wValue=0x%04x wIndex=0x%04x\n",
2221 std->req.bmRequestType, std->req.bRequest,
2222 UGETW(std->req.wLength), value, index);
2223
2224#define C(x,y) ((x) | ((y) << 8))
2225 switch (C(std->req.bRequest, std->req.bmRequestType)) {

--- 144 unchanged lines hidden (view full) ---

2370 case UHF_C_PORT_CONNECTION:
2371 case UHF_C_PORT_ENABLE:
2372 case UHF_C_PORT_SUSPEND:
2373 case UHF_C_PORT_OVER_CURRENT:
2374 case UHF_C_PORT_RESET:
2375 /* enable RHSC interrupt if condition is cleared. */
2376 if ((OREAD4(sc, port) >> 16) == 0) {
2377 ohci_rhsc_enable(sc);
2218
2219 DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
2220 "wValue=0x%04x wIndex=0x%04x\n",
2221 std->req.bmRequestType, std->req.bRequest,
2222 UGETW(std->req.wLength), value, index);
2223
2224#define C(x,y) ((x) | ((y) << 8))
2225 switch (C(std->req.bRequest, std->req.bmRequestType)) {

--- 144 unchanged lines hidden (view full) ---

2370 case UHF_C_PORT_CONNECTION:
2371 case UHF_C_PORT_ENABLE:
2372 case UHF_C_PORT_SUSPEND:
2373 case UHF_C_PORT_OVER_CURRENT:
2374 case UHF_C_PORT_RESET:
2375 /* enable RHSC interrupt if condition is cleared. */
2376 if ((OREAD4(sc, port) >> 16) == 0) {
2377 ohci_rhsc_enable(sc);
2378 mtx_lock(&sc->sc_bus.mtx);
2378 USB_BUS_LOCK(&sc->sc_bus);
2379 }
2380 break;
2381 default:
2382 break;
2383 }
2384 break;
2385 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2386 if ((value & 0xff) != 0) {

--- 64 unchanged lines hidden (view full) ---

2451 DPRINTFN(6, "reset port %d\n", index);
2452 OWRITE4(sc, port, UPS_RESET);
2453 for (v = 0;; v++) {
2454 if (v < 12) {
2455 if (use_polling) {
2456 /* polling */
2457 DELAY(USB_PORT_ROOT_RESET_DELAY * 1000);
2458 } else {
2379 }
2380 break;
2381 default:
2382 break;
2383 }
2384 break;
2385 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2386 if ((value & 0xff) != 0) {

--- 64 unchanged lines hidden (view full) ---

2451 DPRINTFN(6, "reset port %d\n", index);
2452 OWRITE4(sc, port, UPS_RESET);
2453 for (v = 0;; v++) {
2454 if (v < 12) {
2455 if (use_polling) {
2456 /* polling */
2457 DELAY(USB_PORT_ROOT_RESET_DELAY * 1000);
2458 } else {
2459 usb2_pause_mtx(&sc->sc_bus.mtx,
2459 usb2_pause_mtx(&sc->sc_bus.bus_mtx,
2460 USB_PORT_ROOT_RESET_DELAY);
2461 }
2462
2463 if ((OREAD4(sc, port) & UPS_RESET) == 0) {
2464 break;
2465 }
2466 } else {
2467 std->err = USB_ERR_TIMEOUT;

--- 335 unchanged lines hidden ---
2460 USB_PORT_ROOT_RESET_DELAY);
2461 }
2462
2463 if ((OREAD4(sc, port) & UPS_RESET) == 0) {
2464 break;
2465 }
2466 } else {
2467 std->err = USB_ERR_TIMEOUT;

--- 335 unchanged lines hidden ---