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ehci.c (184610) ehci.c (184824)
1/*-
2 * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
3 * Copyright (c) 2004 The NetBSD Foundation, Inc. All rights reserved.
4 * Copyright (c) 2004 Lennart Augustsson. All rights reserved.
5 * Copyright (c) 2004 Charles M. Hannum. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

--- 30 unchanged lines hidden (view full) ---

39 */
40
41/*
42 * TODO:
43 * 1) command failures are not recovered correctly
44 */
45
46#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
3 * Copyright (c) 2004 The NetBSD Foundation, Inc. All rights reserved.
4 * Copyright (c) 2004 Lennart Augustsson. All rights reserved.
5 * Copyright (c) 2004 Charles M. Hannum. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

--- 30 unchanged lines hidden (view full) ---

39 */
40
41/*
42 * TODO:
43 * 1) command failures are not recovered correctly
44 */
45
46#include <sys/cdefs.h>
47__FBSDID("$FreeBSD: head/sys/dev/usb2/controller/ehci2.c 184610 2008-11-04 02:31:03Z alfred $");
47__FBSDID("$FreeBSD: head/sys/dev/usb2/controller/ehci2.c 184824 2008-11-10 20:54:31Z thompsa $");
48
49#include <dev/usb2/include/usb2_standard.h>
50#include <dev/usb2/include/usb2_mfunc.h>
51#include <dev/usb2/include/usb2_error.h>
52#include <dev/usb2/include/usb2_defs.h>
53
54#define USB_DEBUG_VAR ehcidebug
55#define usb2_config_td_cc ehci_config_copy

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159ehci_hc_reset(ehci_softc_t *sc)
160{
161 uint32_t hcr;
162 uint32_t n;
163
164 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
165
166 for (n = 0; n != 100; n++) {
48
49#include <dev/usb2/include/usb2_standard.h>
50#include <dev/usb2/include/usb2_mfunc.h>
51#include <dev/usb2/include/usb2_error.h>
52#include <dev/usb2/include/usb2_defs.h>
53
54#define USB_DEBUG_VAR ehcidebug
55#define usb2_config_td_cc ehci_config_copy

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159ehci_hc_reset(ehci_softc_t *sc)
160{
161 uint32_t hcr;
162 uint32_t n;
163
164 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
165
166 for (n = 0; n != 100; n++) {
167 usb2_pause_mtx(&sc->sc_bus.mtx, 1);
167 usb2_pause_mtx(&sc->sc_bus.bus_mtx, 1);
168 hcr = EOREAD4(sc, EHCI_USBSTS);
169 if (hcr & EHCI_STS_HCH) {
170 hcr = 0;
171 break;
172 }
173 }
174
175 /*
176 * Fall through and try reset anyway even though
177 * Table 2-9 in the EHCI spec says this will result
178 * in undefined behavior.
179 */
180
181 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
182 for (n = 0; n != 100; n++) {
168 hcr = EOREAD4(sc, EHCI_USBSTS);
169 if (hcr & EHCI_STS_HCH) {
170 hcr = 0;
171 break;
172 }
173 }
174
175 /*
176 * Fall through and try reset anyway even though
177 * Table 2-9 in the EHCI spec says this will result
178 * in undefined behavior.
179 */
180
181 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
182 for (n = 0; n != 100; n++) {
183 usb2_pause_mtx(&sc->sc_bus.mtx, 1);
183 usb2_pause_mtx(&sc->sc_bus.bus_mtx, 1);
184 hcr = EOREAD4(sc, EHCI_USBCMD);
185 if (!(hcr & EHCI_CMD_HCRESET)) {
186 hcr = 0;
187 break;
188 }
189 }
190
191 if (hcr) {

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203 uint32_t cparams;
204 uint32_t hcr;
205 uint16_t i;
206 uint16_t x;
207 uint16_t y;
208 uint16_t bit;
209 usb2_error_t err = 0;
210
184 hcr = EOREAD4(sc, EHCI_USBCMD);
185 if (!(hcr & EHCI_CMD_HCRESET)) {
186 hcr = 0;
187 break;
188 }
189 }
190
191 if (hcr) {

--- 11 unchanged lines hidden (view full) ---

203 uint32_t cparams;
204 uint32_t hcr;
205 uint16_t i;
206 uint16_t x;
207 uint16_t y;
208 uint16_t bit;
209 usb2_error_t err = 0;
210
211 mtx_lock(&sc->sc_bus.mtx);
211 USB_BUS_LOCK(&sc->sc_bus);
212
213 DPRINTF("start\n");
214
212
213 DPRINTF("start\n");
214
215 usb2_callout_init_mtx(&sc->sc_tmo_pcd, &sc->sc_bus.mtx,
215 usb2_callout_init_mtx(&sc->sc_tmo_pcd, &sc->sc_bus.bus_mtx,
216 CALLOUT_RETURNUNLOCKED);
217
218#if USB_DEBUG
219 if (ehcidebug > 2) {
220 ehci_dump_regs(sc);
221 }
222#endif
223

--- 236 unchanged lines hidden (view full) ---

460 EHCI_CMD_ASE |
461 EHCI_CMD_PSE |
462 EHCI_CMD_RS);
463
464 /* Take over port ownership */
465 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
466
467 for (i = 0; i < 100; i++) {
216 CALLOUT_RETURNUNLOCKED);
217
218#if USB_DEBUG
219 if (ehcidebug > 2) {
220 ehci_dump_regs(sc);
221 }
222#endif
223

--- 236 unchanged lines hidden (view full) ---

460 EHCI_CMD_ASE |
461 EHCI_CMD_PSE |
462 EHCI_CMD_RS);
463
464 /* Take over port ownership */
465 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
466
467 for (i = 0; i < 100; i++) {
468 usb2_pause_mtx(&sc->sc_bus.mtx, 1);
468 usb2_pause_mtx(&sc->sc_bus.bus_mtx, 1);
469 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
470 if (!hcr) {
471 break;
472 }
473 }
474 if (hcr) {
475 device_printf(sc->sc_bus.bdev, "run timeout\n");
476 err = USB_ERR_IOERROR;
477 goto done;
478 }
479done:
469 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
470 if (!hcr) {
471 break;
472 }
473 }
474 if (hcr) {
475 device_printf(sc->sc_bus.bdev, "run timeout\n");
476 err = USB_ERR_IOERROR;
477 goto done;
478 }
479done:
480 mtx_unlock(&sc->sc_bus.mtx);
480 USB_BUS_UNLOCK(&sc->sc_bus);
481
482 if (!err) {
483 /* catch any lost interrupts */
484 ehci_do_poll(&sc->sc_bus);
485 }
486 return (err);
487}
488
489/*
490 * shut down the controller when the system is going down
491 */
492void
493ehci_detach(struct ehci_softc *sc)
494{
481
482 if (!err) {
483 /* catch any lost interrupts */
484 ehci_do_poll(&sc->sc_bus);
485 }
486 return (err);
487}
488
489/*
490 * shut down the controller when the system is going down
491 */
492void
493ehci_detach(struct ehci_softc *sc)
494{
495 mtx_lock(&sc->sc_bus.mtx);
495 USB_BUS_LOCK(&sc->sc_bus);
496
497 usb2_callout_stop(&sc->sc_tmo_pcd);
498
499 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
500
501 if (ehci_hc_reset(sc)) {
502 DPRINTF("reset failed!\n");
503 }
504 /* XXX let stray task complete */
496
497 usb2_callout_stop(&sc->sc_tmo_pcd);
498
499 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
500
501 if (ehci_hc_reset(sc)) {
502 DPRINTF("reset failed!\n");
503 }
504 /* XXX let stray task complete */
505 usb2_pause_mtx(&sc->sc_bus.mtx, 50);
505 usb2_pause_mtx(&sc->sc_bus.bus_mtx, 50);
506
506
507 mtx_unlock(&sc->sc_bus.mtx);
507 USB_BUS_UNLOCK(&sc->sc_bus);
508
509 usb2_callout_drain(&sc->sc_tmo_pcd);
510
511 return;
512}
513
514void
515ehci_suspend(struct ehci_softc *sc)
516{
517 uint32_t cmd;
518 uint32_t hcr;
519 uint8_t i;
520
508
509 usb2_callout_drain(&sc->sc_tmo_pcd);
510
511 return;
512}
513
514void
515ehci_suspend(struct ehci_softc *sc)
516{
517 uint32_t cmd;
518 uint32_t hcr;
519 uint8_t i;
520
521 mtx_lock(&sc->sc_bus.mtx);
521 USB_BUS_LOCK(&sc->sc_bus);
522
523 for (i = 1; i <= sc->sc_noport; i++) {
524 cmd = EOREAD4(sc, EHCI_PORTSC(i));
525 if (((cmd & EHCI_PS_PO) == 0) &&
526 ((cmd & EHCI_PS_PE) == EHCI_PS_PE)) {
527 EOWRITE4(sc, EHCI_PORTSC(i),
528 cmd | EHCI_PS_SUSP);
529 }

--- 6 unchanged lines hidden (view full) ---

536
537 for (i = 0; i < 100; i++) {
538 hcr = EOREAD4(sc, EHCI_USBSTS) &
539 (EHCI_STS_ASS | EHCI_STS_PSS);
540
541 if (hcr == 0) {
542 break;
543 }
522
523 for (i = 1; i <= sc->sc_noport; i++) {
524 cmd = EOREAD4(sc, EHCI_PORTSC(i));
525 if (((cmd & EHCI_PS_PO) == 0) &&
526 ((cmd & EHCI_PS_PE) == EHCI_PS_PE)) {
527 EOWRITE4(sc, EHCI_PORTSC(i),
528 cmd | EHCI_PS_SUSP);
529 }

--- 6 unchanged lines hidden (view full) ---

536
537 for (i = 0; i < 100; i++) {
538 hcr = EOREAD4(sc, EHCI_USBSTS) &
539 (EHCI_STS_ASS | EHCI_STS_PSS);
540
541 if (hcr == 0) {
542 break;
543 }
544 usb2_pause_mtx(&sc->sc_bus.mtx, 1);
544 usb2_pause_mtx(&sc->sc_bus.bus_mtx, 1);
545 }
546
547 if (hcr != 0) {
548 device_printf(sc->sc_bus.bdev, "reset timeout\n");
549 }
550 cmd &= ~EHCI_CMD_RS;
551 EOWRITE4(sc, EHCI_USBCMD, cmd);
552
553 for (i = 0; i < 100; i++) {
554 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
555 if (hcr == EHCI_STS_HCH) {
556 break;
557 }
545 }
546
547 if (hcr != 0) {
548 device_printf(sc->sc_bus.bdev, "reset timeout\n");
549 }
550 cmd &= ~EHCI_CMD_RS;
551 EOWRITE4(sc, EHCI_USBCMD, cmd);
552
553 for (i = 0; i < 100; i++) {
554 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
555 if (hcr == EHCI_STS_HCH) {
556 break;
557 }
558 usb2_pause_mtx(&sc->sc_bus.mtx, 1);
558 usb2_pause_mtx(&sc->sc_bus.bus_mtx, 1);
559 }
560
561 if (hcr != EHCI_STS_HCH) {
562 device_printf(sc->sc_bus.bdev,
563 "config timeout\n");
564 }
559 }
560
561 if (hcr != EHCI_STS_HCH) {
562 device_printf(sc->sc_bus.bdev,
563 "config timeout\n");
564 }
565 mtx_unlock(&sc->sc_bus.mtx);
565 USB_BUS_UNLOCK(&sc->sc_bus);
566 return;
567}
568
569void
570ehci_resume(struct ehci_softc *sc)
571{
572 struct usb2_page_search buf_res;
573 uint32_t cmd;
574 uint32_t hcr;
575 uint8_t i;
576
566 return;
567}
568
569void
570ehci_resume(struct ehci_softc *sc)
571{
572 struct usb2_page_search buf_res;
573 uint32_t cmd;
574 uint32_t hcr;
575 uint8_t i;
576
577 mtx_lock(&sc->sc_bus.mtx);
577 USB_BUS_LOCK(&sc->sc_bus);
578
579 /* restore things in case the bios doesn't */
580 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
581
582 usb2_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
583 EOWRITE4(sc, EHCI_PERIODICLISTBASE, buf_res.physaddr);
584
585 usb2_get_page(&sc->sc_hw.async_start_pc, 0, &buf_res);

--- 8 unchanged lines hidden (view full) ---

594 ((cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)) {
595 EOWRITE4(sc, EHCI_PORTSC(i),
596 cmd | EHCI_PS_FPR);
597 hcr = 1;
598 }
599 }
600
601 if (hcr) {
578
579 /* restore things in case the bios doesn't */
580 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
581
582 usb2_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
583 EOWRITE4(sc, EHCI_PERIODICLISTBASE, buf_res.physaddr);
584
585 usb2_get_page(&sc->sc_hw.async_start_pc, 0, &buf_res);

--- 8 unchanged lines hidden (view full) ---

594 ((cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)) {
595 EOWRITE4(sc, EHCI_PORTSC(i),
596 cmd | EHCI_PS_FPR);
597 hcr = 1;
598 }
599 }
600
601 if (hcr) {
602 usb2_pause_mtx(&sc->sc_bus.mtx,
602 usb2_pause_mtx(&sc->sc_bus.bus_mtx,
603 USB_RESUME_WAIT);
604
605 for (i = 1; i <= sc->sc_noport; i++) {
606 cmd = EOREAD4(sc, EHCI_PORTSC(i));
607 if (((cmd & EHCI_PS_PO) == 0) &&
608 ((cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)) {
609 EOWRITE4(sc, EHCI_PORTSC(i),
610 cmd & ~EHCI_PS_FPR);
611 }
612 }
613 }
614 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
615
616 for (i = 0; i < 100; i++) {
617 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
618 if (hcr != EHCI_STS_HCH) {
619 break;
620 }
603 USB_RESUME_WAIT);
604
605 for (i = 1; i <= sc->sc_noport; i++) {
606 cmd = EOREAD4(sc, EHCI_PORTSC(i));
607 if (((cmd & EHCI_PS_PO) == 0) &&
608 ((cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)) {
609 EOWRITE4(sc, EHCI_PORTSC(i),
610 cmd & ~EHCI_PS_FPR);
611 }
612 }
613 }
614 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
615
616 for (i = 0; i < 100; i++) {
617 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
618 if (hcr != EHCI_STS_HCH) {
619 break;
620 }
621 usb2_pause_mtx(&sc->sc_bus.mtx, 1);
621 usb2_pause_mtx(&sc->sc_bus.bus_mtx, 1);
622 }
623 if (hcr == EHCI_STS_HCH) {
624 device_printf(sc->sc_bus.bdev, "config timeout\n");
625 }
622 }
623 if (hcr == EHCI_STS_HCH) {
624 device_printf(sc->sc_bus.bdev, "config timeout\n");
625 }
626 usb2_pause_mtx(&sc->sc_bus.mtx,
626 usb2_pause_mtx(&sc->sc_bus.bus_mtx,
627 USB_RESUME_WAIT);
628
627 USB_RESUME_WAIT);
628
629 mtx_unlock(&sc->sc_bus.mtx);
629 USB_BUS_UNLOCK(&sc->sc_bus);
630
631 /* catch any lost interrupts */
632 ehci_do_poll(&sc->sc_bus);
633
634 return;
635}
636
637void
638ehci_shutdown(ehci_softc_t *sc)
639{
640 DPRINTF("stopping the HC\n");
641
630
631 /* catch any lost interrupts */
632 ehci_do_poll(&sc->sc_bus);
633
634 return;
635}
636
637void
638ehci_shutdown(ehci_softc_t *sc)
639{
640 DPRINTF("stopping the HC\n");
641
642 mtx_lock(&sc->sc_bus.mtx);
642 USB_BUS_LOCK(&sc->sc_bus);
643
644 if (ehci_hc_reset(sc)) {
645 DPRINTF("reset failed!\n");
646 }
643
644 if (ehci_hc_reset(sc)) {
645 DPRINTF("reset failed!\n");
646 }
647 mtx_unlock(&sc->sc_bus.mtx);
647 USB_BUS_UNLOCK(&sc->sc_bus);
648}
649
650#if USB_DEBUG
651static void
652ehci_dump_regs(ehci_softc_t *sc)
653{
654 uint32_t i;
655

--- 754 unchanged lines hidden (view full) ---

1410
1411transferred:
1412 return (1);
1413}
1414
1415static void
1416ehci_pcd_enable(ehci_softc_t *sc)
1417{
648}
649
650#if USB_DEBUG
651static void
652ehci_dump_regs(ehci_softc_t *sc)
653{
654 uint32_t i;
655

--- 754 unchanged lines hidden (view full) ---

1410
1411transferred:
1412 return (1);
1413}
1414
1415static void
1416ehci_pcd_enable(ehci_softc_t *sc)
1417{
1418 mtx_assert(&sc->sc_bus.mtx, MA_OWNED);
1418 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1419
1420 sc->sc_eintrs |= EHCI_STS_PCD;
1421 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1422
1423 /* acknowledge any PCD interrupt */
1424 EOWRITE4(sc, EHCI_USBSTS, EHCI_STS_PCD);
1425
1426 usb2_sw_transfer(&sc->sc_root_intr,
1427 &ehci_root_intr_done);
1428
1419
1420 sc->sc_eintrs |= EHCI_STS_PCD;
1421 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1422
1423 /* acknowledge any PCD interrupt */
1424 EOWRITE4(sc, EHCI_USBSTS, EHCI_STS_PCD);
1425
1426 usb2_sw_transfer(&sc->sc_root_intr,
1427 &ehci_root_intr_done);
1428
1429 mtx_unlock(&sc->sc_bus.mtx);
1429 USB_BUS_UNLOCK(&sc->sc_bus);
1430 return;
1431}
1432
1433static void
1434ehci_interrupt_poll(ehci_softc_t *sc)
1435{
1436 struct usb2_xfer *xfer;
1437

--- 17 unchanged lines hidden (view full) ---

1455 * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1456 * is present !
1457 *------------------------------------------------------------------------*/
1458void
1459ehci_interrupt(ehci_softc_t *sc)
1460{
1461 uint32_t status;
1462
1430 return;
1431}
1432
1433static void
1434ehci_interrupt_poll(ehci_softc_t *sc)
1435{
1436 struct usb2_xfer *xfer;
1437

--- 17 unchanged lines hidden (view full) ---

1455 * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1456 * is present !
1457 *------------------------------------------------------------------------*/
1458void
1459ehci_interrupt(ehci_softc_t *sc)
1460{
1461 uint32_t status;
1462
1463 mtx_lock(&sc->sc_bus.mtx);
1463 USB_BUS_LOCK(&sc->sc_bus);
1464
1465 DPRINTFN(16, "real interrupt\n");
1466
1467#if USB_DEBUG
1468 if (ehcidebug > 15) {
1469 ehci_dump_regs(sc);
1470 }
1471#endif

--- 40 unchanged lines hidden (view full) ---

1512 sc->sc_eintrs &= ~status;
1513 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1514 printf("%s: blocking interrupts 0x%x\n", __FUNCTION__, status);
1515 }
1516 /* poll all the USB transfers */
1517 ehci_interrupt_poll(sc);
1518
1519done:
1464
1465 DPRINTFN(16, "real interrupt\n");
1466
1467#if USB_DEBUG
1468 if (ehcidebug > 15) {
1469 ehci_dump_regs(sc);
1470 }
1471#endif

--- 40 unchanged lines hidden (view full) ---

1512 sc->sc_eintrs &= ~status;
1513 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1514 printf("%s: blocking interrupts 0x%x\n", __FUNCTION__, status);
1515 }
1516 /* poll all the USB transfers */
1517 ehci_interrupt_poll(sc);
1518
1519done:
1520 mtx_unlock(&sc->sc_bus.mtx);
1520 USB_BUS_UNLOCK(&sc->sc_bus);
1521 return;
1522}
1523
1524/*
1525 * called when a request does not complete
1526 */
1527static void
1528ehci_timeout(void *arg)
1529{
1530 struct usb2_xfer *xfer = arg;
1531 ehci_softc_t *sc = xfer->usb2_sc;
1532
1533 DPRINTF("xfer=%p\n", xfer);
1534
1521 return;
1522}
1523
1524/*
1525 * called when a request does not complete
1526 */
1527static void
1528ehci_timeout(void *arg)
1529{
1530 struct usb2_xfer *xfer = arg;
1531 ehci_softc_t *sc = xfer->usb2_sc;
1532
1533 DPRINTF("xfer=%p\n", xfer);
1534
1535 mtx_assert(&sc->sc_bus.mtx, MA_OWNED);
1535 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1536
1537 /* transfer is transferred */
1538 ehci_device_done(xfer, USB_ERR_TIMEOUT);
1539
1536
1537 /* transfer is transferred */
1538 ehci_device_done(xfer, USB_ERR_TIMEOUT);
1539
1540 mtx_unlock(&sc->sc_bus.mtx);
1540 USB_BUS_UNLOCK(&sc->sc_bus);
1541
1542 return;
1543}
1544
1545static void
1546ehci_do_poll(struct usb2_bus *bus)
1547{
1548 struct ehci_softc *sc = EHCI_BUS2SC(bus);
1549
1541
1542 return;
1543}
1544
1545static void
1546ehci_do_poll(struct usb2_bus *bus)
1547{
1548 struct ehci_softc *sc = EHCI_BUS2SC(bus);
1549
1550 mtx_lock(&sc->sc_bus.mtx);
1550 USB_BUS_LOCK(&sc->sc_bus);
1551 ehci_interrupt_poll(sc);
1552 ehci_root_ctrl_poll(sc);
1551 ehci_interrupt_poll(sc);
1552 ehci_root_ctrl_poll(sc);
1553 mtx_unlock(&sc->sc_bus.mtx);
1553 USB_BUS_UNLOCK(&sc->sc_bus);
1554 return;
1555}
1556
1557static void
1558ehci_setup_standard_chain_sub(struct ehci_std_temp *temp)
1559{
1560 struct usb2_page_search buf_res;
1561 ehci_qtd_t *td;

--- 398 unchanged lines hidden (view full) ---

1960static void
1961ehci_root_intr_done(struct usb2_xfer *xfer,
1962 struct usb2_sw_transfer *std)
1963{
1964 struct ehci_softc *sc = xfer->usb2_sc;
1965 uint16_t i;
1966 uint16_t m;
1967
1554 return;
1555}
1556
1557static void
1558ehci_setup_standard_chain_sub(struct ehci_std_temp *temp)
1559{
1560 struct usb2_page_search buf_res;
1561 ehci_qtd_t *td;

--- 398 unchanged lines hidden (view full) ---

1960static void
1961ehci_root_intr_done(struct usb2_xfer *xfer,
1962 struct usb2_sw_transfer *std)
1963{
1964 struct ehci_softc *sc = xfer->usb2_sc;
1965 uint16_t i;
1966 uint16_t m;
1967
1968 mtx_assert(&sc->sc_bus.mtx, MA_OWNED);
1968 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1969
1970 if (std->state != USB_SW_TR_PRE_DATA) {
1971 if (std->state == USB_SW_TR_PRE_CALLBACK) {
1972 /* transfer transferred */
1973 ehci_device_done(xfer, std->err);
1974 }
1975 goto done;
1976 }

--- 142 unchanged lines hidden (view full) ---

2119 * from close and from interrupt
2120 */
2121static void
2122ehci_device_done(struct usb2_xfer *xfer, usb2_error_t error)
2123{
2124 struct usb2_pipe_methods *methods = xfer->pipe->methods;
2125 ehci_softc_t *sc = xfer->usb2_sc;
2126
1969
1970 if (std->state != USB_SW_TR_PRE_DATA) {
1971 if (std->state == USB_SW_TR_PRE_CALLBACK) {
1972 /* transfer transferred */
1973 ehci_device_done(xfer, std->err);
1974 }
1975 goto done;
1976 }

--- 142 unchanged lines hidden (view full) ---

2119 * from close and from interrupt
2120 */
2121static void
2122ehci_device_done(struct usb2_xfer *xfer, usb2_error_t error)
2123{
2124 struct usb2_pipe_methods *methods = xfer->pipe->methods;
2125 ehci_softc_t *sc = xfer->usb2_sc;
2126
2127 mtx_assert(&sc->sc_bus.mtx, MA_OWNED);
2127 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2128
2129 DPRINTFN(2, "xfer=%p, pipe=%p, error=%d\n",
2130 xfer, xfer->pipe, error);
2131
2132 if ((methods == &ehci_device_bulk_methods) ||
2133 (methods == &ehci_device_ctrl_methods)) {
2134#if USB_DEBUG
2135 if (ehcidebug > 8) {

--- 935 unchanged lines hidden (view full) ---

3071 uint32_t port;
3072 uint32_t v;
3073 uint16_t i;
3074 uint16_t value;
3075 uint16_t index;
3076 uint8_t l;
3077 uint8_t use_polling;
3078
2128
2129 DPRINTFN(2, "xfer=%p, pipe=%p, error=%d\n",
2130 xfer, xfer->pipe, error);
2131
2132 if ((methods == &ehci_device_bulk_methods) ||
2133 (methods == &ehci_device_ctrl_methods)) {
2134#if USB_DEBUG
2135 if (ehcidebug > 8) {

--- 935 unchanged lines hidden (view full) ---

3071 uint32_t port;
3072 uint32_t v;
3073 uint16_t i;
3074 uint16_t value;
3075 uint16_t index;
3076 uint8_t l;
3077 uint8_t use_polling;
3078
3079 mtx_assert(&sc->sc_bus.mtx, MA_OWNED);
3079 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
3080
3081 if (std->state != USB_SW_TR_SETUP) {
3082 if (std->state == USB_SW_TR_PRE_CALLBACK) {
3083 /* transfer transferred */
3084 ehci_device_done(xfer, std->err);
3085 }
3086 goto done;
3087 }
3088 /* buffer reset */
3089 std->ptr = sc->sc_hub_desc.temp;
3090 std->len = 0;
3091
3092 value = UGETW(std->req.wValue);
3093 index = UGETW(std->req.wIndex);
3094
3080
3081 if (std->state != USB_SW_TR_SETUP) {
3082 if (std->state == USB_SW_TR_PRE_CALLBACK) {
3083 /* transfer transferred */
3084 ehci_device_done(xfer, std->err);
3085 }
3086 goto done;
3087 }
3088 /* buffer reset */
3089 std->ptr = sc->sc_hub_desc.temp;
3090 std->len = 0;
3091
3092 value = UGETW(std->req.wValue);
3093 index = UGETW(std->req.wIndex);
3094
3095 use_polling = mtx_owned(xfer->priv_mtx) ? 1 : 0;
3095 use_polling = mtx_owned(xfer->xfer_mtx) ? 1 : 0;
3096
3097 DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
3098 "wValue=0x%04x wIndex=0x%04x\n",
3099 std->req.bmRequestType, std->req.bRequest,
3100 UGETW(std->req.wLength), value, index);
3101
3102#define C(x,y) ((x) | ((y) << 8))
3103 switch (C(std->req.bRequest, std->req.bmRequestType)) {

--- 264 unchanged lines hidden (view full) ---

3368 v &= ~(EHCI_PS_PE | EHCI_PS_PR);
3369 EOWRITE4(sc, port, v | EHCI_PS_PR);
3370
3371 if (use_polling) {
3372 /* polling */
3373 DELAY(USB_PORT_ROOT_RESET_DELAY * 1000);
3374 } else {
3375 /* Wait for reset to complete. */
3096
3097 DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
3098 "wValue=0x%04x wIndex=0x%04x\n",
3099 std->req.bmRequestType, std->req.bRequest,
3100 UGETW(std->req.wLength), value, index);
3101
3102#define C(x,y) ((x) | ((y) << 8))
3103 switch (C(std->req.bRequest, std->req.bmRequestType)) {

--- 264 unchanged lines hidden (view full) ---

3368 v &= ~(EHCI_PS_PE | EHCI_PS_PR);
3369 EOWRITE4(sc, port, v | EHCI_PS_PR);
3370
3371 if (use_polling) {
3372 /* polling */
3373 DELAY(USB_PORT_ROOT_RESET_DELAY * 1000);
3374 } else {
3375 /* Wait for reset to complete. */
3376 usb2_pause_mtx(&sc->sc_bus.mtx,
3376 usb2_pause_mtx(&sc->sc_bus.bus_mtx,
3377 USB_PORT_ROOT_RESET_DELAY);
3378 }
3379
3380 /* Terminate reset sequence. */
3381 EOWRITE4(sc, port, v);
3382
3383 if (use_polling) {
3384 /* polling */
3385 DELAY(EHCI_PORT_RESET_COMPLETE * 1000);
3386 } else {
3387 /* Wait for HC to complete reset. */
3377 USB_PORT_ROOT_RESET_DELAY);
3378 }
3379
3380 /* Terminate reset sequence. */
3381 EOWRITE4(sc, port, v);
3382
3383 if (use_polling) {
3384 /* polling */
3385 DELAY(EHCI_PORT_RESET_COMPLETE * 1000);
3386 } else {
3387 /* Wait for HC to complete reset. */
3388 usb2_pause_mtx(&sc->sc_bus.mtx,
3388 usb2_pause_mtx(&sc->sc_bus.bus_mtx,
3389 EHCI_PORT_RESET_COMPLETE);
3390 }
3391
3392 v = EOREAD4(sc, port);
3393 DPRINTF("ehci after reset, status=0x%08x\n", v);
3394 if (v & EHCI_PS_PR) {
3395 device_printf(sc->sc_bus.bdev,
3396 "port reset timeout\n");

--- 458 unchanged lines hidden --- 		3389 EHCI_PORT_RESET_COMPLETE);
3390 }
3391
3392 v = EOREAD4(sc, port);
3393 DPRINTF("ehci after reset, status=0x%08x\n", v);
3394 if (v & EHCI_PS_PR) {
3395 device_printf(sc->sc_bus.bdev,
3396 "port reset timeout\n");

--- 458 unchanged lines hidden ---