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ppi.c (83366) ppi.c (94154)
1/*-
2 * Copyright (c) 1997, 1998, 1999 Nicolas Souchu, Michael Smith
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
1/*-
2 * Copyright (c) 1997, 1998, 1999 Nicolas Souchu, Michael Smith
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/dev/ppbus/ppi.c 83366 2001-09-12 08:38:13Z julian $
26 * $FreeBSD: head/sys/dev/ppbus/ppi.c 94154 2002-04-07 22:06:20Z ticso $
27 *
28 */
29#include "opt_ppb_1284.h"
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/module.h>
34#include <sys/bus.h>
35#include <sys/conf.h>
36#include <sys/kernel.h>
37#include <sys/uio.h>
38#include <sys/fcntl.h>
39
40#include <machine/bus.h>
41#include <machine/resource.h>
42#include <sys/rman.h>
43
44#include <dev/ppbus/ppbconf.h>
45#include <dev/ppbus/ppb_msq.h>
46
47#ifdef PERIPH_1284
48#include <dev/ppbus/ppb_1284.h>
49#endif
50
51#include <dev/ppbus/ppi.h>
52
53#include "ppbus_if.h"
54
55#include <dev/ppbus/ppbio.h>
56
57#define BUFSIZE 512
58
59struct ppi_data {
60
61 int ppi_unit;
62 int ppi_flags;
63#define HAVE_PPBUS (1<<0)
64#define HAD_PPBUS (1<<1)
65
66 int ppi_count;
67 int ppi_mode; /* IEEE1284 mode */
68 char ppi_buffer[BUFSIZE];
69
70#ifdef PERIPH_1284
71 struct resource *intr_resource; /* interrupt resource */
72 void *intr_cookie; /* interrupt registration cookie */
73#endif /* PERIPH_1284 */
74};
75
76#define DEVTOSOFTC(dev) \
77 ((struct ppi_data *)device_get_softc(dev))
78#define UNITOSOFTC(unit) \
79 ((struct ppi_data *)devclass_get_softc(ppi_devclass, (unit)))
80#define UNITODEVICE(unit) \
81 (devclass_get_device(ppi_devclass, (unit)))
82
83static devclass_t ppi_devclass;
84
85static d_open_t ppiopen;
86static d_close_t ppiclose;
87static d_ioctl_t ppiioctl;
88static d_write_t ppiwrite;
89static d_read_t ppiread;
90
91#define CDEV_MAJOR 82
92static struct cdevsw ppi_cdevsw = {
93 /* open */ ppiopen,
94 /* close */ ppiclose,
95 /* read */ ppiread,
96 /* write */ ppiwrite,
97 /* ioctl */ ppiioctl,
98 /* poll */ nopoll,
99 /* mmap */ nommap,
100 /* strategy */ nostrategy,
101 /* name */ "ppi",
102 /* maj */ CDEV_MAJOR,
103 /* dump */ nodump,
104 /* psize */ nopsize,
105 /* flags */ 0,
106};
107
108#ifdef PERIPH_1284
109
110static void
111ppi_enable_intr(device_t ppidev)
112{
113 char r;
114 device_t ppbus = device_get_parent(ppidev);
115
116 r = ppb_rctr(ppbus);
117 ppb_wctr(ppbus, r | IRQENABLE);
118
119 return;
120}
121
122static void
123ppi_disable_intr(device_t ppidev)
124{
125 char r;
126 device_t ppbus = device_get_parent(ppidev);
127
128 r = ppb_rctr(ppbus);
129 ppb_wctr(ppbus, r & ~IRQENABLE);
130
131 return;
132}
133
134#endif /* PERIPH_1284 */
135
136static void
137ppi_identify(driver_t *driver, device_t parent)
138{
139
27 *
28 */
29#include "opt_ppb_1284.h"
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/module.h>
34#include <sys/bus.h>
35#include <sys/conf.h>
36#include <sys/kernel.h>
37#include <sys/uio.h>
38#include <sys/fcntl.h>
39
40#include <machine/bus.h>
41#include <machine/resource.h>
42#include <sys/rman.h>
43
44#include <dev/ppbus/ppbconf.h>
45#include <dev/ppbus/ppb_msq.h>
46
47#ifdef PERIPH_1284
48#include <dev/ppbus/ppb_1284.h>
49#endif
50
51#include <dev/ppbus/ppi.h>
52
53#include "ppbus_if.h"
54
55#include <dev/ppbus/ppbio.h>
56
57#define BUFSIZE 512
58
59struct ppi_data {
60
61 int ppi_unit;
62 int ppi_flags;
63#define HAVE_PPBUS (1<<0)
64#define HAD_PPBUS (1<<1)
65
66 int ppi_count;
67 int ppi_mode; /* IEEE1284 mode */
68 char ppi_buffer[BUFSIZE];
69
70#ifdef PERIPH_1284
71 struct resource *intr_resource; /* interrupt resource */
72 void *intr_cookie; /* interrupt registration cookie */
73#endif /* PERIPH_1284 */
74};
75
76#define DEVTOSOFTC(dev) \
77 ((struct ppi_data *)device_get_softc(dev))
78#define UNITOSOFTC(unit) \
79 ((struct ppi_data *)devclass_get_softc(ppi_devclass, (unit)))
80#define UNITODEVICE(unit) \
81 (devclass_get_device(ppi_devclass, (unit)))
82
83static devclass_t ppi_devclass;
84
85static d_open_t ppiopen;
86static d_close_t ppiclose;
87static d_ioctl_t ppiioctl;
88static d_write_t ppiwrite;
89static d_read_t ppiread;
90
91#define CDEV_MAJOR 82
92static struct cdevsw ppi_cdevsw = {
93 /* open */ ppiopen,
94 /* close */ ppiclose,
95 /* read */ ppiread,
96 /* write */ ppiwrite,
97 /* ioctl */ ppiioctl,
98 /* poll */ nopoll,
99 /* mmap */ nommap,
100 /* strategy */ nostrategy,
101 /* name */ "ppi",
102 /* maj */ CDEV_MAJOR,
103 /* dump */ nodump,
104 /* psize */ nopsize,
105 /* flags */ 0,
106};
107
108#ifdef PERIPH_1284
109
110static void
111ppi_enable_intr(device_t ppidev)
112{
113 char r;
114 device_t ppbus = device_get_parent(ppidev);
115
116 r = ppb_rctr(ppbus);
117 ppb_wctr(ppbus, r | IRQENABLE);
118
119 return;
120}
121
122static void
123ppi_disable_intr(device_t ppidev)
124{
125 char r;
126 device_t ppbus = device_get_parent(ppidev);
127
128 r = ppb_rctr(ppbus);
129 ppb_wctr(ppbus, r & ~IRQENABLE);
130
131 return;
132}
133
134#endif /* PERIPH_1284 */
135
136static void
137ppi_identify(driver_t *driver, device_t parent)
138{
139
140 BUS_ADD_CHILD(parent, 0, "ppi", 0);
140 BUS_ADD_CHILD(parent, 0, "ppi", -1);
141}
142
143/*
144 * ppi_probe()
145 */
146static int
147ppi_probe(device_t dev)
148{
149 struct ppi_data *ppi;
150
151 /* probe is always ok */
152 device_set_desc(dev, "Parallel I/O");
153
154 ppi = DEVTOSOFTC(dev);
155 bzero(ppi, sizeof(struct ppi_data));
156
157 return (0);
158}
159
160/*
161 * ppi_attach()
162 */
163static int
164ppi_attach(device_t dev)
165{
166#ifdef PERIPH_1284
167 uintptr_t irq;
168 int zero = 0;
169 struct ppi_data *ppi = DEVTOSOFTC(dev);
170
171 /* retrive the irq */
172 BUS_READ_IVAR(device_get_parent(dev), dev, PPBUS_IVAR_IRQ, &irq);
173
174 /* declare our interrupt handler */
175 ppi->intr_resource = bus_alloc_resource(dev, SYS_RES_IRQ,
176 &zero, irq, irq, 1, RF_ACTIVE);
177#endif /* PERIPH_1284 */
178
179 make_dev(&ppi_cdevsw, device_get_unit(dev), /* XXX cleanup */
180 UID_ROOT, GID_WHEEL,
181 0600, "ppi%d", device_get_unit(dev));
182
183 return (0);
184}
185
186#ifdef PERIPH_1284
187/*
188 * Cable
189 * -----
190 *
191 * Use an IEEE1284 compliant (DB25/DB25) cable with the following tricks:
192 *
193 * nStrobe <-> nAck 1 <-> 10
194 * nAutofd <-> Busy 11 <-> 14
195 * nSelectin <-> Select 17 <-> 13
196 * nInit <-> nFault 15 <-> 16
197 *
198 */
199static void
200ppiintr(void *arg)
201{
202 device_t ppidev = (device_t)arg;
203 device_t ppbus = device_get_parent(ppidev);
204 struct ppi_data *ppi = DEVTOSOFTC(ppidev);
205
206 ppi_disable_intr(ppidev);
207
208 switch (ppb_1284_get_state(ppbus)) {
209
210 /* accept IEEE1284 negociation then wakeup an waiting process to
211 * continue negociation at process level */
212 case PPB_FORWARD_IDLE:
213 /* Event 1 */
214 if ((ppb_rstr(ppbus) & (SELECT | nBUSY)) ==
215 (SELECT | nBUSY)) {
216 /* IEEE1284 negociation */
217#ifdef DEBUG_1284
218 printf("N");
219#endif
220
221 /* Event 2 - prepare for reading the ext. value */
222 ppb_wctr(ppbus, (PCD | STROBE | nINIT) & ~SELECTIN);
223
224 ppb_1284_set_state(ppbus, PPB_NEGOCIATION);
225
226 } else {
227#ifdef DEBUG_1284
228 printf("0x%x", ppb_rstr(ppbus));
229#endif
230 ppb_peripheral_terminate(ppbus, PPB_DONTWAIT);
231 break;
232 }
233
234 /* wake up any process waiting for negociation from
235 * remote master host */
236
237 /* XXX should set a variable to warn the process about
238 * the interrupt */
239
240 wakeup(ppi);
241 break;
242 default:
243#ifdef DEBUG_1284
244 printf("?%d", ppb_1284_get_state(ppbus));
245#endif
246 ppb_1284_set_state(ppbus, PPB_FORWARD_IDLE);
247 ppb_set_mode(ppbus, PPB_COMPATIBLE);
248 break;
249 }
250
251 ppi_enable_intr(ppidev);
252
253 return;
254}
255#endif /* PERIPH_1284 */
256
257static int
258ppiopen(dev_t dev, int flags, int fmt, struct thread *td)
259{
260 u_int unit = minor(dev);
261 struct ppi_data *ppi = UNITOSOFTC(unit);
262 device_t ppidev = UNITODEVICE(unit);
263 device_t ppbus = device_get_parent(ppidev);
264 int res;
265
266 if (!ppi)
267 return (ENXIO);
268
269 if (!(ppi->ppi_flags & HAVE_PPBUS)) {
270 if ((res = ppb_request_bus(ppbus, ppidev,
271 (flags & O_NONBLOCK) ? PPB_DONTWAIT :
272 (PPB_WAIT | PPB_INTR))))
273 return (res);
274
275 ppi->ppi_flags |= HAVE_PPBUS;
276
277#ifdef PERIPH_1284
278 if (ppi->intr_resource) {
279 /* register our interrupt handler */
280 BUS_SETUP_INTR(device_get_parent(ppidev), ppidev, ppi->intr_resource,
281 INTR_TYPE_TTY, ppiintr, dev, &ppi->intr_cookie);
282 }
283#endif /* PERIPH_1284 */
284 }
285 ppi->ppi_count += 1;
286
287 return (0);
288}
289
290static int
291ppiclose(dev_t dev, int flags, int fmt, struct thread *td)
292{
293 u_int unit = minor(dev);
294 struct ppi_data *ppi = UNITOSOFTC(unit);
295 device_t ppidev = UNITODEVICE(unit);
296 device_t ppbus = device_get_parent(ppidev);
297
298 ppi->ppi_count --;
299 if (!ppi->ppi_count) {
300
301#ifdef PERIPH_1284
302 switch (ppb_1284_get_state(ppbus)) {
303 case PPB_PERIPHERAL_IDLE:
304 ppb_peripheral_terminate(ppbus, 0);
305 break;
306 case PPB_REVERSE_IDLE:
307 case PPB_EPP_IDLE:
308 case PPB_ECP_FORWARD_IDLE:
309 default:
310 ppb_1284_terminate(ppbus);
311 break;
312 }
313#endif /* PERIPH_1284 */
314
315 /* unregistration of interrupt forced by release */
316 ppb_release_bus(ppbus, ppidev);
317
318 ppi->ppi_flags &= ~HAVE_PPBUS;
319 }
320
321 return (0);
322}
323
324/*
325 * ppiread()
326 *
327 * IEEE1284 compliant read.
328 *
329 * First, try negociation to BYTE then NIBBLE mode
330 * If no data is available, wait for it otherwise transfer as much as possible
331 */
332static int
333ppiread(dev_t dev, struct uio *uio, int ioflag)
334{
335#ifdef PERIPH_1284
336 u_int unit = minor(dev);
337 struct ppi_data *ppi = UNITOSOFTC(unit);
338 device_t ppidev = UNITODEVICE(unit);
339 device_t ppbus = device_get_parent(ppidev);
340 int len, error = 0;
341
342 switch (ppb_1284_get_state(ppbus)) {
343 case PPB_PERIPHERAL_IDLE:
344 ppb_peripheral_terminate(ppbus, 0);
345 /* fall throught */
346
347 case PPB_FORWARD_IDLE:
348 /* if can't negociate NIBBLE mode then try BYTE mode,
349 * the peripheral may be a computer
350 */
351 if ((ppb_1284_negociate(ppbus,
352 ppi->ppi_mode = PPB_NIBBLE, 0))) {
353
354 /* XXX Wait 2 seconds to let the remote host some
355 * time to terminate its interrupt
356 */
357 tsleep(ppi, PPBPRI, "ppiread", 2*hz);
358
359 if ((error = ppb_1284_negociate(ppbus,
360 ppi->ppi_mode = PPB_BYTE, 0)))
361 return (error);
362 }
363 break;
364
365 case PPB_REVERSE_IDLE:
366 case PPB_EPP_IDLE:
367 case PPB_ECP_FORWARD_IDLE:
368 default:
369 break;
370 }
371
372#ifdef DEBUG_1284
373 printf("N");
374#endif
375 /* read data */
376 len = 0;
377 while (uio->uio_resid) {
378 if ((error = ppb_1284_read(ppbus, ppi->ppi_mode,
379 ppi->ppi_buffer, min(BUFSIZE, uio->uio_resid),
380 &len))) {
381 goto error;
382 }
383
384 if (!len)
385 goto error; /* no more data */
386
387#ifdef DEBUG_1284
388 printf("d");
389#endif
390 if ((error = uiomove(ppi->ppi_buffer, len, uio)))
391 goto error;
392 }
393
394error:
395
396#else /* PERIPH_1284 */
397 int error = ENODEV;
398#endif
399
400 return (error);
401}
402
403/*
404 * ppiwrite()
405 *
406 * IEEE1284 compliant write
407 *
408 * Actually, this is the peripheral side of a remote IEEE1284 read
409 *
410 * The first part of the negociation (IEEE1284 device detection) is
411 * done at interrupt level, then the remaining is done by the writing
412 * process
413 *
414 * Once negociation done, transfer data
415 */
416static int
417ppiwrite(dev_t dev, struct uio *uio, int ioflag)
418{
419#ifdef PERIPH_1284
420 u_int unit = minor(dev);
421 struct ppi_data *ppi = UNITOSOFTC(unit);
422 device_t ppidev = UNITODEVICE(unit);
423 device_t ppbus = device_get_parent(ppidev);
424 int len, error = 0, sent;
425
426#if 0
427 int ret;
428
429 #define ADDRESS MS_PARAM(0, 0, MS_TYP_PTR)
430 #define LENGTH MS_PARAM(0, 1, MS_TYP_INT)
431
432 struct ppb_microseq msq[] = {
433 { MS_OP_PUT, { MS_UNKNOWN, MS_UNKNOWN, MS_UNKNOWN } },
434 MS_RET(0)
435 };
436
437 /* negociate ECP mode */
438 if (ppb_1284_negociate(ppbus, PPB_ECP, 0)) {
439 printf("ppiwrite: ECP negociation failed\n");
440 }
441
442 while (!error && (len = min(uio->uio_resid, BUFSIZE))) {
443 uiomove(ppi->ppi_buffer, len, uio);
444
445 ppb_MS_init_msq(msq, 2, ADDRESS, ppi->ppi_buffer, LENGTH, len);
446
447 error = ppb_MS_microseq(ppbus, msq, &ret);
448 }
449#endif
450
451 /* we have to be peripheral to be able to send data, so
452 * wait for the appropriate state
453 */
454 if (ppb_1284_get_state(ppbus) < PPB_PERIPHERAL_NEGOCIATION)
455 ppb_1284_terminate(ppbus);
456
457 while (ppb_1284_get_state(ppbus) != PPB_PERIPHERAL_IDLE) {
458 /* XXX should check a variable before sleeping */
459#ifdef DEBUG_1284
460 printf("s");
461#endif
462
463 ppi_enable_intr(ppidev);
464
465 /* sleep until IEEE1284 negociation starts */
466 error = tsleep(ppi, PCATCH | PPBPRI, "ppiwrite", 0);
467
468 switch (error) {
469 case 0:
470 /* negociate peripheral side with BYTE mode */
471 ppb_peripheral_negociate(ppbus, PPB_BYTE, 0);
472 break;
473 case EWOULDBLOCK:
474 break;
475 default:
476 goto error;
477 }
478 }
479#ifdef DEBUG_1284
480 printf("N");
481#endif
482
483 /* negociation done, write bytes to master host */
484 while ((len = min(uio->uio_resid, BUFSIZE)) != 0) {
485 uiomove(ppi->ppi_buffer, len, uio);
486 if ((error = byte_peripheral_write(ppbus,
487 ppi->ppi_buffer, len, &sent)))
488 goto error;
489#ifdef DEBUG_1284
490 printf("d");
491#endif
492 }
493
494error:
495
496#else /* PERIPH_1284 */
497 int error = ENODEV;
498#endif
499
500 return (error);
501}
502
503static int
504ppiioctl(dev_t dev, u_long cmd, caddr_t data, int flags, struct thread *td)
505{
506 u_int unit = minor(dev);
507 device_t ppidev = UNITODEVICE(unit);
508 device_t ppbus = device_get_parent(ppidev);
509 int error = 0;
510 u_int8_t *val = (u_int8_t *)data;
511
512 switch (cmd) {
513
514 case PPIGDATA: /* get data register */
515 *val = ppb_rdtr(ppbus);
516 break;
517 case PPIGSTATUS: /* get status bits */
518 *val = ppb_rstr(ppbus);
519 break;
520 case PPIGCTRL: /* get control bits */
521 *val = ppb_rctr(ppbus);
522 break;
523 case PPIGEPPD: /* get EPP data bits */
524 *val = ppb_repp_D(ppbus);
525 break;
526 case PPIGECR: /* get ECP bits */
527 *val = ppb_recr(ppbus);
528 break;
529 case PPIGFIFO: /* read FIFO */
530 *val = ppb_rfifo(ppbus);
531 break;
532 case PPISDATA: /* set data register */
533 ppb_wdtr(ppbus, *val);
534 break;
535 case PPISSTATUS: /* set status bits */
536 ppb_wstr(ppbus, *val);
537 break;
538 case PPISCTRL: /* set control bits */
539 ppb_wctr(ppbus, *val);
540 break;
541 case PPISEPPD: /* set EPP data bits */
542 ppb_wepp_D(ppbus, *val);
543 break;
544 case PPISECR: /* set ECP bits */
545 ppb_wecr(ppbus, *val);
546 break;
547 case PPISFIFO: /* write FIFO */
548 ppb_wfifo(ppbus, *val);
549 break;
550 case PPIGEPPA: /* get EPP address bits */
551 *val = ppb_repp_A(ppbus);
552 break;
553 case PPISEPPA: /* set EPP address bits */
554 ppb_wepp_A(ppbus, *val);
555 break;
556 default:
557 error = ENOTTY;
558 break;
559 }
560
561 return (error);
562}
563
564static device_method_t ppi_methods[] = {
565 /* device interface */
566 DEVMETHOD(device_identify, ppi_identify),
567 DEVMETHOD(device_probe, ppi_probe),
568 DEVMETHOD(device_attach, ppi_attach),
569
570 { 0, 0 }
571};
572
573static driver_t ppi_driver = {
574 "ppi",
575 ppi_methods,
576 sizeof(struct ppi_data),
577};
578DRIVER_MODULE(ppi, ppbus, ppi_driver, ppi_devclass, 0, 0);
141}
142
143/*
144 * ppi_probe()
145 */
146static int
147ppi_probe(device_t dev)
148{
149 struct ppi_data *ppi;
150
151 /* probe is always ok */
152 device_set_desc(dev, "Parallel I/O");
153
154 ppi = DEVTOSOFTC(dev);
155 bzero(ppi, sizeof(struct ppi_data));
156
157 return (0);
158}
159
160/*
161 * ppi_attach()
162 */
163static int
164ppi_attach(device_t dev)
165{
166#ifdef PERIPH_1284
167 uintptr_t irq;
168 int zero = 0;
169 struct ppi_data *ppi = DEVTOSOFTC(dev);
170
171 /* retrive the irq */
172 BUS_READ_IVAR(device_get_parent(dev), dev, PPBUS_IVAR_IRQ, &irq);
173
174 /* declare our interrupt handler */
175 ppi->intr_resource = bus_alloc_resource(dev, SYS_RES_IRQ,
176 &zero, irq, irq, 1, RF_ACTIVE);
177#endif /* PERIPH_1284 */
178
179 make_dev(&ppi_cdevsw, device_get_unit(dev), /* XXX cleanup */
180 UID_ROOT, GID_WHEEL,
181 0600, "ppi%d", device_get_unit(dev));
182
183 return (0);
184}
185
186#ifdef PERIPH_1284
187/*
188 * Cable
189 * -----
190 *
191 * Use an IEEE1284 compliant (DB25/DB25) cable with the following tricks:
192 *
193 * nStrobe <-> nAck 1 <-> 10
194 * nAutofd <-> Busy 11 <-> 14
195 * nSelectin <-> Select 17 <-> 13
196 * nInit <-> nFault 15 <-> 16
197 *
198 */
199static void
200ppiintr(void *arg)
201{
202 device_t ppidev = (device_t)arg;
203 device_t ppbus = device_get_parent(ppidev);
204 struct ppi_data *ppi = DEVTOSOFTC(ppidev);
205
206 ppi_disable_intr(ppidev);
207
208 switch (ppb_1284_get_state(ppbus)) {
209
210 /* accept IEEE1284 negociation then wakeup an waiting process to
211 * continue negociation at process level */
212 case PPB_FORWARD_IDLE:
213 /* Event 1 */
214 if ((ppb_rstr(ppbus) & (SELECT | nBUSY)) ==
215 (SELECT | nBUSY)) {
216 /* IEEE1284 negociation */
217#ifdef DEBUG_1284
218 printf("N");
219#endif
220
221 /* Event 2 - prepare for reading the ext. value */
222 ppb_wctr(ppbus, (PCD | STROBE | nINIT) & ~SELECTIN);
223
224 ppb_1284_set_state(ppbus, PPB_NEGOCIATION);
225
226 } else {
227#ifdef DEBUG_1284
228 printf("0x%x", ppb_rstr(ppbus));
229#endif
230 ppb_peripheral_terminate(ppbus, PPB_DONTWAIT);
231 break;
232 }
233
234 /* wake up any process waiting for negociation from
235 * remote master host */
236
237 /* XXX should set a variable to warn the process about
238 * the interrupt */
239
240 wakeup(ppi);
241 break;
242 default:
243#ifdef DEBUG_1284
244 printf("?%d", ppb_1284_get_state(ppbus));
245#endif
246 ppb_1284_set_state(ppbus, PPB_FORWARD_IDLE);
247 ppb_set_mode(ppbus, PPB_COMPATIBLE);
248 break;
249 }
250
251 ppi_enable_intr(ppidev);
252
253 return;
254}
255#endif /* PERIPH_1284 */
256
257static int
258ppiopen(dev_t dev, int flags, int fmt, struct thread *td)
259{
260 u_int unit = minor(dev);
261 struct ppi_data *ppi = UNITOSOFTC(unit);
262 device_t ppidev = UNITODEVICE(unit);
263 device_t ppbus = device_get_parent(ppidev);
264 int res;
265
266 if (!ppi)
267 return (ENXIO);
268
269 if (!(ppi->ppi_flags & HAVE_PPBUS)) {
270 if ((res = ppb_request_bus(ppbus, ppidev,
271 (flags & O_NONBLOCK) ? PPB_DONTWAIT :
272 (PPB_WAIT | PPB_INTR))))
273 return (res);
274
275 ppi->ppi_flags |= HAVE_PPBUS;
276
277#ifdef PERIPH_1284
278 if (ppi->intr_resource) {
279 /* register our interrupt handler */
280 BUS_SETUP_INTR(device_get_parent(ppidev), ppidev, ppi->intr_resource,
281 INTR_TYPE_TTY, ppiintr, dev, &ppi->intr_cookie);
282 }
283#endif /* PERIPH_1284 */
284 }
285 ppi->ppi_count += 1;
286
287 return (0);
288}
289
290static int
291ppiclose(dev_t dev, int flags, int fmt, struct thread *td)
292{
293 u_int unit = minor(dev);
294 struct ppi_data *ppi = UNITOSOFTC(unit);
295 device_t ppidev = UNITODEVICE(unit);
296 device_t ppbus = device_get_parent(ppidev);
297
298 ppi->ppi_count --;
299 if (!ppi->ppi_count) {
300
301#ifdef PERIPH_1284
302 switch (ppb_1284_get_state(ppbus)) {
303 case PPB_PERIPHERAL_IDLE:
304 ppb_peripheral_terminate(ppbus, 0);
305 break;
306 case PPB_REVERSE_IDLE:
307 case PPB_EPP_IDLE:
308 case PPB_ECP_FORWARD_IDLE:
309 default:
310 ppb_1284_terminate(ppbus);
311 break;
312 }
313#endif /* PERIPH_1284 */
314
315 /* unregistration of interrupt forced by release */
316 ppb_release_bus(ppbus, ppidev);
317
318 ppi->ppi_flags &= ~HAVE_PPBUS;
319 }
320
321 return (0);
322}
323
324/*
325 * ppiread()
326 *
327 * IEEE1284 compliant read.
328 *
329 * First, try negociation to BYTE then NIBBLE mode
330 * If no data is available, wait for it otherwise transfer as much as possible
331 */
332static int
333ppiread(dev_t dev, struct uio *uio, int ioflag)
334{
335#ifdef PERIPH_1284
336 u_int unit = minor(dev);
337 struct ppi_data *ppi = UNITOSOFTC(unit);
338 device_t ppidev = UNITODEVICE(unit);
339 device_t ppbus = device_get_parent(ppidev);
340 int len, error = 0;
341
342 switch (ppb_1284_get_state(ppbus)) {
343 case PPB_PERIPHERAL_IDLE:
344 ppb_peripheral_terminate(ppbus, 0);
345 /* fall throught */
346
347 case PPB_FORWARD_IDLE:
348 /* if can't negociate NIBBLE mode then try BYTE mode,
349 * the peripheral may be a computer
350 */
351 if ((ppb_1284_negociate(ppbus,
352 ppi->ppi_mode = PPB_NIBBLE, 0))) {
353
354 /* XXX Wait 2 seconds to let the remote host some
355 * time to terminate its interrupt
356 */
357 tsleep(ppi, PPBPRI, "ppiread", 2*hz);
358
359 if ((error = ppb_1284_negociate(ppbus,
360 ppi->ppi_mode = PPB_BYTE, 0)))
361 return (error);
362 }
363 break;
364
365 case PPB_REVERSE_IDLE:
366 case PPB_EPP_IDLE:
367 case PPB_ECP_FORWARD_IDLE:
368 default:
369 break;
370 }
371
372#ifdef DEBUG_1284
373 printf("N");
374#endif
375 /* read data */
376 len = 0;
377 while (uio->uio_resid) {
378 if ((error = ppb_1284_read(ppbus, ppi->ppi_mode,
379 ppi->ppi_buffer, min(BUFSIZE, uio->uio_resid),
380 &len))) {
381 goto error;
382 }
383
384 if (!len)
385 goto error; /* no more data */
386
387#ifdef DEBUG_1284
388 printf("d");
389#endif
390 if ((error = uiomove(ppi->ppi_buffer, len, uio)))
391 goto error;
392 }
393
394error:
395
396#else /* PERIPH_1284 */
397 int error = ENODEV;
398#endif
399
400 return (error);
401}
402
403/*
404 * ppiwrite()
405 *
406 * IEEE1284 compliant write
407 *
408 * Actually, this is the peripheral side of a remote IEEE1284 read
409 *
410 * The first part of the negociation (IEEE1284 device detection) is
411 * done at interrupt level, then the remaining is done by the writing
412 * process
413 *
414 * Once negociation done, transfer data
415 */
416static int
417ppiwrite(dev_t dev, struct uio *uio, int ioflag)
418{
419#ifdef PERIPH_1284
420 u_int unit = minor(dev);
421 struct ppi_data *ppi = UNITOSOFTC(unit);
422 device_t ppidev = UNITODEVICE(unit);
423 device_t ppbus = device_get_parent(ppidev);
424 int len, error = 0, sent;
425
426#if 0
427 int ret;
428
429 #define ADDRESS MS_PARAM(0, 0, MS_TYP_PTR)
430 #define LENGTH MS_PARAM(0, 1, MS_TYP_INT)
431
432 struct ppb_microseq msq[] = {
433 { MS_OP_PUT, { MS_UNKNOWN, MS_UNKNOWN, MS_UNKNOWN } },
434 MS_RET(0)
435 };
436
437 /* negociate ECP mode */
438 if (ppb_1284_negociate(ppbus, PPB_ECP, 0)) {
439 printf("ppiwrite: ECP negociation failed\n");
440 }
441
442 while (!error && (len = min(uio->uio_resid, BUFSIZE))) {
443 uiomove(ppi->ppi_buffer, len, uio);
444
445 ppb_MS_init_msq(msq, 2, ADDRESS, ppi->ppi_buffer, LENGTH, len);
446
447 error = ppb_MS_microseq(ppbus, msq, &ret);
448 }
449#endif
450
451 /* we have to be peripheral to be able to send data, so
452 * wait for the appropriate state
453 */
454 if (ppb_1284_get_state(ppbus) < PPB_PERIPHERAL_NEGOCIATION)
455 ppb_1284_terminate(ppbus);
456
457 while (ppb_1284_get_state(ppbus) != PPB_PERIPHERAL_IDLE) {
458 /* XXX should check a variable before sleeping */
459#ifdef DEBUG_1284
460 printf("s");
461#endif
462
463 ppi_enable_intr(ppidev);
464
465 /* sleep until IEEE1284 negociation starts */
466 error = tsleep(ppi, PCATCH | PPBPRI, "ppiwrite", 0);
467
468 switch (error) {
469 case 0:
470 /* negociate peripheral side with BYTE mode */
471 ppb_peripheral_negociate(ppbus, PPB_BYTE, 0);
472 break;
473 case EWOULDBLOCK:
474 break;
475 default:
476 goto error;
477 }
478 }
479#ifdef DEBUG_1284
480 printf("N");
481#endif
482
483 /* negociation done, write bytes to master host */
484 while ((len = min(uio->uio_resid, BUFSIZE)) != 0) {
485 uiomove(ppi->ppi_buffer, len, uio);
486 if ((error = byte_peripheral_write(ppbus,
487 ppi->ppi_buffer, len, &sent)))
488 goto error;
489#ifdef DEBUG_1284
490 printf("d");
491#endif
492 }
493
494error:
495
496#else /* PERIPH_1284 */
497 int error = ENODEV;
498#endif
499
500 return (error);
501}
502
503static int
504ppiioctl(dev_t dev, u_long cmd, caddr_t data, int flags, struct thread *td)
505{
506 u_int unit = minor(dev);
507 device_t ppidev = UNITODEVICE(unit);
508 device_t ppbus = device_get_parent(ppidev);
509 int error = 0;
510 u_int8_t *val = (u_int8_t *)data;
511
512 switch (cmd) {
513
514 case PPIGDATA: /* get data register */
515 *val = ppb_rdtr(ppbus);
516 break;
517 case PPIGSTATUS: /* get status bits */
518 *val = ppb_rstr(ppbus);
519 break;
520 case PPIGCTRL: /* get control bits */
521 *val = ppb_rctr(ppbus);
522 break;
523 case PPIGEPPD: /* get EPP data bits */
524 *val = ppb_repp_D(ppbus);
525 break;
526 case PPIGECR: /* get ECP bits */
527 *val = ppb_recr(ppbus);
528 break;
529 case PPIGFIFO: /* read FIFO */
530 *val = ppb_rfifo(ppbus);
531 break;
532 case PPISDATA: /* set data register */
533 ppb_wdtr(ppbus, *val);
534 break;
535 case PPISSTATUS: /* set status bits */
536 ppb_wstr(ppbus, *val);
537 break;
538 case PPISCTRL: /* set control bits */
539 ppb_wctr(ppbus, *val);
540 break;
541 case PPISEPPD: /* set EPP data bits */
542 ppb_wepp_D(ppbus, *val);
543 break;
544 case PPISECR: /* set ECP bits */
545 ppb_wecr(ppbus, *val);
546 break;
547 case PPISFIFO: /* write FIFO */
548 ppb_wfifo(ppbus, *val);
549 break;
550 case PPIGEPPA: /* get EPP address bits */
551 *val = ppb_repp_A(ppbus);
552 break;
553 case PPISEPPA: /* set EPP address bits */
554 ppb_wepp_A(ppbus, *val);
555 break;
556 default:
557 error = ENOTTY;
558 break;
559 }
560
561 return (error);
562}
563
564static device_method_t ppi_methods[] = {
565 /* device interface */
566 DEVMETHOD(device_identify, ppi_identify),
567 DEVMETHOD(device_probe, ppi_probe),
568 DEVMETHOD(device_attach, ppi_attach),
569
570 { 0, 0 }
571};
572
573static driver_t ppi_driver = {
574 "ppi",
575 ppi_methods,
576 sizeof(struct ppi_data),
577};
578DRIVER_MODULE(ppi, ppbus, ppi_driver, ppi_devclass, 0, 0);