1/*-
2 * Copyright (c) 1995, 1996 Matt Thomas <matt@3am-software.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. The name of the author may not be used to endorse or promote products
11 * derived from this software withough specific prior written permission
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * $FreeBSD: head/sys/dev/pdq/pdqreg.h 67899 2000-10-29 16:57:42Z phk $
25 *
26 */
27
28/*
29 * DEC PDQ FDDI Controller; PDQ port driver definitions
30 *
31 */
32
33#ifndef _PDQREG_H
34#define _PDQREG_H
35
36#if defined(PDQTEST) && !defined(PDQ_NDEBUG)
37#include <assert.h>
38#define PDQ_ASSERT assert
39#else
40#define PDQ_ASSERT(x) do { } while(0)
41#endif
42
43#define PDQ_RING_SIZE(array) ((sizeof(array) / sizeof(array[0])))
--- 254 unchanged lines hidden (view full) ---
298 rxd_seg_len_hi : 9,
299 rxd_seg_len_lo : 2,
300 rxd_sop : 1);
301 pdq_uint32_t rxd_pa_lo;
302} pdq_rxdesc_t;
303
304typedef union {
305 pdq_uint32_t rxs_status;
306 pdq_uint32_t PDQ_BITFIELD12(rxs_len : 13,
307 rxs_rcc_ss : 2,
308 rxs_rcc_dd : 2,
309 rxs_rcc_reason : 3,
310 rxs_rcc_badcrc : 1,
311 rxs_rcc_badpdu : 1,
312 rxs_fsb__reserved : 2,
313 rxs_fsb_c : 1,
314 rxs_fsb_a : 1,
315 rxs_fsb_e : 1,
316 rxs_fsc : 3,
317 rxs__reserved : 2);
318} pdq_rxstatus_t;
319
320typedef struct {
321 pdq_uint32_t PDQ_BITFIELD5(txd_pa_hi : 16,
322 txd_seg_len : 13,
323 txd_mbz : 1,
324 txd_eop : 1,
325 txd_sop : 1);
326 pdq_uint32_t txd_pa_lo;
327} pdq_txdesc_t;
--- 4 unchanged lines hidden (view full) ---
332 pdq_rxdesc_t pdqdb_host_smt[64]; /* 512; 0x1000..0x11FF */
333 pdq_rxdesc_t pdqdb_unsolicited_events[16]; /* 128; 0x1200..0x127F */
334 pdq_rxdesc_t pdqdb_command_responses[16]; /* 128; 0x1280..0x12FF */
335 pdq_txdesc_t pdqdb_command_requests[16]; /* 128; 0x1300..0x137F */
336 /*
337 * The rest of the descriptor block is unused.
338 * As such we could use it for other things.
339 */
340 pdq_consumer_block_t pdqdb_consumer; /* 64; 0x1380..0x13BF */
341 void *pdqdb_receive_buffers[256]; /* 1024/2048; 0x13C0..0x17BF 0x13C0..0x1BBF */
342 void *pdqdb_host_smt_buffers[64]; /* 256/ 512; 0x17C0..0x18BF 0x1BC0..0x1DBF */
343 /*
344 * The maximum command size is 512 so as long as thes
345 * command is at least that long all will be fine.
346 */
347#if defined(__alpha) || defined(__alpha__)
348 pdq_uint32_t pdqdb_command_pool[144];
349#else
350 pdq_uint32_t pdqdb_command_pool[464];
351#endif
352} pdq_descriptor_block_t;
353
354typedef struct {
355 /*
356 * These value manage the available space in command/response
357 * buffer area.
358 */
359 pdq_physaddr_t ci_pa_bufstart;
360 pdq_uint8_t *ci_bufstart;
361 /*
362 * Bitmask of commands to sent to the PDQ
363 */
364 pdq_uint32_t ci_pending_commands;
365 /*
366 * Variables to maintain the PDQ queues.
367 */
368 pdq_uint32_t ci_command_active;
369 pdq_uint32_t ci_request_producer;
370 pdq_uint32_t ci_response_producer;
371 pdq_uint32_t ci_request_completion;
372 pdq_uint32_t ci_response_completion;
373} pdq_command_info_t;
374
375#define PDQ_SIZE_UNSOLICITED_EVENT 512
376#define PDQ_NUM_UNSOLICITED_EVENTS (PDQ_OS_PAGESIZE / PDQ_SIZE_UNSOLICITED_EVENT)
377
378typedef struct _pdq_unsolicited_event_t pdq_unsolicited_event_t;
379
380typedef struct {
381 pdq_physaddr_t ui_pa_bufstart;
382 pdq_unsolicited_event_t *ui_events;
383
384 pdq_uint32_t ui_free;
385 pdq_uint32_t ui_producer;
386 pdq_uint32_t ui_completion;
387} pdq_unsolicited_info_t;
388
389#define PDQ_RX_FC_OFFSET (sizeof(pdq_rxstatus_t) + 3)
--- 14 unchanged lines hidden (view full) ---
404
405typedef struct {
406 void *q_head;
407 void *q_tail;
408} pdq_databuf_queue_t;
409
410typedef struct {
411 void *rx_buffers;
412
413 pdq_uint32_t rx_target;
414 pdq_uint32_t rx_free;
415 pdq_uint32_t rx_producer;
416 pdq_uint32_t rx_completion;
417} pdq_rx_info_t;
418
419typedef struct {
420 pdq_databuf_queue_t tx_txq;
421 pdq_txdesc_t tx_hdrdesc;
422 pdq_uint8_t tx_descriptor_count[256];
423
424 pdq_uint32_t tx_free;
425 pdq_uint32_t tx_producer;
426 pdq_uint32_t tx_completion;
427} pdq_tx_info_t;
428
429struct _pdq_t {
430 pdq_csrs_t pdq_csrs;
431 pdq_pci_csrs_t pdq_pci_csrs;
432 pdq_type_t pdq_type;
433 pdq_chip_rev_t pdq_chip_rev;
434 pdq_lanaddr_t pdq_hwaddr;
435 pdq_fwrev_t pdq_fwrev;
436 pdq_descriptor_block_t *pdq_dbp;
437 volatile pdq_consumer_block_t *pdq_cbp;
438 pdq_uint32_t pdq_flags;
439#define PDQ_PROMISC 0x0001
440#define PDQ_ALLMULTI 0x0002
441#define PDQ_PASS_SMT 0x0004
442#define PDQ_RUNNING 0x0008
443#define PDQ_PRINTCHARS 0x0010
444#define PDQ_TXOK 0x0020
445 const char *pdq_os_name;
446 void *pdq_os_ctx;
447 pdq_uint32_t pdq_unit;
448 pdq_command_info_t pdq_command_info;
449 pdq_unsolicited_info_t pdq_unsolicited_info;
450 pdq_tx_info_t pdq_tx_info;
451 pdq_rx_info_t pdq_rx_info;
452 pdq_rx_info_t pdq_host_smt_info;
453 pdq_uint8_t pdq_tx_hdr[3];
454};
455
456typedef enum {
457 PDQC_START=0,
458 PDQC_FILTER_SET=1,
459 PDQC_FILTER_GET=2,
460 PDQC_CHARS_SET=3,
461 PDQC_STATUS_CHARS_GET=4,
462 PDQC_COUNTERS_GET=5,
463 PDQC_COUNTERS_SET=6,
464 PDQC_ADDR_FILTER_SET=7,
465 PDQC_ADDR_FILTER_GET=8,
466 PDQC_ERROR_LOG_CLEAR=9,
467 PDQC_ERROR_LOG_GET=10,
468 PDQC_FDDI_MIB_GET=11,
469 PDQC_DEC_EXT_MIB_GET=12,
470 PDQC_DEV_SPECIFIC_GET=13,
471 PDQC_SNMP_SET=14,
472 PDQC_SMT_MIB_GET=16,
473 PDQC_SMT_MIB_SET=17
474} pdq_cmd_code_t;
475
476typedef enum {
477 PDQR_SUCCESS=0,
478 PDQR_FAILURE=1,
479 PDQR_WARNING=2,
480 PDQR_LOOP_MODE_BAD=3,
481 PDQR_ITEM_CODE_BAD=4,
482 PDQR_TVX_BAD=5,
483 PDQR_TREQ_BAD=6,
--- 67 unchanged lines hidden (view full) ---
551 PDQI_PATH_TMAX_LOWER_BOUND=39,
552 PDQI_PATH_MAX_TREQ=40,
553 PDQI_MAC_TREQ=41,
554 PDQI_EMAC_RING_PURGER=42,
555 PDQI_EMAC_RTOKEN_TIMEOUT=43,
556 PDQI_FULL_DUPLEX_ENABLE=44
557} pdq_item_code_t;
558
559enum _pdq_boolean_t {
560 PDQ_FALSE=0,
561 PDQ_TRUE=1
562};
563
564typedef enum {
565 PDQ_FILTER_BLOCK=0,
566 PDQ_FILTER_PASS=1
--- 384 unchanged lines hidden (view full) ---
951 pdq_boolean_t fdx_enable;
952 pdq_boolean_t fdx_operational;
953 pdq_fdx_state_t fdx_state;
954 } dec_ext_mib_get;
955} pdq_response_dec_ext_mib_get_t;
956
957#define PDQ_SIZE_RESPONSE_DEC_EXT_MIB_GET 0x50
958
959typedef enum {
960 PDQ_CALLER_ID_NONE=0,
961 PDQ_CALLER_ID_SELFTEST=1,
962 PDQ_CALLER_ID_MFG=2,
963 PDQ_CALLER_ID_FIRMWARE=5,
964 PDQ_CALLER_ID_CONSOLE=8
965} pdq_caller_id_t;
966
--- 22 unchanged lines hidden (view full) ---
989typedef enum {
990 PDQ_UNSOLICITED_EVENT=0,
991 PDQ_UNSOLICITED_COUNTERS=1
992} pdq_event_t;
993
994typedef enum {
995 PDQ_ENTITY_STATION=0,
996 PDQ_ENTITY_LINK=1,
997 PDQ_ENTITY_PHY_PORT=2
998} pdq_entity_t;
999
1000typedef enum {
1001 PDQ_STATION_EVENT_TRACE_RECEIVED=1
1002} pdq_station_event_t;
1003
1004typedef enum {
1005 PDQ_STATION_EVENT_ARGUMENT_REASON=0, /* pdq_uint32_t */
1006 PDQ_STATION_EVENT_ARGUMENT_EOL=0xFF
1007} pdq_station_event_argument_t;
1008
1009typedef enum {
--- 7 unchanged lines hidden (view full) ---
1017 PDQ_LINK_EVENT_RING_INITIALIZATION_INITIATED=10,
1018 PDQ_LINK_EVENT_RING_INITIALIZATION_RECEIVED=11,
1019 PDQ_LINK_EVENT_RING_BEACON_INITIATED=12,
1020 PDQ_LINK_EVENT_DUPLICATE_ADDRESS_FAILURE=13,
1021 PDQ_LINK_EVENT_DUPLICATE_TOKEN_DETECTED=14,
1022 PDQ_LINK_EVENT_RING_PURGE_ERROR=15,
1023 PDQ_LINK_EVENT_FCI_STRIP_ERROR=16,
1024 PDQ_LINK_EVENT_TRACE_INITIATED=17,
1025 PDQ_LINK_EVENT_DIRECTED_BEACON_RECEIVED=18
1026} pdq_link_event_t;
1027
1028typedef enum {
1029 PDQ_LINK_EVENT_ARGUMENT_REASON=0, /* pdq_rireason_t */
1030 PDQ_LINK_EVENT_ARGUMENT_DATA_LINK_HEADER=1, /* pdq_dlhdr_t */
1031 PDQ_LINK_EVENT_ARGUMENT_SOURCE=2, /* pdq_lanaddr_t */
1032 PDQ_LINK_EVENT_ARGUMENT_UPSTREAM_NEIGHBOR=3,/* pdq_lanaddr_t */
1033 PDQ_LINK_EVENT_ARGUMENT_EOL=0xFF
1034} pdq_link_event_argument_t;
1035
1036typedef enum {
1037 PDQ_PHY_EVENT_LEM_ERROR_MONITOR_REJECT=0,
1038 PDQ_PHY_EVENT_ELASTICITY_BUFFER_ERROR=1,
1039 PDQ_PHY_EVENT_LINK_CONFIDENCE_TEST_REJECT=2
1040} pdq_phy_event_t;
1041
1042typedef enum {
1043 PDQ_PHY_EVENT_ARGUMENT_DIRECTION=0, /* pdq_lct_direction_t */
1044 PDQ_PHY_EVENT_ARGUMENT_EOL=0xFF
1045} pdq_phy_event_arguments;
1046
1047struct _pdq_unsolicited_event_t {
--- 17 unchanged lines hidden ---
2 * Copyright (c) 1995, 1996 Matt Thomas <matt@3am-software.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. The name of the author may not be used to endorse or promote products
11 * derived from this software withough specific prior written permission
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * $FreeBSD: head/sys/dev/pdq/pdqreg.h 67899 2000-10-29 16:57:42Z phk $
25 *
26 */
27
28/*
29 * DEC PDQ FDDI Controller; PDQ port driver definitions
30 *
31 */
32
33#ifndef _PDQREG_H
34#define _PDQREG_H
35
36#if defined(PDQTEST) && !defined(PDQ_NDEBUG)
37#include <assert.h>
38#define PDQ_ASSERT assert
39#else
40#define PDQ_ASSERT(x) do { } while(0)
41#endif
42
43#define PDQ_RING_SIZE(array) ((sizeof(array) / sizeof(array[0])))
--- 254 unchanged lines hidden (view full) ---
298 rxd_seg_len_hi : 9,
299 rxd_seg_len_lo : 2,
300 rxd_sop : 1);
301 pdq_uint32_t rxd_pa_lo;
302} pdq_rxdesc_t;
303
304typedef union {
305 pdq_uint32_t rxs_status;
306 pdq_uint32_t PDQ_BITFIELD12(rxs_len : 13,
307 rxs_rcc_ss : 2,
308 rxs_rcc_dd : 2,
309 rxs_rcc_reason : 3,
310 rxs_rcc_badcrc : 1,
311 rxs_rcc_badpdu : 1,
312 rxs_fsb__reserved : 2,
313 rxs_fsb_c : 1,
314 rxs_fsb_a : 1,
315 rxs_fsb_e : 1,
316 rxs_fsc : 3,
317 rxs__reserved : 2);
318} pdq_rxstatus_t;
319
320typedef struct {
321 pdq_uint32_t PDQ_BITFIELD5(txd_pa_hi : 16,
322 txd_seg_len : 13,
323 txd_mbz : 1,
324 txd_eop : 1,
325 txd_sop : 1);
326 pdq_uint32_t txd_pa_lo;
327} pdq_txdesc_t;
--- 4 unchanged lines hidden (view full) ---
332 pdq_rxdesc_t pdqdb_host_smt[64]; /* 512; 0x1000..0x11FF */
333 pdq_rxdesc_t pdqdb_unsolicited_events[16]; /* 128; 0x1200..0x127F */
334 pdq_rxdesc_t pdqdb_command_responses[16]; /* 128; 0x1280..0x12FF */
335 pdq_txdesc_t pdqdb_command_requests[16]; /* 128; 0x1300..0x137F */
336 /*
337 * The rest of the descriptor block is unused.
338 * As such we could use it for other things.
339 */
340 pdq_consumer_block_t pdqdb_consumer; /* 64; 0x1380..0x13BF */
341 void *pdqdb_receive_buffers[256]; /* 1024/2048; 0x13C0..0x17BF 0x13C0..0x1BBF */
342 void *pdqdb_host_smt_buffers[64]; /* 256/ 512; 0x17C0..0x18BF 0x1BC0..0x1DBF */
343 /*
344 * The maximum command size is 512 so as long as thes
345 * command is at least that long all will be fine.
346 */
347#if defined(__alpha) || defined(__alpha__)
348 pdq_uint32_t pdqdb_command_pool[144];
349#else
350 pdq_uint32_t pdqdb_command_pool[464];
351#endif
352} pdq_descriptor_block_t;
353
354typedef struct {
355 /*
356 * These value manage the available space in command/response
357 * buffer area.
358 */
359 pdq_physaddr_t ci_pa_bufstart;
360 pdq_uint8_t *ci_bufstart;
361 /*
362 * Bitmask of commands to sent to the PDQ
363 */
364 pdq_uint32_t ci_pending_commands;
365 /*
366 * Variables to maintain the PDQ queues.
367 */
368 pdq_uint32_t ci_command_active;
369 pdq_uint32_t ci_request_producer;
370 pdq_uint32_t ci_response_producer;
371 pdq_uint32_t ci_request_completion;
372 pdq_uint32_t ci_response_completion;
373} pdq_command_info_t;
374
375#define PDQ_SIZE_UNSOLICITED_EVENT 512
376#define PDQ_NUM_UNSOLICITED_EVENTS (PDQ_OS_PAGESIZE / PDQ_SIZE_UNSOLICITED_EVENT)
377
378typedef struct _pdq_unsolicited_event_t pdq_unsolicited_event_t;
379
380typedef struct {
381 pdq_physaddr_t ui_pa_bufstart;
382 pdq_unsolicited_event_t *ui_events;
383
384 pdq_uint32_t ui_free;
385 pdq_uint32_t ui_producer;
386 pdq_uint32_t ui_completion;
387} pdq_unsolicited_info_t;
388
389#define PDQ_RX_FC_OFFSET (sizeof(pdq_rxstatus_t) + 3)
--- 14 unchanged lines hidden (view full) ---
404
405typedef struct {
406 void *q_head;
407 void *q_tail;
408} pdq_databuf_queue_t;
409
410typedef struct {
411 void *rx_buffers;
412
413 pdq_uint32_t rx_target;
414 pdq_uint32_t rx_free;
415 pdq_uint32_t rx_producer;
416 pdq_uint32_t rx_completion;
417} pdq_rx_info_t;
418
419typedef struct {
420 pdq_databuf_queue_t tx_txq;
421 pdq_txdesc_t tx_hdrdesc;
422 pdq_uint8_t tx_descriptor_count[256];
423
424 pdq_uint32_t tx_free;
425 pdq_uint32_t tx_producer;
426 pdq_uint32_t tx_completion;
427} pdq_tx_info_t;
428
429struct _pdq_t {
430 pdq_csrs_t pdq_csrs;
431 pdq_pci_csrs_t pdq_pci_csrs;
432 pdq_type_t pdq_type;
433 pdq_chip_rev_t pdq_chip_rev;
434 pdq_lanaddr_t pdq_hwaddr;
435 pdq_fwrev_t pdq_fwrev;
436 pdq_descriptor_block_t *pdq_dbp;
437 volatile pdq_consumer_block_t *pdq_cbp;
438 pdq_uint32_t pdq_flags;
439#define PDQ_PROMISC 0x0001
440#define PDQ_ALLMULTI 0x0002
441#define PDQ_PASS_SMT 0x0004
442#define PDQ_RUNNING 0x0008
443#define PDQ_PRINTCHARS 0x0010
444#define PDQ_TXOK 0x0020
445 const char *pdq_os_name;
446 void *pdq_os_ctx;
447 pdq_uint32_t pdq_unit;
448 pdq_command_info_t pdq_command_info;
449 pdq_unsolicited_info_t pdq_unsolicited_info;
450 pdq_tx_info_t pdq_tx_info;
451 pdq_rx_info_t pdq_rx_info;
452 pdq_rx_info_t pdq_host_smt_info;
453 pdq_uint8_t pdq_tx_hdr[3];
454};
455
456typedef enum {
457 PDQC_START=0,
458 PDQC_FILTER_SET=1,
459 PDQC_FILTER_GET=2,
460 PDQC_CHARS_SET=3,
461 PDQC_STATUS_CHARS_GET=4,
462 PDQC_COUNTERS_GET=5,
463 PDQC_COUNTERS_SET=6,
464 PDQC_ADDR_FILTER_SET=7,
465 PDQC_ADDR_FILTER_GET=8,
466 PDQC_ERROR_LOG_CLEAR=9,
467 PDQC_ERROR_LOG_GET=10,
468 PDQC_FDDI_MIB_GET=11,
469 PDQC_DEC_EXT_MIB_GET=12,
470 PDQC_DEV_SPECIFIC_GET=13,
471 PDQC_SNMP_SET=14,
472 PDQC_SMT_MIB_GET=16,
473 PDQC_SMT_MIB_SET=17
474} pdq_cmd_code_t;
475
476typedef enum {
477 PDQR_SUCCESS=0,
478 PDQR_FAILURE=1,
479 PDQR_WARNING=2,
480 PDQR_LOOP_MODE_BAD=3,
481 PDQR_ITEM_CODE_BAD=4,
482 PDQR_TVX_BAD=5,
483 PDQR_TREQ_BAD=6,
--- 67 unchanged lines hidden (view full) ---
551 PDQI_PATH_TMAX_LOWER_BOUND=39,
552 PDQI_PATH_MAX_TREQ=40,
553 PDQI_MAC_TREQ=41,
554 PDQI_EMAC_RING_PURGER=42,
555 PDQI_EMAC_RTOKEN_TIMEOUT=43,
556 PDQI_FULL_DUPLEX_ENABLE=44
557} pdq_item_code_t;
558
559enum _pdq_boolean_t {
560 PDQ_FALSE=0,
561 PDQ_TRUE=1
562};
563
564typedef enum {
565 PDQ_FILTER_BLOCK=0,
566 PDQ_FILTER_PASS=1
--- 384 unchanged lines hidden (view full) ---
951 pdq_boolean_t fdx_enable;
952 pdq_boolean_t fdx_operational;
953 pdq_fdx_state_t fdx_state;
954 } dec_ext_mib_get;
955} pdq_response_dec_ext_mib_get_t;
956
957#define PDQ_SIZE_RESPONSE_DEC_EXT_MIB_GET 0x50
958
959typedef enum {
960 PDQ_CALLER_ID_NONE=0,
961 PDQ_CALLER_ID_SELFTEST=1,
962 PDQ_CALLER_ID_MFG=2,
963 PDQ_CALLER_ID_FIRMWARE=5,
964 PDQ_CALLER_ID_CONSOLE=8
965} pdq_caller_id_t;
966
--- 22 unchanged lines hidden (view full) ---
989typedef enum {
990 PDQ_UNSOLICITED_EVENT=0,
991 PDQ_UNSOLICITED_COUNTERS=1
992} pdq_event_t;
993
994typedef enum {
995 PDQ_ENTITY_STATION=0,
996 PDQ_ENTITY_LINK=1,
997 PDQ_ENTITY_PHY_PORT=2
998} pdq_entity_t;
999
1000typedef enum {
1001 PDQ_STATION_EVENT_TRACE_RECEIVED=1
1002} pdq_station_event_t;
1003
1004typedef enum {
1005 PDQ_STATION_EVENT_ARGUMENT_REASON=0, /* pdq_uint32_t */
1006 PDQ_STATION_EVENT_ARGUMENT_EOL=0xFF
1007} pdq_station_event_argument_t;
1008
1009typedef enum {
--- 7 unchanged lines hidden (view full) ---
1017 PDQ_LINK_EVENT_RING_INITIALIZATION_INITIATED=10,
1018 PDQ_LINK_EVENT_RING_INITIALIZATION_RECEIVED=11,
1019 PDQ_LINK_EVENT_RING_BEACON_INITIATED=12,
1020 PDQ_LINK_EVENT_DUPLICATE_ADDRESS_FAILURE=13,
1021 PDQ_LINK_EVENT_DUPLICATE_TOKEN_DETECTED=14,
1022 PDQ_LINK_EVENT_RING_PURGE_ERROR=15,
1023 PDQ_LINK_EVENT_FCI_STRIP_ERROR=16,
1024 PDQ_LINK_EVENT_TRACE_INITIATED=17,
1025 PDQ_LINK_EVENT_DIRECTED_BEACON_RECEIVED=18
1026} pdq_link_event_t;
1027
1028typedef enum {
1029 PDQ_LINK_EVENT_ARGUMENT_REASON=0, /* pdq_rireason_t */
1030 PDQ_LINK_EVENT_ARGUMENT_DATA_LINK_HEADER=1, /* pdq_dlhdr_t */
1031 PDQ_LINK_EVENT_ARGUMENT_SOURCE=2, /* pdq_lanaddr_t */
1032 PDQ_LINK_EVENT_ARGUMENT_UPSTREAM_NEIGHBOR=3,/* pdq_lanaddr_t */
1033 PDQ_LINK_EVENT_ARGUMENT_EOL=0xFF
1034} pdq_link_event_argument_t;
1035
1036typedef enum {
1037 PDQ_PHY_EVENT_LEM_ERROR_MONITOR_REJECT=0,
1038 PDQ_PHY_EVENT_ELASTICITY_BUFFER_ERROR=1,
1039 PDQ_PHY_EVENT_LINK_CONFIDENCE_TEST_REJECT=2
1040} pdq_phy_event_t;
1041
1042typedef enum {
1043 PDQ_PHY_EVENT_ARGUMENT_DIRECTION=0, /* pdq_lct_direction_t */
1044 PDQ_PHY_EVENT_ARGUMENT_EOL=0xFF
1045} pdq_phy_event_arguments;
1046
1047struct _pdq_unsolicited_event_t {
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