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pdq.c (50477) pdq.c (93383)
1/* $NetBSD: pdq.c,v 1.33 2001/11/13 13:14:43 lukem Exp $ */
2
1/*-
2 * Copyright (c) 1995,1996 Matt Thomas <matt@3am-software.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. The name of the author may not be used to endorse or promote products
3/*-
4 * Copyright (c) 1995,1996 Matt Thomas <matt@3am-software.com>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. The name of the author may not be used to endorse or promote products
11 * derived from this software withough specific prior written permission
13 * derived from this software without specific prior written permission
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
24 * $FreeBSD: head/sys/dev/pdq/pdq.c 50477 1999-08-28 01:08:13Z peter $
26 * Id: pdq.c,v 1.32 1997/06/05 01:56:35 thomas Exp
27 * $FreeBSD: head/sys/dev/pdq/pdq.c 93383 2002-03-29 11:22:22Z mdodd $
25 *
26 */
27
28/*
29 * DEC PDQ FDDI Controller O/S independent code
30 *
28 *
29 */
30
31/*
32 * DEC PDQ FDDI Controller O/S independent code
33 *
31 * This module should work any PDQ based board. Note that changes for
34 * This module should work any on PDQ based board. Note that changes for
32 * MIPS and Alpha architectures (or any other architecture which requires
33 * a flushing of memory or write buffers and/or has incoherent caches)
34 * have yet to be made.
35 *
36 * However, it is expected that the PDQ_CSR_WRITE macro will cause a
37 * flushing of the write buffers.
38 */
39
35 * MIPS and Alpha architectures (or any other architecture which requires
36 * a flushing of memory or write buffers and/or has incoherent caches)
37 * have yet to be made.
38 *
39 * However, it is expected that the PDQ_CSR_WRITE macro will cause a
40 * flushing of the write buffers.
41 */
42
43#ifdef __NetBSD__
44#include <sys/cdefs.h>
45__KERNEL_RCSID(0, "$NetBSD: pdq.c,v 1.33 2001/11/13 13:14:43 lukem Exp $");
46#endif
47
40#define PDQ_HWSUPPORT /* for pdq.h */
41
42#if defined(__FreeBSD__)
48#define PDQ_HWSUPPORT /* for pdq.h */
49
50#if defined(__FreeBSD__)
43#include <dev/pdq/pdqvar.h>
51/*
52 * What a botch having to specific includes for FreeBSD!
53 */
54#include <dev/pdq/pdq_freebsd.h>
44#include <dev/pdq/pdqreg.h>
45#else
46#include "pdqvar.h"
47#include "pdqreg.h"
48#endif
49
50#define PDQ_ROUNDUP(n, x) (((n) + ((x) - 1)) & ~((x) - 1))
51#define PDQ_CMD_RX_ALIGNMENT 16

--- 19 unchanged lines hidden (view full) ---

71 * The following are used in conjunction with
72 * unsolicited events
73 */
74static const char * const pdq_entities[] = {
75 "Station", "Link", "Phy Port"
76};
77
78static const char * const pdq_station_events[] = {
55#include <dev/pdq/pdqreg.h>
56#else
57#include "pdqvar.h"
58#include "pdqreg.h"
59#endif
60
61#define PDQ_ROUNDUP(n, x) (((n) + ((x) - 1)) & ~((x) - 1))
62#define PDQ_CMD_RX_ALIGNMENT 16

--- 19 unchanged lines hidden (view full) ---

82 * The following are used in conjunction with
83 * unsolicited events
84 */
85static const char * const pdq_entities[] = {
86 "Station", "Link", "Phy Port"
87};
88
89static const char * const pdq_station_events[] = {
90 "Unknown Event #0",
79 "Trace Received"
80};
81
82static const char * const pdq_station_arguments[] = {
83 "Reason"
84};
85
86static const char * const pdq_link_events[] = {

--- 126 unchanged lines hidden (view full) ---

213 pdq_pmd_types[rsp->status_chars_get.pmd_type[0] / 100][rsp->status_chars_get.pmd_type[0] % 100]);
214
215 if (rsp->status_chars_get.station_type == PDQ_STATION_TYPE_DAS)
216 printf(", FDDI Port[B] = %c (PMD = %s)",
217 pdq_phy_types[rsp->status_chars_get.phy_type[1]],
218 pdq_pmd_types[rsp->status_chars_get.pmd_type[1] / 100][rsp->status_chars_get.pmd_type[1] % 100]);
219
220 printf("\n");
91 "Trace Received"
92};
93
94static const char * const pdq_station_arguments[] = {
95 "Reason"
96};
97
98static const char * const pdq_link_events[] = {

--- 126 unchanged lines hidden (view full) ---

225 pdq_pmd_types[rsp->status_chars_get.pmd_type[0] / 100][rsp->status_chars_get.pmd_type[0] % 100]);
226
227 if (rsp->status_chars_get.station_type == PDQ_STATION_TYPE_DAS)
228 printf(", FDDI Port[B] = %c (PMD = %s)",
229 pdq_phy_types[rsp->status_chars_get.phy_type[1]],
230 pdq_pmd_types[rsp->status_chars_get.pmd_type[1] / 100][rsp->status_chars_get.pmd_type[1] % 100]);
231
232 printf("\n");
233
234 pdq_os_update_status(pdq, rsp);
221}
222
223static void
224pdq_init_csrs(
225 pdq_csrs_t *csrs,
226 pdq_bus_t bus,
227 pdq_bus_memaddr_t csr_base,
228 size_t csrsize)

--- 27 unchanged lines hidden (view full) ---

256 csrs->csr_pfi_mode_control = PDQ_CSR_OFFSET(csr_base, 16 * csrsize);
257 csrs->csr_pfi_status = PDQ_CSR_OFFSET(csr_base, 17 * csrsize);
258 csrs->csr_fifo_write = PDQ_CSR_OFFSET(csr_base, 18 * csrsize);
259 csrs->csr_fifo_read = PDQ_CSR_OFFSET(csr_base, 19 * csrsize);
260}
261
262static void
263pdq_flush_databuf_queue(
235}
236
237static void
238pdq_init_csrs(
239 pdq_csrs_t *csrs,
240 pdq_bus_t bus,
241 pdq_bus_memaddr_t csr_base,
242 size_t csrsize)

--- 27 unchanged lines hidden (view full) ---

270 csrs->csr_pfi_mode_control = PDQ_CSR_OFFSET(csr_base, 16 * csrsize);
271 csrs->csr_pfi_status = PDQ_CSR_OFFSET(csr_base, 17 * csrsize);
272 csrs->csr_fifo_write = PDQ_CSR_OFFSET(csr_base, 18 * csrsize);
273 csrs->csr_fifo_read = PDQ_CSR_OFFSET(csr_base, 19 * csrsize);
274}
275
276static void
277pdq_flush_databuf_queue(
278 pdq_t *pdq,
264 pdq_databuf_queue_t *q)
265{
266 PDQ_OS_DATABUF_T *pdu;
267 for (;;) {
268 PDQ_OS_DATABUF_DEQUEUE(q, pdu);
269 if (pdu == NULL)
270 return;
279 pdq_databuf_queue_t *q)
280{
281 PDQ_OS_DATABUF_T *pdu;
282 for (;;) {
283 PDQ_OS_DATABUF_DEQUEUE(q, pdu);
284 if (pdu == NULL)
285 return;
271 PDQ_OS_DATABUF_FREE(pdu);
286 PDQ_OS_DATABUF_FREE(pdq, pdu);
272 }
273}
274
275static pdq_boolean_t
276pdq_do_port_control(
277 const pdq_csrs_t * const csrs,
278 pdq_uint32_t cmd)
279{

--- 124 unchanged lines hidden (view full) ---

404 { sizeof(pdq_cmd_addr_filter_set_t), /* 7 - PDQC_ADDR_FILTER_SET */
405 sizeof(pdq_response_generic_t),
406 "Addr Filter Set"
407 },
408 { sizeof(pdq_cmd_generic_t), /* 8 - PDQC_ADDR_FILTER_GET */
409 sizeof(pdq_response_addr_filter_get_t),
410 "Addr Filter Get"
411 },
287 }
288}
289
290static pdq_boolean_t
291pdq_do_port_control(
292 const pdq_csrs_t * const csrs,
293 pdq_uint32_t cmd)
294{

--- 124 unchanged lines hidden (view full) ---

419 { sizeof(pdq_cmd_addr_filter_set_t), /* 7 - PDQC_ADDR_FILTER_SET */
420 sizeof(pdq_response_generic_t),
421 "Addr Filter Set"
422 },
423 { sizeof(pdq_cmd_generic_t), /* 8 - PDQC_ADDR_FILTER_GET */
424 sizeof(pdq_response_addr_filter_get_t),
425 "Addr Filter Get"
426 },
412#if 0
413 { sizeof(pdq_cmd_generic_t), /* 9 - PDQC_ERROR_LOG_CLEAR */
414 sizeof(pdq_response_generic_t),
415 "Error Log Clear"
416 },
417 { sizeof(pdq_cmd_generic_t), /* 10 - PDQC_ERROR_LOG_SET */
418 sizeof(pdq_response_generic_t),
419 "Error Log Set"
420 },

--- 17 unchanged lines hidden (view full) ---

438 { sizeof(pdq_cmd_generic_t), /* 16 - PDQC_SMT_MIB_GET */
439 sizeof(pdq_response_generic_t),
440 "SMT MIB Get"
441 },
442 { sizeof(pdq_cmd_generic_t), /* 17 - PDQC_SMT_MIB_SET */
443 sizeof(pdq_response_generic_t),
444 "SMT MIB Set",
445 },
427 { sizeof(pdq_cmd_generic_t), /* 9 - PDQC_ERROR_LOG_CLEAR */
428 sizeof(pdq_response_generic_t),
429 "Error Log Clear"
430 },
431 { sizeof(pdq_cmd_generic_t), /* 10 - PDQC_ERROR_LOG_SET */
432 sizeof(pdq_response_generic_t),
433 "Error Log Set"
434 },

--- 17 unchanged lines hidden (view full) ---

452 { sizeof(pdq_cmd_generic_t), /* 16 - PDQC_SMT_MIB_GET */
453 sizeof(pdq_response_generic_t),
454 "SMT MIB Get"
455 },
456 { sizeof(pdq_cmd_generic_t), /* 17 - PDQC_SMT_MIB_SET */
457 sizeof(pdq_response_generic_t),
458 "SMT MIB Set",
459 },
446#endif
460 { 0, 0, "Bogus CMD" },
447};
448
449static void
450pdq_queue_commands(
451 pdq_t *pdq)
452{
453 const pdq_csrs_t * const csrs = &pdq->pdq_csrs;
454 pdq_command_info_t * const ci = &pdq->pdq_command_info;
455 pdq_descriptor_block_t * const dbp = pdq->pdq_dbp;
461};
462
463static void
464pdq_queue_commands(
465 pdq_t *pdq)
466{
467 const pdq_csrs_t * const csrs = &pdq->pdq_csrs;
468 pdq_command_info_t * const ci = &pdq->pdq_command_info;
469 pdq_descriptor_block_t * const dbp = pdq->pdq_dbp;
470 pdq_txdesc_t * const txd = &dbp->pdqdb_command_requests[ci->ci_request_producer];
456 pdq_cmd_code_t op;
457 pdq_uint32_t cmdlen, rsplen, mask;
458
459 /*
460 * If there are commands or responses active or there aren't
461 * any pending commands, then don't queue any more.
462 */
463 if (ci->ci_command_active || ci->ci_pending_commands == 0)

--- 18 unchanged lines hidden (view full) ---

482 * Since only one command at a time will be queued, there will always
483 * be enough space.
484 */
485
486 /*
487 * Obtain and fill in the descriptor for the command (descriptor is
488 * pre-initialized)
489 */
471 pdq_cmd_code_t op;
472 pdq_uint32_t cmdlen, rsplen, mask;
473
474 /*
475 * If there are commands or responses active or there aren't
476 * any pending commands, then don't queue any more.
477 */
478 if (ci->ci_command_active || ci->ci_pending_commands == 0)

--- 18 unchanged lines hidden (view full) ---

497 * Since only one command at a time will be queued, there will always
498 * be enough space.
499 */
500
501 /*
502 * Obtain and fill in the descriptor for the command (descriptor is
503 * pre-initialized)
504 */
490 dbp->pdqdb_command_requests[ci->ci_request_producer].txd_seg_len = cmdlen;
491 PDQ_ADVANCE(ci->ci_request_producer, 1, PDQ_RING_MASK(dbp->pdqdb_command_requests));
505 txd->txd_seg_len = cmdlen;
492
493 /*
506
507 /*
494 * Obtain and fill in the descriptor for the response (descriptor is
495 * pre-initialized)
496 */
497 dbp->pdqdb_command_responses[ci->ci_response_producer].rxd_seg_len_hi = cmdlen / 16;
498 PDQ_ADVANCE(ci->ci_response_producer, 1, PDQ_RING_MASK(dbp->pdqdb_command_responses));
499
500 /*
501 * Clear the command area, set the opcode, and the command from the pending
502 * mask.
503 */
504
508 * Clear the command area, set the opcode, and the command from the pending
509 * mask.
510 */
511
505 PDQ_OS_MEMZERO(ci->ci_bufstart, cmdlen);
506 *(pdq_cmd_code_t *) ci->ci_bufstart = op;
512 ci->ci_queued_commands[ci->ci_request_producer] = op;
513#if defined(PDQVERBOSE)
514 ((pdq_response_generic_t *) ci->ci_response_bufstart)->generic_op = PDQC_BOGUS_CMD;
515#endif
516 PDQ_OS_MEMZERO(ci->ci_request_bufstart, cmdlen);
517 *(pdq_cmd_code_t *) ci->ci_request_bufstart = op;
507 ci->ci_pending_commands &= ~mask;
508
509 /*
510 * Fill in the command area, if needed.
511 */
512 switch (op) {
513 case PDQC_FILTER_SET: {
518 ci->ci_pending_commands &= ~mask;
519
520 /*
521 * Fill in the command area, if needed.
522 */
523 switch (op) {
524 case PDQC_FILTER_SET: {
514 pdq_cmd_filter_set_t *filter_set = (pdq_cmd_filter_set_t *) ci->ci_bufstart;
525 pdq_cmd_filter_set_t *filter_set = (pdq_cmd_filter_set_t *) ci->ci_request_bufstart;
515 unsigned idx = 0;
516 filter_set->filter_set_items[idx].item_code = PDQI_IND_GROUP_PROM;
517 filter_set->filter_set_items[idx].filter_state = (pdq->pdq_flags & PDQ_PROMISC ? PDQ_FILTER_PASS : PDQ_FILTER_BLOCK);
518 idx++;
519 filter_set->filter_set_items[idx].item_code = PDQI_GROUP_PROM;
520 filter_set->filter_set_items[idx].filter_state = (pdq->pdq_flags & PDQ_ALLMULTI ? PDQ_FILTER_PASS : PDQ_FILTER_BLOCK);
521 idx++;
522 filter_set->filter_set_items[idx].item_code = PDQI_SMT_PROM;
523 filter_set->filter_set_items[idx].filter_state = ((pdq->pdq_flags & (PDQ_PROMISC|PDQ_PASS_SMT)) == (PDQ_PROMISC|PDQ_PASS_SMT) ? PDQ_FILTER_PASS : PDQ_FILTER_BLOCK);
524 idx++;
525 filter_set->filter_set_items[idx].item_code = PDQI_SMT_USER;
526 filter_set->filter_set_items[idx].filter_state = (pdq->pdq_flags & PDQ_PASS_SMT ? PDQ_FILTER_PASS : PDQ_FILTER_BLOCK);
527 idx++;
528 filter_set->filter_set_items[idx].item_code = PDQI_EOL;
529 break;
530 }
531 case PDQC_ADDR_FILTER_SET: {
526 unsigned idx = 0;
527 filter_set->filter_set_items[idx].item_code = PDQI_IND_GROUP_PROM;
528 filter_set->filter_set_items[idx].filter_state = (pdq->pdq_flags & PDQ_PROMISC ? PDQ_FILTER_PASS : PDQ_FILTER_BLOCK);
529 idx++;
530 filter_set->filter_set_items[idx].item_code = PDQI_GROUP_PROM;
531 filter_set->filter_set_items[idx].filter_state = (pdq->pdq_flags & PDQ_ALLMULTI ? PDQ_FILTER_PASS : PDQ_FILTER_BLOCK);
532 idx++;
533 filter_set->filter_set_items[idx].item_code = PDQI_SMT_PROM;
534 filter_set->filter_set_items[idx].filter_state = ((pdq->pdq_flags & (PDQ_PROMISC|PDQ_PASS_SMT)) == (PDQ_PROMISC|PDQ_PASS_SMT) ? PDQ_FILTER_PASS : PDQ_FILTER_BLOCK);
535 idx++;
536 filter_set->filter_set_items[idx].item_code = PDQI_SMT_USER;
537 filter_set->filter_set_items[idx].filter_state = (pdq->pdq_flags & PDQ_PASS_SMT ? PDQ_FILTER_PASS : PDQ_FILTER_BLOCK);
538 idx++;
539 filter_set->filter_set_items[idx].item_code = PDQI_EOL;
540 break;
541 }
542 case PDQC_ADDR_FILTER_SET: {
532 pdq_cmd_addr_filter_set_t *addr_filter_set = (pdq_cmd_addr_filter_set_t *) ci->ci_bufstart;
543 pdq_cmd_addr_filter_set_t *addr_filter_set = (pdq_cmd_addr_filter_set_t *) ci->ci_request_bufstart;
533 pdq_lanaddr_t *addr = addr_filter_set->addr_filter_set_addresses;
534 addr->lanaddr_bytes[0] = 0xFF;
535 addr->lanaddr_bytes[1] = 0xFF;
536 addr->lanaddr_bytes[2] = 0xFF;
537 addr->lanaddr_bytes[3] = 0xFF;
538 addr->lanaddr_bytes[4] = 0xFF;
539 addr->lanaddr_bytes[5] = 0xFF;
540 addr++;
541 pdq_os_addr_fill(pdq, addr, 61);
542 break;
543 }
544 pdq_lanaddr_t *addr = addr_filter_set->addr_filter_set_addresses;
545 addr->lanaddr_bytes[0] = 0xFF;
546 addr->lanaddr_bytes[1] = 0xFF;
547 addr->lanaddr_bytes[2] = 0xFF;
548 addr->lanaddr_bytes[3] = 0xFF;
549 addr->lanaddr_bytes[4] = 0xFF;
550 addr->lanaddr_bytes[5] = 0xFF;
551 addr++;
552 pdq_os_addr_fill(pdq, addr, 61);
553 break;
554 }
555 case PDQC_SNMP_SET: {
556 pdq_cmd_snmp_set_t *snmp_set = (pdq_cmd_snmp_set_t *) ci->ci_request_bufstart;
557 unsigned idx = 0;
558 snmp_set->snmp_set_items[idx].item_code = PDQSNMP_FULL_DUPLEX_ENABLE;
559 snmp_set->snmp_set_items[idx].item_value = (pdq->pdq_flags & PDQ_WANT_FDX ? 1 : 2);
560 snmp_set->snmp_set_items[idx].item_port = 0;
561 idx++;
562 snmp_set->snmp_set_items[idx].item_code = PDQSNMP_EOL;
563 break;
564 }
544 default: { /* to make gcc happy */
545 break;
546 }
547 }
565 default: { /* to make gcc happy */
566 break;
567 }
568 }
569
570
548 /*
571 /*
572 * Sync the command request buffer and descriptor, then advance
573 * the request producer index.
574 */
575 PDQ_OS_CMDRQST_PRESYNC(pdq, txd->txd_seg_len);
576 PDQ_OS_DESC_PRESYNC(pdq, txd, sizeof(pdq_txdesc_t));
577 PDQ_ADVANCE(ci->ci_request_producer, 1, PDQ_RING_MASK(dbp->pdqdb_command_requests));
578
579 /*
580 * Sync the command response buffer and advance the response
581 * producer index (descriptor is already pre-initialized)
582 */
583 PDQ_OS_CMDRSP_PRESYNC(pdq, PDQ_SIZE_COMMAND_RESPONSE);
584 PDQ_ADVANCE(ci->ci_response_producer, 1, PDQ_RING_MASK(dbp->pdqdb_command_responses));
585 /*
549 * At this point the command is done. All that needs to be done is to
550 * produce it to the PDQ.
551 */
552 PDQ_PRINTF(("PDQ Queue Command Request: %s queued\n",
553 pdq_cmd_info[op].cmd_name));
554
555 ci->ci_command_active++;
556 PDQ_CSR_WRITE(csrs, csr_cmd_response_producer, ci->ci_response_producer | (ci->ci_response_completion << 8));

--- 16 unchanged lines hidden (view full) ---

573 * consumed then the command must have been as well.
574 */
575
576 if (cbp->pdqcb_command_response == ci->ci_response_completion)
577 return;
578
579 PDQ_ASSERT(cbp->pdqcb_command_request != ci->ci_request_completion);
580
586 * At this point the command is done. All that needs to be done is to
587 * produce it to the PDQ.
588 */
589 PDQ_PRINTF(("PDQ Queue Command Request: %s queued\n",
590 pdq_cmd_info[op].cmd_name));
591
592 ci->ci_command_active++;
593 PDQ_CSR_WRITE(csrs, csr_cmd_response_producer, ci->ci_response_producer | (ci->ci_response_completion << 8));

--- 16 unchanged lines hidden (view full) ---

610 * consumed then the command must have been as well.
611 */
612
613 if (cbp->pdqcb_command_response == ci->ci_response_completion)
614 return;
615
616 PDQ_ASSERT(cbp->pdqcb_command_request != ci->ci_request_completion);
617
581 rspgen = (const pdq_response_generic_t *) ci->ci_bufstart;
618 PDQ_OS_CMDRSP_POSTSYNC(pdq, PDQ_SIZE_COMMAND_RESPONSE);
619 rspgen = (const pdq_response_generic_t *) ci->ci_response_bufstart;
620 PDQ_ASSERT(rspgen->generic_op == ci->ci_queued_commands[ci->ci_request_completion]);
582 PDQ_ASSERT(rspgen->generic_status == PDQR_SUCCESS);
621 PDQ_ASSERT(rspgen->generic_status == PDQR_SUCCESS);
583 PDQ_PRINTF(("PDQ Process Command Response: %s completed (status=%d)\n",
622 PDQ_PRINTF(("PDQ Process Command Response: %s completed (status=%d [0x%x])\n",
584 pdq_cmd_info[rspgen->generic_op].cmd_name,
623 pdq_cmd_info[rspgen->generic_op].cmd_name,
585 rspgen->generic_status));
624 rspgen->generic_status, rspgen->generic_status));
586
587 if (rspgen->generic_op == PDQC_STATUS_CHARS_GET && (pdq->pdq_flags & PDQ_PRINTCHARS)) {
588 pdq->pdq_flags &= ~PDQ_PRINTCHARS;
589 pdq_print_fddi_chars(pdq, (const pdq_response_status_chars_get_t *) rspgen);
625
626 if (rspgen->generic_op == PDQC_STATUS_CHARS_GET && (pdq->pdq_flags & PDQ_PRINTCHARS)) {
627 pdq->pdq_flags &= ~PDQ_PRINTCHARS;
628 pdq_print_fddi_chars(pdq, (const pdq_response_status_chars_get_t *) rspgen);
629 } else if (rspgen->generic_op == PDQC_DEC_EXT_MIB_GET) {
630 pdq->pdq_flags &= ~PDQ_IS_FDX;
631 if (((const pdq_response_dec_ext_mib_get_t *)rspgen)->dec_ext_mib_get.fdx_operational)
632 pdq->pdq_flags |= PDQ_IS_FDX;
590 }
591
592 PDQ_ADVANCE(ci->ci_request_completion, 1, PDQ_RING_MASK(dbp->pdqdb_command_requests));
593 PDQ_ADVANCE(ci->ci_response_completion, 1, PDQ_RING_MASK(dbp->pdqdb_command_responses));
594 ci->ci_command_active = 0;
595
596 if (ci->ci_pending_commands != 0) {
597 pdq_queue_commands(pdq);

--- 14 unchanged lines hidden (view full) ---

612static void
613pdq_process_unsolicited_events(
614 pdq_t *pdq)
615{
616 const pdq_csrs_t * const csrs = &pdq->pdq_csrs;
617 pdq_unsolicited_info_t *ui = &pdq->pdq_unsolicited_info;
618 volatile const pdq_consumer_block_t *cbp = pdq->pdq_cbp;
619 pdq_descriptor_block_t *dbp = pdq->pdq_dbp;
633 }
634
635 PDQ_ADVANCE(ci->ci_request_completion, 1, PDQ_RING_MASK(dbp->pdqdb_command_requests));
636 PDQ_ADVANCE(ci->ci_response_completion, 1, PDQ_RING_MASK(dbp->pdqdb_command_responses));
637 ci->ci_command_active = 0;
638
639 if (ci->ci_pending_commands != 0) {
640 pdq_queue_commands(pdq);

--- 14 unchanged lines hidden (view full) ---

655static void
656pdq_process_unsolicited_events(
657 pdq_t *pdq)
658{
659 const pdq_csrs_t * const csrs = &pdq->pdq_csrs;
660 pdq_unsolicited_info_t *ui = &pdq->pdq_unsolicited_info;
661 volatile const pdq_consumer_block_t *cbp = pdq->pdq_cbp;
662 pdq_descriptor_block_t *dbp = pdq->pdq_dbp;
620 const pdq_unsolicited_event_t *event;
621 pdq_rxdesc_t *rxd;
622
623 /*
624 * Process each unsolicited event (if any).
625 */
626
627 while (cbp->pdqcb_unsolicited_event != ui->ui_completion) {
663
664 /*
665 * Process each unsolicited event (if any).
666 */
667
668 while (cbp->pdqcb_unsolicited_event != ui->ui_completion) {
628 rxd = &dbp->pdqdb_unsolicited_events[ui->ui_completion];
669 const pdq_unsolicited_event_t *event;
629 event = &ui->ui_events[ui->ui_completion & (PDQ_NUM_UNSOLICITED_EVENTS-1)];
670 event = &ui->ui_events[ui->ui_completion & (PDQ_NUM_UNSOLICITED_EVENTS-1)];
671 PDQ_OS_UNSOL_EVENT_POSTSYNC(pdq, event);
630
631 switch (event->event_type) {
632 case PDQ_UNSOLICITED_EVENT: {
672
673 switch (event->event_type) {
674 case PDQ_UNSOLICITED_EVENT: {
675 int bad_event = 0;
676 switch (event->event_entity) {
677 case PDQ_ENTITY_STATION: {
678 bad_event = event->event_code.value >= PDQ_STATION_EVENT_MAX;
679 break;
680 }
681 case PDQ_ENTITY_LINK: {
682 bad_event = event->event_code.value >= PDQ_LINK_EVENT_MAX;
683 break;
684 }
685 case PDQ_ENTITY_PHY_PORT: {
686 bad_event = event->event_code.value >= PDQ_PHY_EVENT_MAX;
687 break;
688 }
689 default: {
690 bad_event = 1;
691 break;
692 }
693 }
694 if (bad_event) {
695 break;
696 }
633 printf(PDQ_OS_PREFIX "Unsolicited Event: %s: %s",
634 PDQ_OS_PREFIX_ARGS,
635 pdq_entities[event->event_entity],
636 pdq_event_codes[event->event_entity][event->event_code.value]);
637 if (event->event_entity == PDQ_ENTITY_PHY_PORT)
638 printf("[%d]", event->event_index);
639 printf("\n");
640 break;
641 }
642 case PDQ_UNSOLICITED_COUNTERS: {
643 break;
644 }
645 }
697 printf(PDQ_OS_PREFIX "Unsolicited Event: %s: %s",
698 PDQ_OS_PREFIX_ARGS,
699 pdq_entities[event->event_entity],
700 pdq_event_codes[event->event_entity][event->event_code.value]);
701 if (event->event_entity == PDQ_ENTITY_PHY_PORT)
702 printf("[%d]", event->event_index);
703 printf("\n");
704 break;
705 }
706 case PDQ_UNSOLICITED_COUNTERS: {
707 break;
708 }
709 }
710 PDQ_OS_UNSOL_EVENT_PRESYNC(pdq, event);
646 PDQ_ADVANCE(ui->ui_completion, 1, PDQ_RING_MASK(dbp->pdqdb_unsolicited_events));
647 ui->ui_free++;
648 }
649
650 /*
651 * Now give back the event buffers back to the PDQ.
652 */
653 PDQ_ADVANCE(ui->ui_producer, ui->ui_free, PDQ_RING_MASK(dbp->pdqdb_unsolicited_events));

--- 20 unchanged lines hidden (view full) ---

674 while (completion != completion_goal) {
675 PDQ_OS_DATABUF_T *fpdu, *lpdu, *npdu;
676 pdq_uint8_t *dataptr;
677 pdq_uint32_t fc, datalen, pdulen, segcnt;
678 pdq_rxstatus_t status;
679
680 fpdu = lpdu = buffers[completion];
681 PDQ_ASSERT(fpdu != NULL);
711 PDQ_ADVANCE(ui->ui_completion, 1, PDQ_RING_MASK(dbp->pdqdb_unsolicited_events));
712 ui->ui_free++;
713 }
714
715 /*
716 * Now give back the event buffers back to the PDQ.
717 */
718 PDQ_ADVANCE(ui->ui_producer, ui->ui_free, PDQ_RING_MASK(dbp->pdqdb_unsolicited_events));

--- 20 unchanged lines hidden (view full) ---

739 while (completion != completion_goal) {
740 PDQ_OS_DATABUF_T *fpdu, *lpdu, *npdu;
741 pdq_uint8_t *dataptr;
742 pdq_uint32_t fc, datalen, pdulen, segcnt;
743 pdq_rxstatus_t status;
744
745 fpdu = lpdu = buffers[completion];
746 PDQ_ASSERT(fpdu != NULL);
682
747 PDQ_OS_RXPDU_POSTSYNC(pdq, fpdu, 0, sizeof(u_int32_t));
683 dataptr = PDQ_OS_DATABUF_PTR(fpdu);
684 status = *(pdq_rxstatus_t *) dataptr;
748 dataptr = PDQ_OS_DATABUF_PTR(fpdu);
749 status = *(pdq_rxstatus_t *) dataptr;
685 if ((status.rxs_status & 0x200000) == 0) {
686 datalen = status.rxs_status & 0x1FFF;
750 if (status.rxs_rcc_badpdu == 0) {
751 datalen = status.rxs_len;
752 PDQ_OS_RXPDU_POSTSYNC(pdq, fpdu, sizeof(u_int32_t),
753 PDQ_RX_FC_OFFSET + 1 - sizeof(u_int32_t));
687 fc = dataptr[PDQ_RX_FC_OFFSET];
688 switch (fc & (PDQ_FDDIFC_C|PDQ_FDDIFC_L|PDQ_FDDIFC_F)) {
689 case PDQ_FDDI_LLC_ASYNC:
690 case PDQ_FDDI_LLC_SYNC:
691 case PDQ_FDDI_IMP_ASYNC:
692 case PDQ_FDDI_IMP_SYNC: {
693 if (datalen > PDQ_FDDI_MAX || datalen < PDQ_FDDI_LLC_MIN) {
694 PDQ_PRINTF(("discard: bad length %d\n", datalen));

--- 10 unchanged lines hidden (view full) ---

705 PDQ_PRINTF(("discard: bad fc 0x%x\n", fc));
706 goto discard_frame;
707 }
708 }
709 /*
710 * Update the lengths of the data buffers now that we know
711 * the real length.
712 */
754 fc = dataptr[PDQ_RX_FC_OFFSET];
755 switch (fc & (PDQ_FDDIFC_C|PDQ_FDDIFC_L|PDQ_FDDIFC_F)) {
756 case PDQ_FDDI_LLC_ASYNC:
757 case PDQ_FDDI_LLC_SYNC:
758 case PDQ_FDDI_IMP_ASYNC:
759 case PDQ_FDDI_IMP_SYNC: {
760 if (datalen > PDQ_FDDI_MAX || datalen < PDQ_FDDI_LLC_MIN) {
761 PDQ_PRINTF(("discard: bad length %d\n", datalen));

--- 10 unchanged lines hidden (view full) ---

772 PDQ_PRINTF(("discard: bad fc 0x%x\n", fc));
773 goto discard_frame;
774 }
775 }
776 /*
777 * Update the lengths of the data buffers now that we know
778 * the real length.
779 */
713 pdulen = datalen - 4 /* CRC */;
714 segcnt = (pdulen + PDQ_RX_FC_OFFSET + PDQ_OS_DATABUF_SIZE - 1) / PDQ_OS_DATABUF_SIZE;
715 PDQ_OS_DATABUF_ALLOC(npdu);
780 pdulen = datalen + (PDQ_RX_FC_OFFSET - PDQ_OS_HDR_OFFSET) - 4 /* CRC */;
781 segcnt = (pdulen + PDQ_OS_HDR_OFFSET + PDQ_OS_DATABUF_SIZE - 1) / PDQ_OS_DATABUF_SIZE;
782 PDQ_OS_DATABUF_ALLOC(pdq, npdu);
716 if (npdu == NULL) {
717 PDQ_PRINTF(("discard: no databuf #0\n"));
718 goto discard_frame;
719 }
720 buffers[completion] = npdu;
721 for (idx = 1; idx < segcnt; idx++) {
783 if (npdu == NULL) {
784 PDQ_PRINTF(("discard: no databuf #0\n"));
785 goto discard_frame;
786 }
787 buffers[completion] = npdu;
788 for (idx = 1; idx < segcnt; idx++) {
722 PDQ_OS_DATABUF_ALLOC(npdu);
789 PDQ_OS_DATABUF_ALLOC(pdq, npdu);
723 if (npdu == NULL) {
724 PDQ_OS_DATABUF_NEXT_SET(lpdu, NULL);
790 if (npdu == NULL) {
791 PDQ_OS_DATABUF_NEXT_SET(lpdu, NULL);
725 PDQ_OS_DATABUF_FREE(fpdu);
792 PDQ_OS_DATABUF_FREE(pdq, fpdu);
726 goto discard_frame;
727 }
728 PDQ_OS_DATABUF_NEXT_SET(lpdu, buffers[(completion + idx) & ring_mask]);
729 lpdu = PDQ_OS_DATABUF_NEXT(lpdu);
730 buffers[(completion + idx) & ring_mask] = npdu;
731 }
732 PDQ_OS_DATABUF_NEXT_SET(lpdu, NULL);
733 for (idx = 0; idx < PDQ_RX_SEGCNT; idx++) {
734 buffers[(producer + idx) & ring_mask] =
735 buffers[(completion + idx) & ring_mask];
736 buffers[(completion + idx) & ring_mask] = NULL;
737 }
793 goto discard_frame;
794 }
795 PDQ_OS_DATABUF_NEXT_SET(lpdu, buffers[(completion + idx) & ring_mask]);
796 lpdu = PDQ_OS_DATABUF_NEXT(lpdu);
797 buffers[(completion + idx) & ring_mask] = npdu;
798 }
799 PDQ_OS_DATABUF_NEXT_SET(lpdu, NULL);
800 for (idx = 0; idx < PDQ_RX_SEGCNT; idx++) {
801 buffers[(producer + idx) & ring_mask] =
802 buffers[(completion + idx) & ring_mask];
803 buffers[(completion + idx) & ring_mask] = NULL;
804 }
738 PDQ_OS_DATABUF_ADJ(fpdu, PDQ_RX_FC_OFFSET);
805 PDQ_OS_DATABUF_ADJ(fpdu, PDQ_OS_HDR_OFFSET);
739 if (segcnt == 1) {
740 PDQ_OS_DATABUF_LEN_SET(fpdu, pdulen);
741 } else {
806 if (segcnt == 1) {
807 PDQ_OS_DATABUF_LEN_SET(fpdu, pdulen);
808 } else {
742 PDQ_OS_DATABUF_LEN_SET(lpdu, pdulen + PDQ_RX_FC_OFFSET - (segcnt - 1) * PDQ_OS_DATABUF_SIZE);
809 PDQ_OS_DATABUF_LEN_SET(lpdu, pdulen + PDQ_OS_HDR_OFFSET - (segcnt - 1) * PDQ_OS_DATABUF_SIZE);
743 }
810 }
744 pdq_os_receive_pdu(pdq, fpdu, pdulen);
811 /*
812 * Do not pass to protocol if packet was received promiscuously
813 */
814 pdq_os_receive_pdu(pdq, fpdu, pdulen,
815 status.rxs_rcc_dd < PDQ_RXS_RCC_DD_CAM_MATCH);
745 rx->rx_free += PDQ_RX_SEGCNT;
746 PDQ_ADVANCE(producer, PDQ_RX_SEGCNT, ring_mask);
747 PDQ_ADVANCE(completion, PDQ_RX_SEGCNT, ring_mask);
748 continue;
749 } else {
750 PDQ_PRINTF(("discard: bad pdu 0x%x(%d.%d.%d.%d.%d)\n", status.rxs_status,
751 status.rxs_rcc_badpdu, status.rxs_rcc_badcrc,
752 status.rxs_rcc_reason, status.rxs_fsc, status.rxs_fsb_e));
753 if (status.rxs_rcc_reason == 7)
754 goto discard_frame;
755 if (status.rxs_rcc_reason != 0) {
756 /* hardware fault */
816 rx->rx_free += PDQ_RX_SEGCNT;
817 PDQ_ADVANCE(producer, PDQ_RX_SEGCNT, ring_mask);
818 PDQ_ADVANCE(completion, PDQ_RX_SEGCNT, ring_mask);
819 continue;
820 } else {
821 PDQ_PRINTF(("discard: bad pdu 0x%x(%d.%d.%d.%d.%d)\n", status.rxs_status,
822 status.rxs_rcc_badpdu, status.rxs_rcc_badcrc,
823 status.rxs_rcc_reason, status.rxs_fsc, status.rxs_fsb_e));
824 if (status.rxs_rcc_reason == 7)
825 goto discard_frame;
826 if (status.rxs_rcc_reason != 0) {
827 /* hardware fault */
828 if (status.rxs_rcc_badcrc) {
829 printf(PDQ_OS_PREFIX " MAC CRC error (source=%x-%x-%x-%x-%x-%x)\n",
830 PDQ_OS_PREFIX_ARGS,
831 dataptr[PDQ_RX_FC_OFFSET+1],
832 dataptr[PDQ_RX_FC_OFFSET+2],
833 dataptr[PDQ_RX_FC_OFFSET+3],
834 dataptr[PDQ_RX_FC_OFFSET+4],
835 dataptr[PDQ_RX_FC_OFFSET+5],
836 dataptr[PDQ_RX_FC_OFFSET+6]);
837 /* rx->rx_badcrc++; */
838 } else if (status.rxs_fsc == 0 || status.rxs_fsb_e == 1) {
839 /* rx->rx_frame_status_errors++; */
840 } else {
841 /* hardware fault */
842 }
757 }
843 }
758 if (status.rxs_rcc_badcrc) {
759 printf(PDQ_OS_PREFIX " MAC CRC error (source=%x-%x-%x-%x-%x-%x)\n",
760 PDQ_OS_PREFIX_ARGS,
761 dataptr[PDQ_RX_FC_OFFSET+1],
762 dataptr[PDQ_RX_FC_OFFSET+2],
763 dataptr[PDQ_RX_FC_OFFSET+3],
764 dataptr[PDQ_RX_FC_OFFSET+4],
765 dataptr[PDQ_RX_FC_OFFSET+5],
766 dataptr[PDQ_RX_FC_OFFSET+6]);
767 /* rx->rx_badcrc++; */
768 } else if (status.rxs_fsc == 0 || status.rxs_fsb_e == 1) {
769 /* rx->rx_frame_status_errors++; */
770 } else {
771 /* hardware fault */
772 }
773 }
774 discard_frame:
775 /*
776 * Discarded frames go right back on the queue; therefore
777 * ring entries were freed.
778 */
779 for (idx = 0; idx < PDQ_RX_SEGCNT; idx++) {
780 buffers[producer] = buffers[completion];
781 buffers[completion] = NULL;
782 rxd = &receives[rx->rx_producer];
783 if (idx == 0) {
784 rxd->rxd_sop = 1; rxd->rxd_seg_cnt = PDQ_RX_SEGCNT - 1;
785 } else {
786 rxd->rxd_sop = 0; rxd->rxd_seg_cnt = 0;
787 }
788 rxd->rxd_pa_hi = 0;
789 rxd->rxd_seg_len_hi = PDQ_OS_DATABUF_SIZE / 16;
844 }
845 discard_frame:
846 /*
847 * Discarded frames go right back on the queue; therefore
848 * ring entries were freed.
849 */
850 for (idx = 0; idx < PDQ_RX_SEGCNT; idx++) {
851 buffers[producer] = buffers[completion];
852 buffers[completion] = NULL;
853 rxd = &receives[rx->rx_producer];
854 if (idx == 0) {
855 rxd->rxd_sop = 1; rxd->rxd_seg_cnt = PDQ_RX_SEGCNT - 1;
856 } else {
857 rxd->rxd_sop = 0; rxd->rxd_seg_cnt = 0;
858 }
859 rxd->rxd_pa_hi = 0;
860 rxd->rxd_seg_len_hi = PDQ_OS_DATABUF_SIZE / 16;
790 rxd->rxd_pa_lo = PDQ_OS_VA_TO_PA(pdq, PDQ_OS_DATABUF_PTR(buffers[rx->rx_producer]));
861 rxd->rxd_pa_lo = PDQ_OS_DATABUF_BUSPA(pdq, buffers[rx->rx_producer]);
862 PDQ_OS_RXPDU_PRESYNC(pdq, buffers[rx->rx_producer], 0, PDQ_OS_DATABUF_SIZE);
863 PDQ_OS_DESC_PRESYNC(pdq, rxd, sizeof(*rxd));
791 PDQ_ADVANCE(rx->rx_producer, 1, ring_mask);
792 PDQ_ADVANCE(producer, 1, ring_mask);
793 PDQ_ADVANCE(completion, 1, ring_mask);
794 }
795 }
796 rx->rx_completion = completion;
797
798 while (rx->rx_free > PDQ_RX_SEGCNT && rx->rx_free > rx->rx_target) {
799 PDQ_OS_DATABUF_T *pdu;
800 /*
801 * Allocate the needed number of data buffers.
802 * Try to obtain them from our free queue before
803 * asking the system for more.
804 */
805 for (idx = 0; idx < PDQ_RX_SEGCNT; idx++) {
806 if ((pdu = buffers[(rx->rx_producer + idx) & ring_mask]) == NULL) {
864 PDQ_ADVANCE(rx->rx_producer, 1, ring_mask);
865 PDQ_ADVANCE(producer, 1, ring_mask);
866 PDQ_ADVANCE(completion, 1, ring_mask);
867 }
868 }
869 rx->rx_completion = completion;
870
871 while (rx->rx_free > PDQ_RX_SEGCNT && rx->rx_free > rx->rx_target) {
872 PDQ_OS_DATABUF_T *pdu;
873 /*
874 * Allocate the needed number of data buffers.
875 * Try to obtain them from our free queue before
876 * asking the system for more.
877 */
878 for (idx = 0; idx < PDQ_RX_SEGCNT; idx++) {
879 if ((pdu = buffers[(rx->rx_producer + idx) & ring_mask]) == NULL) {
807 PDQ_OS_DATABUF_ALLOC(pdu);
880 PDQ_OS_DATABUF_ALLOC(pdq, pdu);
808 if (pdu == NULL)
809 break;
810 buffers[(rx->rx_producer + idx) & ring_mask] = pdu;
811 }
812 rxd = &receives[(rx->rx_producer + idx) & ring_mask];
813 if (idx == 0) {
814 rxd->rxd_sop = 1; rxd->rxd_seg_cnt = PDQ_RX_SEGCNT - 1;
815 } else {
816 rxd->rxd_sop = 0; rxd->rxd_seg_cnt = 0;
817 }
818 rxd->rxd_pa_hi = 0;
819 rxd->rxd_seg_len_hi = PDQ_OS_DATABUF_SIZE / 16;
881 if (pdu == NULL)
882 break;
883 buffers[(rx->rx_producer + idx) & ring_mask] = pdu;
884 }
885 rxd = &receives[(rx->rx_producer + idx) & ring_mask];
886 if (idx == 0) {
887 rxd->rxd_sop = 1; rxd->rxd_seg_cnt = PDQ_RX_SEGCNT - 1;
888 } else {
889 rxd->rxd_sop = 0; rxd->rxd_seg_cnt = 0;
890 }
891 rxd->rxd_pa_hi = 0;
892 rxd->rxd_seg_len_hi = PDQ_OS_DATABUF_SIZE / 16;
820 rxd->rxd_pa_lo = PDQ_OS_VA_TO_PA(pdq, PDQ_OS_DATABUF_PTR(pdu));
893 rxd->rxd_pa_lo = PDQ_OS_DATABUF_BUSPA(pdq, pdu);
894 PDQ_OS_RXPDU_PRESYNC(pdq, pdu, 0, PDQ_OS_DATABUF_SIZE);
895 PDQ_OS_DESC_PRESYNC(pdq, rxd, sizeof(*rxd));
821 }
822 if (idx < PDQ_RX_SEGCNT) {
823 /*
824 * We didn't get all databufs required to complete a new
825 * receive buffer. Keep the ones we got and retry a bit
826 * later for the rest.
827 */
828 break;
829 }
830 PDQ_ADVANCE(rx->rx_producer, PDQ_RX_SEGCNT, ring_mask);
831 rx->rx_free -= PDQ_RX_SEGCNT;
832 }
833}
834
896 }
897 if (idx < PDQ_RX_SEGCNT) {
898 /*
899 * We didn't get all databufs required to complete a new
900 * receive buffer. Keep the ones we got and retry a bit
901 * later for the rest.
902 */
903 break;
904 }
905 PDQ_ADVANCE(rx->rx_producer, PDQ_RX_SEGCNT, ring_mask);
906 rx->rx_free -= PDQ_RX_SEGCNT;
907 }
908}
909
910static void pdq_process_transmitted_data(pdq_t *pdq);
911
835pdq_boolean_t
836pdq_queue_transmit_data(
837 pdq_t *pdq,
838 PDQ_OS_DATABUF_T *pdu)
839{
912pdq_boolean_t
913pdq_queue_transmit_data(
914 pdq_t *pdq,
915 PDQ_OS_DATABUF_T *pdu)
916{
840 pdq_tx_info_t *tx = &pdq->pdq_tx_info;
841 pdq_descriptor_block_t *dbp = pdq->pdq_dbp;
917 pdq_tx_info_t * const tx = &pdq->pdq_tx_info;
918 pdq_descriptor_block_t * const dbp = pdq->pdq_dbp;
842 pdq_uint32_t producer = tx->tx_producer;
843 pdq_txdesc_t *eop = NULL;
844 PDQ_OS_DATABUF_T *pdu0;
845 pdq_uint32_t freecnt;
919 pdq_uint32_t producer = tx->tx_producer;
920 pdq_txdesc_t *eop = NULL;
921 PDQ_OS_DATABUF_T *pdu0;
922 pdq_uint32_t freecnt;
923#if defined(PDQ_BUS_DMA)
924 bus_dmamap_t map;
925#endif
846
926
847 if (tx->tx_free < 1)
927 again:
928 if (PDQ_RX_FC_OFFSET == PDQ_OS_HDR_OFFSET) {
929 freecnt = tx->tx_free - 1;
930 } else {
931 freecnt = tx->tx_free;
932 }
933 /*
934 * Need 2 or more descriptors to be able to send.
935 */
936 if (freecnt == 0) {
937 pdq->pdq_intrmask |= PDQ_HOST_INT_TX_ENABLE;
938 PDQ_CSR_WRITE(&pdq->pdq_csrs, csr_host_int_enable, pdq->pdq_intrmask);
848 return PDQ_FALSE;
939 return PDQ_FALSE;
940 }
849
941
850 dbp->pdqdb_transmits[producer] = tx->tx_hdrdesc;
851 PDQ_ADVANCE(producer, 1, PDQ_RING_MASK(dbp->pdqdb_transmits));
942 if (PDQ_RX_FC_OFFSET == PDQ_OS_HDR_OFFSET) {
943 dbp->pdqdb_transmits[producer] = tx->tx_hdrdesc;
944 PDQ_OS_DESC_PRESYNC(pdq, &dbp->pdqdb_transmits[producer], sizeof(pdq_txdesc_t));
945 PDQ_ADVANCE(producer, 1, PDQ_RING_MASK(dbp->pdqdb_transmits));
946 }
852
947
948#if defined(PDQ_BUS_DMA)
949 map = M_GETCTX(pdu, bus_dmamap_t);
950 if (freecnt >= map->dm_nsegs) {
951 int idx;
952 for (idx = 0; idx < map->dm_nsegs; idx++) {
953 /*
954 * Initialize the transmit descriptor
955 */
956 eop = &dbp->pdqdb_transmits[producer];
957 eop->txd_seg_len = map->dm_segs[idx].ds_len;
958 eop->txd_pa_lo = map->dm_segs[idx].ds_addr;
959 eop->txd_sop = eop->txd_eop = eop->txd_pa_hi = 0;
960 PDQ_OS_DESC_PRESYNC(pdq, eop, sizeof(pdq_txdesc_t));
961 freecnt--;
962 PDQ_ADVANCE(producer, 1, PDQ_RING_MASK(dbp->pdqdb_transmits));
963 }
964 pdu0 = NULL;
965 } else {
966 pdu0 = pdu;
967 }
968#else
853 for (freecnt = tx->tx_free - 1, pdu0 = pdu; pdu0 != NULL && freecnt > 0;) {
854 pdq_uint32_t fraglen, datalen = PDQ_OS_DATABUF_LEN(pdu0);
855 const pdq_uint8_t *dataptr = PDQ_OS_DATABUF_PTR(pdu0);
856
857 /*
858 * The first segment is limited to the space remaining in
859 * page. All segments after that can be up to a full page
860 * in size.
861 */
862 fraglen = PDQ_OS_PAGESIZE - ((dataptr - (pdq_uint8_t *) NULL) & (PDQ_OS_PAGESIZE-1));
863 while (datalen > 0 && freecnt > 0) {
864 pdq_uint32_t seglen = (fraglen < datalen ? fraglen : datalen);
865
866 /*
867 * Initialize the transmit descriptor
868 */
869 eop = &dbp->pdqdb_transmits[producer];
870 eop->txd_seg_len = seglen;
969 for (freecnt = tx->tx_free - 1, pdu0 = pdu; pdu0 != NULL && freecnt > 0;) {
970 pdq_uint32_t fraglen, datalen = PDQ_OS_DATABUF_LEN(pdu0);
971 const pdq_uint8_t *dataptr = PDQ_OS_DATABUF_PTR(pdu0);
972
973 /*
974 * The first segment is limited to the space remaining in
975 * page. All segments after that can be up to a full page
976 * in size.
977 */
978 fraglen = PDQ_OS_PAGESIZE - ((dataptr - (pdq_uint8_t *) NULL) & (PDQ_OS_PAGESIZE-1));
979 while (datalen > 0 && freecnt > 0) {
980 pdq_uint32_t seglen = (fraglen < datalen ? fraglen : datalen);
981
982 /*
983 * Initialize the transmit descriptor
984 */
985 eop = &dbp->pdqdb_transmits[producer];
986 eop->txd_seg_len = seglen;
871 eop->txd_pa_lo = PDQ_OS_VA_TO_PA(pdq, dataptr);
987 eop->txd_pa_lo = PDQ_OS_VA_TO_BUSPA(pdq, dataptr);
872 eop->txd_sop = eop->txd_eop = eop->txd_pa_hi = 0;
988 eop->txd_sop = eop->txd_eop = eop->txd_pa_hi = 0;
873
989 PDQ_OS_DESC_PRESYNC(pdq, eop, sizeof(pdq_txdesc_t));
874 datalen -= seglen;
875 dataptr += seglen;
876 fraglen = PDQ_OS_PAGESIZE;
877 freecnt--;
878 PDQ_ADVANCE(producer, 1, PDQ_RING_MASK(dbp->pdqdb_transmits));
879 }
880 pdu0 = PDQ_OS_DATABUF_NEXT(pdu0);
881 }
990 datalen -= seglen;
991 dataptr += seglen;
992 fraglen = PDQ_OS_PAGESIZE;
993 freecnt--;
994 PDQ_ADVANCE(producer, 1, PDQ_RING_MASK(dbp->pdqdb_transmits));
995 }
996 pdu0 = PDQ_OS_DATABUF_NEXT(pdu0);
997 }
998#endif /* defined(PDQ_BUS_DMA) */
882 if (pdu0 != NULL) {
999 if (pdu0 != NULL) {
1000 unsigned completion = tx->tx_completion;
883 PDQ_ASSERT(freecnt == 0);
1001 PDQ_ASSERT(freecnt == 0);
1002 PDQ_OS_CONSUMER_POSTSYNC(pdq);
1003 pdq_process_transmitted_data(pdq);
1004 if (completion != tx->tx_completion) {
1005 producer = tx->tx_producer;
1006 eop = NULL;
1007 goto again;
1008 }
884 /*
885 * If we still have data to process then the ring was too full
886 * to store the PDU. Return FALSE so the caller will requeue
887 * the PDU for later.
888 */
1009 /*
1010 * If we still have data to process then the ring was too full
1011 * to store the PDU. Return FALSE so the caller will requeue
1012 * the PDU for later.
1013 */
1014 pdq->pdq_intrmask |= PDQ_HOST_INT_TX_ENABLE;
1015 PDQ_CSR_WRITE(&pdq->pdq_csrs, csr_host_int_enable, pdq->pdq_intrmask);
889 return PDQ_FALSE;
890 }
891 /*
892 * Everything went fine. Finish it up.
893 */
894 tx->tx_descriptor_count[tx->tx_producer] = tx->tx_free - freecnt;
1016 return PDQ_FALSE;
1017 }
1018 /*
1019 * Everything went fine. Finish it up.
1020 */
1021 tx->tx_descriptor_count[tx->tx_producer] = tx->tx_free - freecnt;
1022 if (PDQ_RX_FC_OFFSET != PDQ_OS_HDR_OFFSET) {
1023 dbp->pdqdb_transmits[tx->tx_producer].txd_sop = 1;
1024 PDQ_OS_DESC_PRESYNC(pdq, &dbp->pdqdb_transmits[tx->tx_producer],
1025 sizeof(pdq_txdesc_t));
1026 }
895 eop->txd_eop = 1;
1027 eop->txd_eop = 1;
1028 PDQ_OS_DESC_PRESYNC(pdq, eop, sizeof(pdq_txdesc_t));
896 PDQ_OS_DATABUF_ENQUEUE(&tx->tx_txq, pdu);
897 tx->tx_producer = producer;
898 tx->tx_free = freecnt;
899 PDQ_DO_TYPE2_PRODUCER(pdq);
900 return PDQ_TRUE;
901}
902
903static void
904pdq_process_transmitted_data(
905 pdq_t *pdq)
906{
907 pdq_tx_info_t *tx = &pdq->pdq_tx_info;
908 volatile const pdq_consumer_block_t *cbp = pdq->pdq_cbp;
909 pdq_descriptor_block_t *dbp = pdq->pdq_dbp;
910 pdq_uint32_t completion = tx->tx_completion;
1029 PDQ_OS_DATABUF_ENQUEUE(&tx->tx_txq, pdu);
1030 tx->tx_producer = producer;
1031 tx->tx_free = freecnt;
1032 PDQ_DO_TYPE2_PRODUCER(pdq);
1033 return PDQ_TRUE;
1034}
1035
1036static void
1037pdq_process_transmitted_data(
1038 pdq_t *pdq)
1039{
1040 pdq_tx_info_t *tx = &pdq->pdq_tx_info;
1041 volatile const pdq_consumer_block_t *cbp = pdq->pdq_cbp;
1042 pdq_descriptor_block_t *dbp = pdq->pdq_dbp;
1043 pdq_uint32_t completion = tx->tx_completion;
1044 int reclaimed = 0;
911
912 while (completion != cbp->pdqcb_transmits) {
913 PDQ_OS_DATABUF_T *pdu;
914 pdq_uint32_t descriptor_count = tx->tx_descriptor_count[completion];
915 PDQ_ASSERT(dbp->pdqdb_transmits[completion].txd_sop == 1);
916 PDQ_ASSERT(dbp->pdqdb_transmits[(completion + descriptor_count - 1) & PDQ_RING_MASK(dbp->pdqdb_transmits)].txd_eop == 1);
917 PDQ_OS_DATABUF_DEQUEUE(&tx->tx_txq, pdu);
918 pdq_os_transmit_done(pdq, pdu);
919 tx->tx_free += descriptor_count;
1045
1046 while (completion != cbp->pdqcb_transmits) {
1047 PDQ_OS_DATABUF_T *pdu;
1048 pdq_uint32_t descriptor_count = tx->tx_descriptor_count[completion];
1049 PDQ_ASSERT(dbp->pdqdb_transmits[completion].txd_sop == 1);
1050 PDQ_ASSERT(dbp->pdqdb_transmits[(completion + descriptor_count - 1) & PDQ_RING_MASK(dbp->pdqdb_transmits)].txd_eop == 1);
1051 PDQ_OS_DATABUF_DEQUEUE(&tx->tx_txq, pdu);
1052 pdq_os_transmit_done(pdq, pdu);
1053 tx->tx_free += descriptor_count;
920
1054 reclaimed = 1;
921 PDQ_ADVANCE(completion, descriptor_count, PDQ_RING_MASK(dbp->pdqdb_transmits));
922 }
923 if (tx->tx_completion != completion) {
924 tx->tx_completion = completion;
1055 PDQ_ADVANCE(completion, descriptor_count, PDQ_RING_MASK(dbp->pdqdb_transmits));
1056 }
1057 if (tx->tx_completion != completion) {
1058 tx->tx_completion = completion;
1059 pdq->pdq_intrmask &= ~PDQ_HOST_INT_TX_ENABLE;
1060 PDQ_CSR_WRITE(&pdq->pdq_csrs, csr_host_int_enable, pdq->pdq_intrmask);
925 pdq_os_restart_transmitter(pdq);
926 }
1061 pdq_os_restart_transmitter(pdq);
1062 }
927 PDQ_DO_TYPE2_PRODUCER(pdq);
1063 if (reclaimed)
1064 PDQ_DO_TYPE2_PRODUCER(pdq);
928}
929
930void
931pdq_flush_transmitter(
932 pdq_t *pdq)
933{
934 volatile pdq_consumer_block_t *cbp = pdq->pdq_cbp;
935 pdq_tx_info_t *tx = &pdq->pdq_tx_info;
936
937 for (;;) {
938 PDQ_OS_DATABUF_T *pdu;
939 PDQ_OS_DATABUF_DEQUEUE(&tx->tx_txq, pdu);
940 if (pdu == NULL)
941 break;
942 /*
943 * Don't call transmit done since the packet never made it
944 * out on the wire.
945 */
1065}
1066
1067void
1068pdq_flush_transmitter(
1069 pdq_t *pdq)
1070{
1071 volatile pdq_consumer_block_t *cbp = pdq->pdq_cbp;
1072 pdq_tx_info_t *tx = &pdq->pdq_tx_info;
1073
1074 for (;;) {
1075 PDQ_OS_DATABUF_T *pdu;
1076 PDQ_OS_DATABUF_DEQUEUE(&tx->tx_txq, pdu);
1077 if (pdu == NULL)
1078 break;
1079 /*
1080 * Don't call transmit done since the packet never made it
1081 * out on the wire.
1082 */
946 PDQ_OS_DATABUF_FREE(pdu);
1083 PDQ_OS_DATABUF_FREE(pdq, pdu);
947 }
948
949 tx->tx_free = PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_transmits);
1084 }
1085
1086 tx->tx_free = PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_transmits);
950 tx->tx_completion = cbp->pdqcb_transmits = tx->tx_producer;
1087 cbp->pdqcb_transmits = tx->tx_completion = tx->tx_producer;
1088 PDQ_OS_CONSUMER_PRESYNC(pdq);
951
952 PDQ_DO_TYPE2_PRODUCER(pdq);
953}
954
955void
956pdq_hwreset(
957 pdq_t *pdq)
958{
959 const pdq_csrs_t * const csrs = &pdq->pdq_csrs;
960 pdq_state_t state;
961 int cnt;
962
963 state = PDQ_PSTS_ADAPTER_STATE(PDQ_CSR_READ(csrs, csr_port_status));
964 if (state == PDQS_DMA_UNAVAILABLE)
965 return;
966 PDQ_CSR_WRITE(csrs, csr_port_data_a,
1089
1090 PDQ_DO_TYPE2_PRODUCER(pdq);
1091}
1092
1093void
1094pdq_hwreset(
1095 pdq_t *pdq)
1096{
1097 const pdq_csrs_t * const csrs = &pdq->pdq_csrs;
1098 pdq_state_t state;
1099 int cnt;
1100
1101 state = PDQ_PSTS_ADAPTER_STATE(PDQ_CSR_READ(csrs, csr_port_status));
1102 if (state == PDQS_DMA_UNAVAILABLE)
1103 return;
1104 PDQ_CSR_WRITE(csrs, csr_port_data_a,
967 (state == PDQS_HALTED) ? 0 : PDQ_PRESET_SKIP_SELFTEST);
1105 (state == PDQS_HALTED && pdq->pdq_type != PDQ_DEFTA) ? 0 : PDQ_PRESET_SKIP_SELFTEST);
968 PDQ_CSR_WRITE(csrs, csr_port_reset, 1);
969 PDQ_OS_USEC_DELAY(100);
970 PDQ_CSR_WRITE(csrs, csr_port_reset, 0);
1106 PDQ_CSR_WRITE(csrs, csr_port_reset, 1);
1107 PDQ_OS_USEC_DELAY(100);
1108 PDQ_CSR_WRITE(csrs, csr_port_reset, 0);
971 for (cnt = 45000;;cnt--) {
1109 for (cnt = 100000;;cnt--) {
972 PDQ_OS_USEC_DELAY(1000);
973 state = PDQ_PSTS_ADAPTER_STATE(PDQ_CSR_READ(csrs, csr_port_status));
974 if (state == PDQS_DMA_UNAVAILABLE || cnt == 0)
975 break;
976 }
1110 PDQ_OS_USEC_DELAY(1000);
1111 state = PDQ_PSTS_ADAPTER_STATE(PDQ_CSR_READ(csrs, csr_port_status));
1112 if (state == PDQS_DMA_UNAVAILABLE || cnt == 0)
1113 break;
1114 }
977 PDQ_PRINTF(("PDQ Reset spun %d cycles\n", 45000 - cnt));
1115 PDQ_PRINTF(("PDQ Reset spun %d cycles\n", 100000 - cnt));
978 PDQ_OS_USEC_DELAY(10000);
979 state = PDQ_PSTS_ADAPTER_STATE(PDQ_CSR_READ(csrs, csr_port_status));
980 PDQ_ASSERT(state == PDQS_DMA_UNAVAILABLE);
981 PDQ_ASSERT(cnt > 0);
982}
983
984/*
985 * The following routine brings the PDQ from whatever state it is

--- 59 unchanged lines hidden (view full) ---

1045 */
1046 PDQ_CSR_WRITE(&pdq->pdq_pci_csrs, csr_pfi_mode_control, 0);
1047 PDQ_CSR_WRITE(&pdq->pdq_pci_csrs, csr_pfi_status, 0x10);
1048 }
1049
1050 /*
1051 * Flush all the databuf queues.
1052 */
1116 PDQ_OS_USEC_DELAY(10000);
1117 state = PDQ_PSTS_ADAPTER_STATE(PDQ_CSR_READ(csrs, csr_port_status));
1118 PDQ_ASSERT(state == PDQS_DMA_UNAVAILABLE);
1119 PDQ_ASSERT(cnt > 0);
1120}
1121
1122/*
1123 * The following routine brings the PDQ from whatever state it is

--- 59 unchanged lines hidden (view full) ---

1183 */
1184 PDQ_CSR_WRITE(&pdq->pdq_pci_csrs, csr_pfi_mode_control, 0);
1185 PDQ_CSR_WRITE(&pdq->pdq_pci_csrs, csr_pfi_status, 0x10);
1186 }
1187
1188 /*
1189 * Flush all the databuf queues.
1190 */
1053 pdq_flush_databuf_queue(&pdq->pdq_tx_info.tx_txq);
1054 pdq->pdq_flags &= ~PDQ_TXOK;
1191 pdq_flush_databuf_queue(pdq, &pdq->pdq_tx_info.tx_txq);
1192 pdq->pdq_flags &= ~(PDQ_TXOK|PDQ_IS_ONRING|PDQ_IS_FDX);
1055 buffers = (PDQ_OS_DATABUF_T **) pdq->pdq_rx_info.rx_buffers;
1056 for (idx = 0; idx < PDQ_RING_SIZE(pdq->pdq_dbp->pdqdb_receives); idx++) {
1057 if (buffers[idx] != NULL) {
1193 buffers = (PDQ_OS_DATABUF_T **) pdq->pdq_rx_info.rx_buffers;
1194 for (idx = 0; idx < PDQ_RING_SIZE(pdq->pdq_dbp->pdqdb_receives); idx++) {
1195 if (buffers[idx] != NULL) {
1058 PDQ_OS_DATABUF_FREE(buffers[idx]);
1196 PDQ_OS_DATABUF_FREE(pdq, buffers[idx]);
1059 buffers[idx] = NULL;
1060 }
1061 }
1062 pdq->pdq_rx_info.rx_free = PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_receives);
1063 buffers = (PDQ_OS_DATABUF_T **) pdq->pdq_host_smt_info.rx_buffers;
1064 for (idx = 0; idx < PDQ_RING_SIZE(pdq->pdq_dbp->pdqdb_host_smt); idx++) {
1065 if (buffers[idx] != NULL) {
1197 buffers[idx] = NULL;
1198 }
1199 }
1200 pdq->pdq_rx_info.rx_free = PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_receives);
1201 buffers = (PDQ_OS_DATABUF_T **) pdq->pdq_host_smt_info.rx_buffers;
1202 for (idx = 0; idx < PDQ_RING_SIZE(pdq->pdq_dbp->pdqdb_host_smt); idx++) {
1203 if (buffers[idx] != NULL) {
1066 PDQ_OS_DATABUF_FREE(buffers[idx]);
1204 PDQ_OS_DATABUF_FREE(pdq, buffers[idx]);
1067 buffers[idx] = NULL;
1068 }
1069 }
1070 pdq->pdq_host_smt_info.rx_free = PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_host_smt);
1071
1072 /*
1073 * Reset the consumer indexes to 0.
1074 */
1075 pdq->pdq_cbp->pdqcb_receives = 0;
1076 pdq->pdq_cbp->pdqcb_transmits = 0;
1077 pdq->pdq_cbp->pdqcb_host_smt = 0;
1078 pdq->pdq_cbp->pdqcb_unsolicited_event = 0;
1079 pdq->pdq_cbp->pdqcb_command_response = 0;
1080 pdq->pdq_cbp->pdqcb_command_request = 0;
1205 buffers[idx] = NULL;
1206 }
1207 }
1208 pdq->pdq_host_smt_info.rx_free = PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_host_smt);
1209
1210 /*
1211 * Reset the consumer indexes to 0.
1212 */
1213 pdq->pdq_cbp->pdqcb_receives = 0;
1214 pdq->pdq_cbp->pdqcb_transmits = 0;
1215 pdq->pdq_cbp->pdqcb_host_smt = 0;
1216 pdq->pdq_cbp->pdqcb_unsolicited_event = 0;
1217 pdq->pdq_cbp->pdqcb_command_response = 0;
1218 pdq->pdq_cbp->pdqcb_command_request = 0;
1219 PDQ_OS_CONSUMER_PRESYNC(pdq);
1081
1082 /*
1083 * Reset the producer and completion indexes to 0.
1084 */
1085 pdq->pdq_command_info.ci_request_producer = 0;
1086 pdq->pdq_command_info.ci_response_producer = 0;
1087 pdq->pdq_command_info.ci_request_completion = 0;
1088 pdq->pdq_command_info.ci_response_completion = 0;

--- 25 unchanged lines hidden (view full) ---

1114#endif
1115 }
1116
1117 /*
1118 * Make sure the unsolicited queue has events ...
1119 */
1120 pdq_process_unsolicited_events(pdq);
1121
1220
1221 /*
1222 * Reset the producer and completion indexes to 0.
1223 */
1224 pdq->pdq_command_info.ci_request_producer = 0;
1225 pdq->pdq_command_info.ci_response_producer = 0;
1226 pdq->pdq_command_info.ci_request_completion = 0;
1227 pdq->pdq_command_info.ci_response_completion = 0;

--- 25 unchanged lines hidden (view full) ---

1253#endif
1254 }
1255
1256 /*
1257 * Make sure the unsolicited queue has events ...
1258 */
1259 pdq_process_unsolicited_events(pdq);
1260
1122 if (pdq->pdq_type == PDQ_DEFEA && pdq->pdq_chip_rev == PDQ_CHIP_REV_E)
1261 if ((pdq->pdq_type == PDQ_DEFEA && pdq->pdq_chip_rev == PDQ_CHIP_REV_E)
1262 || pdq->pdq_type == PDQ_DEFTA)
1123 PDQ_CSR_WRITE(csrs, csr_port_data_b, PDQ_DMA_BURST_16LW);
1124 else
1125 PDQ_CSR_WRITE(csrs, csr_port_data_b, PDQ_DMA_BURST_8LW);
1126 PDQ_CSR_WRITE(csrs, csr_port_data_a, PDQ_SUB_CMD_DMA_BURST_SIZE_SET);
1127 pdq_do_port_control(csrs, PDQ_PCTL_SUB_CMD);
1128
1263 PDQ_CSR_WRITE(csrs, csr_port_data_b, PDQ_DMA_BURST_16LW);
1264 else
1265 PDQ_CSR_WRITE(csrs, csr_port_data_b, PDQ_DMA_BURST_8LW);
1266 PDQ_CSR_WRITE(csrs, csr_port_data_a, PDQ_SUB_CMD_DMA_BURST_SIZE_SET);
1267 pdq_do_port_control(csrs, PDQ_PCTL_SUB_CMD);
1268
1269 /*
1270 * Make sure there isn't stale information in the caches before
1271 * tell the adapter about the blocks it's going to use.
1272 */
1273 PDQ_OS_CONSUMER_PRESYNC(pdq);
1274
1129 PDQ_CSR_WRITE(csrs, csr_port_data_b, 0);
1275 PDQ_CSR_WRITE(csrs, csr_port_data_b, 0);
1130 PDQ_CSR_WRITE(csrs, csr_port_data_a, PDQ_OS_VA_TO_PA(pdq, pdq->pdq_cbp));
1276 PDQ_CSR_WRITE(csrs, csr_port_data_a, pdq->pdq_pa_consumer_block);
1131 pdq_do_port_control(csrs, PDQ_PCTL_CONSUMER_BLOCK);
1132
1133 PDQ_CSR_WRITE(csrs, csr_port_data_b, 0);
1277 pdq_do_port_control(csrs, PDQ_PCTL_CONSUMER_BLOCK);
1278
1279 PDQ_CSR_WRITE(csrs, csr_port_data_b, 0);
1134 PDQ_CSR_WRITE(csrs, csr_port_data_a,
1135 PDQ_OS_VA_TO_PA(pdq, pdq->pdq_dbp) | PDQ_DMA_INIT_LW_BSWAP_DATA);
1280#if !defined(BYTE_ORDER) || BYTE_ORDER == LITTLE_ENDIAN
1281 PDQ_CSR_WRITE(csrs, csr_port_data_a, pdq->pdq_pa_descriptor_block | PDQ_DMA_INIT_LW_BSWAP_DATA);
1282#else
1283 PDQ_CSR_WRITE(csrs, csr_port_data_a, pdq->pdq_pa_descriptor_block | PDQ_DMA_INIT_LW_BSWAP_DATA | PDQ_DMA_INIT_LW_BSWAP_LITERAL);
1284#endif
1136 pdq_do_port_control(csrs, PDQ_PCTL_DMA_INIT);
1137
1138 for (cnt = 0; cnt < 1000; cnt++) {
1139 state = PDQ_PSTS_ADAPTER_STATE(PDQ_CSR_READ(csrs, csr_port_status));
1140 if (state == PDQS_HALTED) {
1141 if (pass > 0)
1142 return PDQS_HALTED;
1143 pass = 1;
1144 goto restart;
1145 }
1146 if (state == PDQS_DMA_AVAILABLE) {
1147 PDQ_PRINTF(("Transition to DMA Available took %d spins\n", cnt));
1148 break;
1149 }
1150 PDQ_OS_USEC_DELAY(1000);
1151 }
1152 PDQ_ASSERT(state == PDQS_DMA_AVAILABLE);
1153
1154 PDQ_CSR_WRITE(csrs, csr_host_int_type_0, 0xFF);
1285 pdq_do_port_control(csrs, PDQ_PCTL_DMA_INIT);
1286
1287 for (cnt = 0; cnt < 1000; cnt++) {
1288 state = PDQ_PSTS_ADAPTER_STATE(PDQ_CSR_READ(csrs, csr_port_status));
1289 if (state == PDQS_HALTED) {
1290 if (pass > 0)
1291 return PDQS_HALTED;
1292 pass = 1;
1293 goto restart;
1294 }
1295 if (state == PDQS_DMA_AVAILABLE) {
1296 PDQ_PRINTF(("Transition to DMA Available took %d spins\n", cnt));
1297 break;
1298 }
1299 PDQ_OS_USEC_DELAY(1000);
1300 }
1301 PDQ_ASSERT(state == PDQS_DMA_AVAILABLE);
1302
1303 PDQ_CSR_WRITE(csrs, csr_host_int_type_0, 0xFF);
1155 PDQ_CSR_WRITE(csrs, csr_host_int_enable, 0) /* PDQ_HOST_INT_STATE_CHANGE
1304 pdq->pdq_intrmask = 0;
1305 /* PDQ_HOST_INT_STATE_CHANGE
1156 |PDQ_HOST_INT_FATAL_ERROR|PDQ_HOST_INT_CMD_RSP_ENABLE
1157 |PDQ_HOST_INT_UNSOL_ENABLE */;
1306 |PDQ_HOST_INT_FATAL_ERROR|PDQ_HOST_INT_CMD_RSP_ENABLE
1307 |PDQ_HOST_INT_UNSOL_ENABLE */;
1308 PDQ_CSR_WRITE(csrs, csr_host_int_enable, pdq->pdq_intrmask);
1158
1159 /*
1160 * Any other command but START should be valid.
1161 */
1162 pdq->pdq_command_info.ci_pending_commands &= ~(PDQ_BITMASK(PDQC_START));
1163 if (pdq->pdq_flags & PDQ_PRINTCHARS)
1164 pdq->pdq_command_info.ci_pending_commands |= PDQ_BITMASK(PDQC_STATUS_CHARS_GET);
1165 pdq_queue_commands(pdq);
1166
1167 if (pdq->pdq_flags & PDQ_PRINTCHARS) {
1168 /*
1169 * Now wait (up to 100ms) for the command(s) to finish.
1170 */
1171 for (cnt = 0; cnt < 1000; cnt++) {
1309
1310 /*
1311 * Any other command but START should be valid.
1312 */
1313 pdq->pdq_command_info.ci_pending_commands &= ~(PDQ_BITMASK(PDQC_START));
1314 if (pdq->pdq_flags & PDQ_PRINTCHARS)
1315 pdq->pdq_command_info.ci_pending_commands |= PDQ_BITMASK(PDQC_STATUS_CHARS_GET);
1316 pdq_queue_commands(pdq);
1317
1318 if (pdq->pdq_flags & PDQ_PRINTCHARS) {
1319 /*
1320 * Now wait (up to 100ms) for the command(s) to finish.
1321 */
1322 for (cnt = 0; cnt < 1000; cnt++) {
1323 PDQ_OS_CONSUMER_POSTSYNC(pdq);
1172 pdq_process_command_responses(pdq);
1173 if (pdq->pdq_command_info.ci_response_producer == pdq->pdq_command_info.ci_response_completion)
1174 break;
1175 PDQ_OS_USEC_DELAY(1000);
1176 }
1177 state = PDQ_PSTS_ADAPTER_STATE(PDQ_CSR_READ(csrs, csr_port_status));
1178 }
1179

--- 16 unchanged lines hidden (view full) ---

1196 switch (state) {
1197 case PDQS_DMA_AVAILABLE: {
1198 /*
1199 * The PDQ after being reset screws up some of its state.
1200 * So we need to clear all the errors/interrupts so the real
1201 * ones will get through.
1202 */
1203 PDQ_CSR_WRITE(csrs, csr_host_int_type_0, 0xFF);
1324 pdq_process_command_responses(pdq);
1325 if (pdq->pdq_command_info.ci_response_producer == pdq->pdq_command_info.ci_response_completion)
1326 break;
1327 PDQ_OS_USEC_DELAY(1000);
1328 }
1329 state = PDQ_PSTS_ADAPTER_STATE(PDQ_CSR_READ(csrs, csr_port_status));
1330 }
1331

--- 16 unchanged lines hidden (view full) ---

1348 switch (state) {
1349 case PDQS_DMA_AVAILABLE: {
1350 /*
1351 * The PDQ after being reset screws up some of its state.
1352 * So we need to clear all the errors/interrupts so the real
1353 * ones will get through.
1354 */
1355 PDQ_CSR_WRITE(csrs, csr_host_int_type_0, 0xFF);
1204 PDQ_CSR_WRITE(csrs, csr_host_int_enable, PDQ_HOST_INT_STATE_CHANGE|PDQ_HOST_INT_XMT_DATA_FLUSH
1205 |PDQ_HOST_INT_FATAL_ERROR|PDQ_HOST_INT_CMD_RSP_ENABLE|PDQ_HOST_INT_UNSOL_ENABLE
1206 |PDQ_HOST_INT_RX_ENABLE|PDQ_HOST_INT_TX_ENABLE|PDQ_HOST_INT_HOST_SMT_ENABLE);
1356 pdq->pdq_intrmask = PDQ_HOST_INT_STATE_CHANGE
1357 |PDQ_HOST_INT_XMT_DATA_FLUSH|PDQ_HOST_INT_FATAL_ERROR
1358 |PDQ_HOST_INT_CMD_RSP_ENABLE|PDQ_HOST_INT_UNSOL_ENABLE
1359 |PDQ_HOST_INT_RX_ENABLE|PDQ_HOST_INT_HOST_SMT_ENABLE;
1360 PDQ_CSR_WRITE(csrs, csr_host_int_enable, pdq->pdq_intrmask);
1207 /*
1208 * Set the MAC and address filters and start up the PDQ.
1209 */
1210 pdq_process_unsolicited_events(pdq);
1211 pdq_process_received_data(pdq, &pdq->pdq_rx_info,
1212 pdq->pdq_dbp->pdqdb_receives,
1213 pdq->pdq_cbp->pdqcb_receives,
1214 PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_receives));
1215 PDQ_DO_TYPE2_PRODUCER(pdq);
1216 if (pdq->pdq_flags & PDQ_PASS_SMT) {
1217 pdq_process_received_data(pdq, &pdq->pdq_host_smt_info,
1218 pdq->pdq_dbp->pdqdb_host_smt,
1219 pdq->pdq_cbp->pdqcb_host_smt,
1220 PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_host_smt));
1221 PDQ_CSR_WRITE(csrs, csr_host_smt_producer,
1222 pdq->pdq_host_smt_info.rx_producer
1223 | (pdq->pdq_host_smt_info.rx_completion << 8));
1224 }
1225 pdq->pdq_command_info.ci_pending_commands = PDQ_BITMASK(PDQC_FILTER_SET)
1361 /*
1362 * Set the MAC and address filters and start up the PDQ.
1363 */
1364 pdq_process_unsolicited_events(pdq);
1365 pdq_process_received_data(pdq, &pdq->pdq_rx_info,
1366 pdq->pdq_dbp->pdqdb_receives,
1367 pdq->pdq_cbp->pdqcb_receives,
1368 PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_receives));
1369 PDQ_DO_TYPE2_PRODUCER(pdq);
1370 if (pdq->pdq_flags & PDQ_PASS_SMT) {
1371 pdq_process_received_data(pdq, &pdq->pdq_host_smt_info,
1372 pdq->pdq_dbp->pdqdb_host_smt,
1373 pdq->pdq_cbp->pdqcb_host_smt,
1374 PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_host_smt));
1375 PDQ_CSR_WRITE(csrs, csr_host_smt_producer,
1376 pdq->pdq_host_smt_info.rx_producer
1377 | (pdq->pdq_host_smt_info.rx_completion << 8));
1378 }
1379 pdq->pdq_command_info.ci_pending_commands = PDQ_BITMASK(PDQC_FILTER_SET)
1226 | PDQ_BITMASK(PDQC_ADDR_FILTER_SET) | PDQ_BITMASK(PDQC_START);
1380 | PDQ_BITMASK(PDQC_ADDR_FILTER_SET)
1381 | PDQ_BITMASK(PDQC_SNMP_SET)
1382 | PDQ_BITMASK(PDQC_START);
1227 if (pdq->pdq_flags & PDQ_PRINTCHARS)
1228 pdq->pdq_command_info.ci_pending_commands |= PDQ_BITMASK(PDQC_STATUS_CHARS_GET);
1229 pdq_queue_commands(pdq);
1230 break;
1231 }
1232 case PDQS_LINK_UNAVAILABLE:
1233 case PDQS_LINK_AVAILABLE: {
1234 pdq->pdq_command_info.ci_pending_commands = PDQ_BITMASK(PDQC_FILTER_SET)
1383 if (pdq->pdq_flags & PDQ_PRINTCHARS)
1384 pdq->pdq_command_info.ci_pending_commands |= PDQ_BITMASK(PDQC_STATUS_CHARS_GET);
1385 pdq_queue_commands(pdq);
1386 break;
1387 }
1388 case PDQS_LINK_UNAVAILABLE:
1389 case PDQS_LINK_AVAILABLE: {
1390 pdq->pdq_command_info.ci_pending_commands = PDQ_BITMASK(PDQC_FILTER_SET)
1235 | PDQ_BITMASK(PDQC_ADDR_FILTER_SET);
1391 | PDQ_BITMASK(PDQC_ADDR_FILTER_SET)
1392 | PDQ_BITMASK(PDQC_SNMP_SET);
1236 if (pdq->pdq_flags & PDQ_PRINTCHARS)
1237 pdq->pdq_command_info.ci_pending_commands |= PDQ_BITMASK(PDQC_STATUS_CHARS_GET);
1238 if (pdq->pdq_flags & PDQ_PASS_SMT) {
1239 pdq_process_received_data(pdq, &pdq->pdq_host_smt_info,
1240 pdq->pdq_dbp->pdqdb_host_smt,
1241 pdq->pdq_cbp->pdqcb_host_smt,
1242 PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_host_smt));
1243 PDQ_CSR_WRITE(csrs, csr_host_smt_producer,

--- 21 unchanged lines hidden (view full) ---

1265 int progress = 0;
1266
1267 if (pdq->pdq_type == PDQ_DEFPA)
1268 PDQ_CSR_WRITE(&pdq->pdq_pci_csrs, csr_pfi_status, 0x18);
1269
1270 while ((data = PDQ_CSR_READ(csrs, csr_port_status)) & PDQ_PSTS_INTR_PENDING) {
1271 progress = 1;
1272 PDQ_PRINTF(("PDQ Interrupt: Status = 0x%08x\n", data));
1393 if (pdq->pdq_flags & PDQ_PRINTCHARS)
1394 pdq->pdq_command_info.ci_pending_commands |= PDQ_BITMASK(PDQC_STATUS_CHARS_GET);
1395 if (pdq->pdq_flags & PDQ_PASS_SMT) {
1396 pdq_process_received_data(pdq, &pdq->pdq_host_smt_info,
1397 pdq->pdq_dbp->pdqdb_host_smt,
1398 pdq->pdq_cbp->pdqcb_host_smt,
1399 PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_host_smt));
1400 PDQ_CSR_WRITE(csrs, csr_host_smt_producer,

--- 21 unchanged lines hidden (view full) ---

1422 int progress = 0;
1423
1424 if (pdq->pdq_type == PDQ_DEFPA)
1425 PDQ_CSR_WRITE(&pdq->pdq_pci_csrs, csr_pfi_status, 0x18);
1426
1427 while ((data = PDQ_CSR_READ(csrs, csr_port_status)) & PDQ_PSTS_INTR_PENDING) {
1428 progress = 1;
1429 PDQ_PRINTF(("PDQ Interrupt: Status = 0x%08x\n", data));
1430 PDQ_OS_CONSUMER_POSTSYNC(pdq);
1273 if (data & PDQ_PSTS_RCV_DATA_PENDING) {
1274 pdq_process_received_data(pdq, &pdq->pdq_rx_info,
1275 pdq->pdq_dbp->pdqdb_receives,
1276 pdq->pdq_cbp->pdqcb_receives,
1277 PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_receives));
1278 PDQ_DO_TYPE2_PRODUCER(pdq);
1279 }
1280 if (data & PDQ_PSTS_HOST_SMT_PENDING) {
1281 pdq_process_received_data(pdq, &pdq->pdq_host_smt_info,
1282 pdq->pdq_dbp->pdqdb_host_smt,
1283 pdq->pdq_cbp->pdqcb_host_smt,
1284 PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_host_smt));
1285 PDQ_DO_HOST_SMT_PRODUCER(pdq);
1286 }
1431 if (data & PDQ_PSTS_RCV_DATA_PENDING) {
1432 pdq_process_received_data(pdq, &pdq->pdq_rx_info,
1433 pdq->pdq_dbp->pdqdb_receives,
1434 pdq->pdq_cbp->pdqcb_receives,
1435 PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_receives));
1436 PDQ_DO_TYPE2_PRODUCER(pdq);
1437 }
1438 if (data & PDQ_PSTS_HOST_SMT_PENDING) {
1439 pdq_process_received_data(pdq, &pdq->pdq_host_smt_info,
1440 pdq->pdq_dbp->pdqdb_host_smt,
1441 pdq->pdq_cbp->pdqcb_host_smt,
1442 PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_host_smt));
1443 PDQ_DO_HOST_SMT_PRODUCER(pdq);
1444 }
1287 if (data & PDQ_PSTS_XMT_DATA_PENDING)
1445 /* if (data & PDQ_PSTS_XMT_DATA_PENDING) */
1288 pdq_process_transmitted_data(pdq);
1289 if (data & PDQ_PSTS_UNSOL_PENDING)
1290 pdq_process_unsolicited_events(pdq);
1291 if (data & PDQ_PSTS_CMD_RSP_PENDING)
1292 pdq_process_command_responses(pdq);
1293 if (data & PDQ_PSTS_TYPE_0_PENDING) {
1294 data = PDQ_CSR_READ(csrs, csr_host_int_type_0);
1295 if (data & PDQ_HOST_INT_STATE_CHANGE) {
1296 pdq_state_t state = PDQ_PSTS_ADAPTER_STATE(PDQ_CSR_READ(csrs, csr_port_status));
1297 printf(PDQ_OS_PREFIX "%s", PDQ_OS_PREFIX_ARGS, pdq_adapter_states[state]);
1298 if (state == PDQS_LINK_UNAVAILABLE) {
1446 pdq_process_transmitted_data(pdq);
1447 if (data & PDQ_PSTS_UNSOL_PENDING)
1448 pdq_process_unsolicited_events(pdq);
1449 if (data & PDQ_PSTS_CMD_RSP_PENDING)
1450 pdq_process_command_responses(pdq);
1451 if (data & PDQ_PSTS_TYPE_0_PENDING) {
1452 data = PDQ_CSR_READ(csrs, csr_host_int_type_0);
1453 if (data & PDQ_HOST_INT_STATE_CHANGE) {
1454 pdq_state_t state = PDQ_PSTS_ADAPTER_STATE(PDQ_CSR_READ(csrs, csr_port_status));
1455 printf(PDQ_OS_PREFIX "%s", PDQ_OS_PREFIX_ARGS, pdq_adapter_states[state]);
1456 if (state == PDQS_LINK_UNAVAILABLE) {
1299 pdq->pdq_flags &= ~PDQ_TXOK;
1457 pdq->pdq_flags &= ~(PDQ_TXOK|PDQ_IS_ONRING|PDQ_IS_FDX);
1300 } else if (state == PDQS_LINK_AVAILABLE) {
1458 } else if (state == PDQS_LINK_AVAILABLE) {
1301 pdq->pdq_flags |= PDQ_TXOK;
1459 if (pdq->pdq_flags & PDQ_WANT_FDX) {
1460 pdq->pdq_command_info.ci_pending_commands |= PDQ_BITMASK(PDQC_DEC_EXT_MIB_GET);
1461 pdq_queue_commands(pdq);
1462 }
1463 pdq->pdq_flags |= PDQ_TXOK|PDQ_IS_ONRING;
1302 pdq_os_restart_transmitter(pdq);
1303 } else if (state == PDQS_HALTED) {
1304 pdq_response_error_log_get_t log_entry;
1305 pdq_halt_code_t halt_code = PDQ_PSTS_HALT_ID(PDQ_CSR_READ(csrs, csr_port_status));
1306 printf(": halt code = %d (%s)\n",
1307 halt_code, pdq_halt_codes[halt_code]);
1308 if (halt_code == PDQH_DMA_ERROR && pdq->pdq_type == PDQ_DEFPA) {
1309 PDQ_PRINTF(("\tPFI status = 0x%x, Host 0 Fatal Interrupt = 0x%x\n",
1310 PDQ_CSR_READ(&pdq->pdq_pci_csrs, csr_pfi_status),
1311 data & PDQ_HOST_INT_FATAL_ERROR));
1312 }
1464 pdq_os_restart_transmitter(pdq);
1465 } else if (state == PDQS_HALTED) {
1466 pdq_response_error_log_get_t log_entry;
1467 pdq_halt_code_t halt_code = PDQ_PSTS_HALT_ID(PDQ_CSR_READ(csrs, csr_port_status));
1468 printf(": halt code = %d (%s)\n",
1469 halt_code, pdq_halt_codes[halt_code]);
1470 if (halt_code == PDQH_DMA_ERROR && pdq->pdq_type == PDQ_DEFPA) {
1471 PDQ_PRINTF(("\tPFI status = 0x%x, Host 0 Fatal Interrupt = 0x%x\n",
1472 PDQ_CSR_READ(&pdq->pdq_pci_csrs, csr_pfi_status),
1473 data & PDQ_HOST_INT_FATAL_ERROR));
1474 }
1313 pdq_read_error_log(pdq, &log_entry);
1475 PDQ_OS_MEMZERO(&log_entry, sizeof(log_entry));
1476 if (pdq_read_error_log(pdq, &log_entry)) {
1477 PDQ_PRINTF((" Error log Entry:\n"));
1478 PDQ_PRINTF((" CMD Status = %d (0x%x)\n",
1479 log_entry.error_log_get_status,
1480 log_entry.error_log_get_status));
1481 PDQ_PRINTF((" Event Status = %d (0x%x)\n",
1482 log_entry.error_log_get_event_status,
1483 log_entry.error_log_get_event_status));
1484 PDQ_PRINTF((" Caller Id = %d (0x%x)\n",
1485 log_entry.error_log_get_caller_id,
1486 log_entry.error_log_get_caller_id));
1487 PDQ_PRINTF((" Write Count = %d (0x%x)\n",
1488 log_entry.error_log_get_write_count,
1489 log_entry.error_log_get_write_count));
1490 PDQ_PRINTF((" FRU Implication Mask = %d (0x%x)\n",
1491 log_entry.error_log_get_fru_implication_mask,
1492 log_entry.error_log_get_fru_implication_mask));
1493 PDQ_PRINTF((" Test ID = %d (0x%x)\n",
1494 log_entry.error_log_get_test_id,
1495 log_entry.error_log_get_test_id));
1496 }
1314 pdq_stop(pdq);
1315 if (pdq->pdq_flags & PDQ_RUNNING)
1316 pdq_run(pdq);
1317 return 1;
1318 }
1319 printf("\n");
1320 PDQ_CSR_WRITE(csrs, csr_host_int_type_0, PDQ_HOST_INT_STATE_CHANGE);
1321 }

--- 23 unchanged lines hidden (view full) ---

1345 pdq_bus_memaddr_t csr_base,
1346 const char *name,
1347 int unit,
1348 void *ctx,
1349 pdq_type_t type)
1350{
1351 pdq_t *pdq;
1352 pdq_state_t state;
1497 pdq_stop(pdq);
1498 if (pdq->pdq_flags & PDQ_RUNNING)
1499 pdq_run(pdq);
1500 return 1;
1501 }
1502 printf("\n");
1503 PDQ_CSR_WRITE(csrs, csr_host_int_type_0, PDQ_HOST_INT_STATE_CHANGE);
1504 }

--- 23 unchanged lines hidden (view full) ---

1528 pdq_bus_memaddr_t csr_base,
1529 const char *name,
1530 int unit,
1531 void *ctx,
1532 pdq_type_t type)
1533{
1534 pdq_t *pdq;
1535 pdq_state_t state;
1536 pdq_descriptor_block_t *dbp;
1537#if !defined(PDQ_BUS_DMA)
1353 const pdq_uint32_t contig_bytes = (sizeof(pdq_descriptor_block_t) * 2) - PDQ_OS_PAGESIZE;
1354 pdq_uint8_t *p;
1538 const pdq_uint32_t contig_bytes = (sizeof(pdq_descriptor_block_t) * 2) - PDQ_OS_PAGESIZE;
1539 pdq_uint8_t *p;
1540#endif
1355 int idx;
1356
1357 PDQ_ASSERT(sizeof(pdq_descriptor_block_t) == 8192);
1358 PDQ_ASSERT(sizeof(pdq_consumer_block_t) == 64);
1359 PDQ_ASSERT(sizeof(pdq_response_filter_get_t) == PDQ_SIZE_RESPONSE_FILTER_GET);
1360 PDQ_ASSERT(sizeof(pdq_cmd_addr_filter_set_t) == PDQ_SIZE_CMD_ADDR_FILTER_SET);
1361 PDQ_ASSERT(sizeof(pdq_response_addr_filter_get_t) == PDQ_SIZE_RESPONSE_ADDR_FILTER_GET);
1362 PDQ_ASSERT(sizeof(pdq_response_status_chars_get_t) == PDQ_SIZE_RESPONSE_STATUS_CHARS_GET);

--- 19 unchanged lines hidden (view full) ---

1382 * to guarantee that we will a get 8KB block of memory aligned
1383 * on a 8KB boundary. This turns to require that we allocate
1384 * (N*2 - 1 page) pages of memory. On machine with less than
1385 * a 8KB page size, it mean we will allocate more memory than
1386 * we need. The extra will be used for the unsolicited event
1387 * buffers (though on machines with 8KB pages we will to allocate
1388 * them separately since there will be nothing left overs.)
1389 */
1541 int idx;
1542
1543 PDQ_ASSERT(sizeof(pdq_descriptor_block_t) == 8192);
1544 PDQ_ASSERT(sizeof(pdq_consumer_block_t) == 64);
1545 PDQ_ASSERT(sizeof(pdq_response_filter_get_t) == PDQ_SIZE_RESPONSE_FILTER_GET);
1546 PDQ_ASSERT(sizeof(pdq_cmd_addr_filter_set_t) == PDQ_SIZE_CMD_ADDR_FILTER_SET);
1547 PDQ_ASSERT(sizeof(pdq_response_addr_filter_get_t) == PDQ_SIZE_RESPONSE_ADDR_FILTER_GET);
1548 PDQ_ASSERT(sizeof(pdq_response_status_chars_get_t) == PDQ_SIZE_RESPONSE_STATUS_CHARS_GET);

--- 19 unchanged lines hidden (view full) ---

1568 * to guarantee that we will a get 8KB block of memory aligned
1569 * on a 8KB boundary. This turns to require that we allocate
1570 * (N*2 - 1 page) pages of memory. On machine with less than
1571 * a 8KB page size, it mean we will allocate more memory than
1572 * we need. The extra will be used for the unsolicited event
1573 * buffers (though on machines with 8KB pages we will to allocate
1574 * them separately since there will be nothing left overs.)
1575 */
1576#if defined(PDQ_OS_MEMALLOC_CONTIG)
1390 p = (pdq_uint8_t *) PDQ_OS_MEMALLOC_CONTIG(contig_bytes);
1577 p = (pdq_uint8_t *) PDQ_OS_MEMALLOC_CONTIG(contig_bytes);
1578
1579if (p == NULL)
1580 printf("%s() - PDQ_OS_MEMALLOC_CONTIG() failed!\n", __FUNCTION__);
1581
1391 if (p != NULL) {
1582 if (p != NULL) {
1392 pdq_physaddr_t physaddr = PDQ_OS_VA_TO_PA(pdq, p);
1583 pdq_physaddr_t physaddr = PDQ_OS_VA_TO_BUSPA(pdq, p);
1393 /*
1394 * Assert that we really got contiguous memory. This isn't really
1395 * needed on systems that actually have physical contiguous allocation
1396 * routines, but on those systems that don't ...
1397 */
1398 for (idx = PDQ_OS_PAGESIZE; idx < 0x2000; idx += PDQ_OS_PAGESIZE) {
1584 /*
1585 * Assert that we really got contiguous memory. This isn't really
1586 * needed on systems that actually have physical contiguous allocation
1587 * routines, but on those systems that don't ...
1588 */
1589 for (idx = PDQ_OS_PAGESIZE; idx < 0x2000; idx += PDQ_OS_PAGESIZE) {
1399 if (PDQ_OS_VA_TO_PA(pdq, p + idx) - physaddr != idx)
1590 if (PDQ_OS_VA_TO_BUSPA(pdq, p + idx) - physaddr != idx)
1400 goto cleanup_and_return;
1401 }
1591 goto cleanup_and_return;
1592 }
1402 physaddr &= 0x1FFF;
1403 if (physaddr) {
1593 if (physaddr & 0x1FFF) {
1404 pdq->pdq_unsolicited_info.ui_events = (pdq_unsolicited_event_t *) p;
1594 pdq->pdq_unsolicited_info.ui_events = (pdq_unsolicited_event_t *) p;
1405 pdq->pdq_dbp = (pdq_descriptor_block_t *) &p[0x2000 - physaddr];
1595 pdq->pdq_unsolicited_info.ui_pa_bufstart = physaddr;
1596 pdq->pdq_dbp = (pdq_descriptor_block_t *) &p[0x2000 - (physaddr & 0x1FFF)];
1597 pdq->pdq_pa_descriptor_block = physaddr & ~0x1FFFUL;
1406 } else {
1407 pdq->pdq_dbp = (pdq_descriptor_block_t *) p;
1598 } else {
1599 pdq->pdq_dbp = (pdq_descriptor_block_t *) p;
1600 pdq->pdq_pa_descriptor_block = physaddr;
1408 pdq->pdq_unsolicited_info.ui_events = (pdq_unsolicited_event_t *) &p[0x2000];
1601 pdq->pdq_unsolicited_info.ui_events = (pdq_unsolicited_event_t *) &p[0x2000];
1602 pdq->pdq_unsolicited_info.ui_pa_bufstart = physaddr + 0x2000;
1409 }
1410 }
1603 }
1604 }
1605 pdq->pdq_cbp = (volatile pdq_consumer_block_t *) &pdq->pdq_dbp->pdqdb_consumer;
1606 pdq->pdq_pa_consumer_block = PDQ_DB_BUSPA(pdq, pdq->pdq_cbp);
1411 if (contig_bytes == sizeof(pdq_descriptor_block_t)) {
1412 pdq->pdq_unsolicited_info.ui_events =
1413 (pdq_unsolicited_event_t *) PDQ_OS_MEMALLOC(
1414 PDQ_NUM_UNSOLICITED_EVENTS * sizeof(pdq_unsolicited_event_t));
1415 }
1607 if (contig_bytes == sizeof(pdq_descriptor_block_t)) {
1608 pdq->pdq_unsolicited_info.ui_events =
1609 (pdq_unsolicited_event_t *) PDQ_OS_MEMALLOC(
1610 PDQ_NUM_UNSOLICITED_EVENTS * sizeof(pdq_unsolicited_event_t));
1611 }
1612#else
1613 if (pdq_os_memalloc_contig(pdq))
1614 goto cleanup_and_return;
1615#endif
1416
1417 /*
1418 * Make sure everything got allocated. If not, free what did
1419 * get allocated and return.
1420 */
1421 if (pdq->pdq_dbp == NULL || pdq->pdq_unsolicited_info.ui_events == NULL) {
1422 cleanup_and_return:
1616
1617 /*
1618 * Make sure everything got allocated. If not, free what did
1619 * get allocated and return.
1620 */
1621 if (pdq->pdq_dbp == NULL || pdq->pdq_unsolicited_info.ui_events == NULL) {
1622 cleanup_and_return:
1623#ifdef PDQ_OS_MEMFREE_CONTIG
1423 if (p /* pdq->pdq_dbp */ != NULL)
1424 PDQ_OS_MEMFREE_CONTIG(p /* pdq->pdq_dbp */, contig_bytes);
1425 if (contig_bytes == sizeof(pdq_descriptor_block_t) && pdq->pdq_unsolicited_info.ui_events != NULL)
1426 PDQ_OS_MEMFREE(pdq->pdq_unsolicited_info.ui_events,
1427 PDQ_NUM_UNSOLICITED_EVENTS * sizeof(pdq_unsolicited_event_t));
1624 if (p /* pdq->pdq_dbp */ != NULL)
1625 PDQ_OS_MEMFREE_CONTIG(p /* pdq->pdq_dbp */, contig_bytes);
1626 if (contig_bytes == sizeof(pdq_descriptor_block_t) && pdq->pdq_unsolicited_info.ui_events != NULL)
1627 PDQ_OS_MEMFREE(pdq->pdq_unsolicited_info.ui_events,
1628 PDQ_NUM_UNSOLICITED_EVENTS * sizeof(pdq_unsolicited_event_t));
1629#endif
1428 PDQ_OS_MEMFREE(pdq, sizeof(pdq_t));
1429 return NULL;
1430 }
1630 PDQ_OS_MEMFREE(pdq, sizeof(pdq_t));
1631 return NULL;
1632 }
1633 dbp = pdq->pdq_dbp;
1431
1634
1432 pdq->pdq_cbp = (volatile pdq_consumer_block_t *) &pdq->pdq_dbp->pdqdb_consumer;
1433 pdq->pdq_command_info.ci_bufstart = (pdq_uint8_t *) pdq->pdq_dbp->pdqdb_command_pool;
1434 pdq->pdq_rx_info.rx_buffers = (void *) pdq->pdq_dbp->pdqdb_receive_buffers;
1435
1436 pdq->pdq_host_smt_info.rx_buffers = (void *) pdq->pdq_dbp->pdqdb_host_smt_buffers;
1437
1438 PDQ_PRINTF(("\nPDQ Descriptor Block = " PDQ_OS_PTR_FMT "\n", pdq->pdq_dbp));
1439 PDQ_PRINTF((" Recieve Queue = " PDQ_OS_PTR_FMT "\n", pdq->pdq_dbp->pdqdb_receives));
1440 PDQ_PRINTF((" Transmit Queue = " PDQ_OS_PTR_FMT "\n", pdq->pdq_dbp->pdqdb_transmits));
1441 PDQ_PRINTF((" Host SMT Queue = " PDQ_OS_PTR_FMT "\n", pdq->pdq_dbp->pdqdb_host_smt));
1442 PDQ_PRINTF((" Command Response Queue = " PDQ_OS_PTR_FMT "\n", pdq->pdq_dbp->pdqdb_command_responses));
1443 PDQ_PRINTF((" Command Request Queue = " PDQ_OS_PTR_FMT "\n", pdq->pdq_dbp->pdqdb_command_requests));
1635 PDQ_PRINTF(("\nPDQ Descriptor Block = " PDQ_OS_PTR_FMT " (PA = 0x%x)\n", dbp, pdq->pdq_pa_descriptor_block));
1636 PDQ_PRINTF((" Receive Queue = " PDQ_OS_PTR_FMT "\n", dbp->pdqdb_receives));
1637 PDQ_PRINTF((" Transmit Queue = " PDQ_OS_PTR_FMT "\n", dbp->pdqdb_transmits));
1638 PDQ_PRINTF((" Host SMT Queue = " PDQ_OS_PTR_FMT "\n", dbp->pdqdb_host_smt));
1639 PDQ_PRINTF((" Command Response Queue = " PDQ_OS_PTR_FMT "\n", dbp->pdqdb_command_responses));
1640 PDQ_PRINTF((" Command Request Queue = " PDQ_OS_PTR_FMT "\n", dbp->pdqdb_command_requests));
1444 PDQ_PRINTF(("PDQ Consumer Block = " PDQ_OS_PTR_FMT "\n", pdq->pdq_cbp));
1445
1446 /*
1447 * Zero out the descriptor block. Not really required but
1448 * it pays to be neat. This will also zero out the consumer
1449 * block, command pool, and buffer pointers for the receive
1450 * host_smt rings.
1451 */
1641 PDQ_PRINTF(("PDQ Consumer Block = " PDQ_OS_PTR_FMT "\n", pdq->pdq_cbp));
1642
1643 /*
1644 * Zero out the descriptor block. Not really required but
1645 * it pays to be neat. This will also zero out the consumer
1646 * block, command pool, and buffer pointers for the receive
1647 * host_smt rings.
1648 */
1452 PDQ_OS_MEMZERO(pdq->pdq_dbp, sizeof(*pdq->pdq_dbp));
1649 PDQ_OS_MEMZERO(dbp, sizeof(*dbp));
1453
1454 /*
1455 * Initialize the CSR references.
1456 * the DEFAA (FutureBus+) skips a longword between registers
1457 */
1458 pdq_init_csrs(&pdq->pdq_csrs, bus, csr_base, pdq->pdq_type == PDQ_DEFAA ? 2 : 1);
1459 if (pdq->pdq_type == PDQ_DEFPA)
1460 pdq_init_pci_csrs(&pdq->pdq_pci_csrs, bus, csr_base, 1);
1461
1650
1651 /*
1652 * Initialize the CSR references.
1653 * the DEFAA (FutureBus+) skips a longword between registers
1654 */
1655 pdq_init_csrs(&pdq->pdq_csrs, bus, csr_base, pdq->pdq_type == PDQ_DEFAA ? 2 : 1);
1656 if (pdq->pdq_type == PDQ_DEFPA)
1657 pdq_init_pci_csrs(&pdq->pdq_pci_csrs, bus, csr_base, 1);
1658
1462 PDQ_PRINTF(("PDQ CSRs: BASE = " PDQ_OS_PTR_FMT "\n", pdq->pdq_csrs.csr_base));
1463 PDQ_PRINTF((" Port Reset = " PDQ_OS_PTR_FMT " [0x%08x]\n",
1659 PDQ_PRINTF(("PDQ CSRs: BASE = " PDQ_OS_CSR_FMT "\n", pdq->pdq_csrs.csr_base));
1660 PDQ_PRINTF((" Port Reset = " PDQ_OS_CSR_FMT " [0x%08x]\n",
1464 pdq->pdq_csrs.csr_port_reset, PDQ_CSR_READ(&pdq->pdq_csrs, csr_port_reset)));
1661 pdq->pdq_csrs.csr_port_reset, PDQ_CSR_READ(&pdq->pdq_csrs, csr_port_reset)));
1465 PDQ_PRINTF((" Host Data = " PDQ_OS_PTR_FMT " [0x%08x]\n",
1662 PDQ_PRINTF((" Host Data = " PDQ_OS_CSR_FMT " [0x%08x]\n",
1466 pdq->pdq_csrs.csr_host_data, PDQ_CSR_READ(&pdq->pdq_csrs, csr_host_data)));
1663 pdq->pdq_csrs.csr_host_data, PDQ_CSR_READ(&pdq->pdq_csrs, csr_host_data)));
1467 PDQ_PRINTF((" Port Control = " PDQ_OS_PTR_FMT " [0x%08x]\n",
1664 PDQ_PRINTF((" Port Control = " PDQ_OS_CSR_FMT " [0x%08x]\n",
1468 pdq->pdq_csrs.csr_port_control, PDQ_CSR_READ(&pdq->pdq_csrs, csr_port_control)));
1665 pdq->pdq_csrs.csr_port_control, PDQ_CSR_READ(&pdq->pdq_csrs, csr_port_control)));
1469 PDQ_PRINTF((" Port Data A = " PDQ_OS_PTR_FMT " [0x%08x]\n",
1666 PDQ_PRINTF((" Port Data A = " PDQ_OS_CSR_FMT " [0x%08x]\n",
1470 pdq->pdq_csrs.csr_port_data_a, PDQ_CSR_READ(&pdq->pdq_csrs, csr_port_data_a)));
1667 pdq->pdq_csrs.csr_port_data_a, PDQ_CSR_READ(&pdq->pdq_csrs, csr_port_data_a)));
1471 PDQ_PRINTF((" Port Data B = " PDQ_OS_PTR_FMT " [0x%08x]\n",
1668 PDQ_PRINTF((" Port Data B = " PDQ_OS_CSR_FMT " [0x%08x]\n",
1472 pdq->pdq_csrs.csr_port_data_b, PDQ_CSR_READ(&pdq->pdq_csrs, csr_port_data_b)));
1669 pdq->pdq_csrs.csr_port_data_b, PDQ_CSR_READ(&pdq->pdq_csrs, csr_port_data_b)));
1473 PDQ_PRINTF((" Port Status = " PDQ_OS_PTR_FMT " [0x%08x]\n",
1670 PDQ_PRINTF((" Port Status = " PDQ_OS_CSR_FMT " [0x%08x]\n",
1474 pdq->pdq_csrs.csr_port_status, PDQ_CSR_READ(&pdq->pdq_csrs, csr_port_status)));
1671 pdq->pdq_csrs.csr_port_status, PDQ_CSR_READ(&pdq->pdq_csrs, csr_port_status)));
1475 PDQ_PRINTF((" Host Int Type 0 = " PDQ_OS_PTR_FMT " [0x%08x]\n",
1672 PDQ_PRINTF((" Host Int Type 0 = " PDQ_OS_CSR_FMT " [0x%08x]\n",
1476 pdq->pdq_csrs.csr_host_int_type_0, PDQ_CSR_READ(&pdq->pdq_csrs, csr_host_int_type_0)));
1673 pdq->pdq_csrs.csr_host_int_type_0, PDQ_CSR_READ(&pdq->pdq_csrs, csr_host_int_type_0)));
1477 PDQ_PRINTF((" Host Int Enable = " PDQ_OS_PTR_FMT " [0x%08x]\n",
1674 PDQ_PRINTF((" Host Int Enable = " PDQ_OS_CSR_FMT " [0x%08x]\n",
1478 pdq->pdq_csrs.csr_host_int_enable, PDQ_CSR_READ(&pdq->pdq_csrs, csr_host_int_enable)));
1675 pdq->pdq_csrs.csr_host_int_enable, PDQ_CSR_READ(&pdq->pdq_csrs, csr_host_int_enable)));
1479 PDQ_PRINTF((" Type 2 Producer = " PDQ_OS_PTR_FMT " [0x%08x]\n",
1676 PDQ_PRINTF((" Type 2 Producer = " PDQ_OS_CSR_FMT " [0x%08x]\n",
1480 pdq->pdq_csrs.csr_type_2_producer, PDQ_CSR_READ(&pdq->pdq_csrs, csr_type_2_producer)));
1677 pdq->pdq_csrs.csr_type_2_producer, PDQ_CSR_READ(&pdq->pdq_csrs, csr_type_2_producer)));
1481 PDQ_PRINTF((" Command Response Producer = " PDQ_OS_PTR_FMT " [0x%08x]\n",
1678 PDQ_PRINTF((" Command Response Producer = " PDQ_OS_CSR_FMT " [0x%08x]\n",
1482 pdq->pdq_csrs.csr_cmd_response_producer, PDQ_CSR_READ(&pdq->pdq_csrs, csr_cmd_response_producer)));
1679 pdq->pdq_csrs.csr_cmd_response_producer, PDQ_CSR_READ(&pdq->pdq_csrs, csr_cmd_response_producer)));
1483 PDQ_PRINTF((" Command Request Producer = " PDQ_OS_PTR_FMT " [0x%08x]\n",
1680 PDQ_PRINTF((" Command Request Producer = " PDQ_OS_CSR_FMT " [0x%08x]\n",
1484 pdq->pdq_csrs.csr_cmd_request_producer, PDQ_CSR_READ(&pdq->pdq_csrs, csr_cmd_request_producer)));
1681 pdq->pdq_csrs.csr_cmd_request_producer, PDQ_CSR_READ(&pdq->pdq_csrs, csr_cmd_request_producer)));
1485 PDQ_PRINTF((" Host SMT Producer = " PDQ_OS_PTR_FMT " [0x%08x]\n",
1682 PDQ_PRINTF((" Host SMT Producer = " PDQ_OS_CSR_FMT " [0x%08x]\n",
1486 pdq->pdq_csrs.csr_host_smt_producer, PDQ_CSR_READ(&pdq->pdq_csrs, csr_host_smt_producer)));
1683 pdq->pdq_csrs.csr_host_smt_producer, PDQ_CSR_READ(&pdq->pdq_csrs, csr_host_smt_producer)));
1487 PDQ_PRINTF((" Unsolicited Producer = " PDQ_OS_PTR_FMT " [0x%08x]\n",
1684 PDQ_PRINTF((" Unsolicited Producer = " PDQ_OS_CSR_FMT " [0x%08x]\n",
1488 pdq->pdq_csrs.csr_unsolicited_producer, PDQ_CSR_READ(&pdq->pdq_csrs, csr_unsolicited_producer)));
1489
1490 /*
1491 * Initialize the command information block
1492 */
1685 pdq->pdq_csrs.csr_unsolicited_producer, PDQ_CSR_READ(&pdq->pdq_csrs, csr_unsolicited_producer)));
1686
1687 /*
1688 * Initialize the command information block
1689 */
1493 pdq->pdq_command_info.ci_pa_bufstart = PDQ_OS_VA_TO_PA(pdq, pdq->pdq_command_info.ci_bufstart);
1494 for (idx = 0; idx < sizeof(pdq->pdq_dbp->pdqdb_command_requests)/sizeof(pdq->pdq_dbp->pdqdb_command_requests[0]); idx++) {
1495 pdq_txdesc_t *txd = &pdq->pdq_dbp->pdqdb_command_requests[idx];
1690 pdq->pdq_command_info.ci_request_bufstart = dbp->pdqdb_cmd_request_buf;
1691 pdq->pdq_command_info.ci_pa_request_bufstart = PDQ_DB_BUSPA(pdq, pdq->pdq_command_info.ci_request_bufstart);
1692 pdq->pdq_command_info.ci_pa_request_descriptors = PDQ_DB_BUSPA(pdq, dbp->pdqdb_command_requests);
1693 PDQ_PRINTF(("PDQ Command Request Buffer = " PDQ_OS_PTR_FMT " (PA=0x%x)\n",
1694 pdq->pdq_command_info.ci_request_bufstart,
1695 pdq->pdq_command_info.ci_pa_request_bufstart));
1696 for (idx = 0; idx < sizeof(dbp->pdqdb_command_requests)/sizeof(dbp->pdqdb_command_requests[0]); idx++) {
1697 pdq_txdesc_t *txd = &dbp->pdqdb_command_requests[idx];
1496
1698
1497 txd->txd_pa_lo = pdq->pdq_command_info.ci_pa_bufstart;
1699 txd->txd_pa_lo = pdq->pdq_command_info.ci_pa_request_bufstart;
1498 txd->txd_eop = txd->txd_sop = 1;
1499 txd->txd_pa_hi = 0;
1500 }
1700 txd->txd_eop = txd->txd_sop = 1;
1701 txd->txd_pa_hi = 0;
1702 }
1501 for (idx = 0; idx < sizeof(pdq->pdq_dbp->pdqdb_command_responses)/sizeof(pdq->pdq_dbp->pdqdb_command_responses[0]); idx++) {
1502 pdq_rxdesc_t *rxd = &pdq->pdq_dbp->pdqdb_command_responses[idx];
1703 PDQ_OS_DESC_PRESYNC(pdq, dbp->pdqdb_command_requests,
1704 sizeof(dbp->pdqdb_command_requests));
1503
1705
1504 rxd->rxd_pa_lo = pdq->pdq_command_info.ci_pa_bufstart;
1706 pdq->pdq_command_info.ci_response_bufstart = dbp->pdqdb_cmd_response_buf;
1707 pdq->pdq_command_info.ci_pa_response_bufstart = PDQ_DB_BUSPA(pdq, pdq->pdq_command_info.ci_response_bufstart);
1708 pdq->pdq_command_info.ci_pa_response_descriptors = PDQ_DB_BUSPA(pdq, dbp->pdqdb_command_responses);
1709 PDQ_PRINTF(("PDQ Command Response Buffer = " PDQ_OS_PTR_FMT " (PA=0x%x)\n",
1710 pdq->pdq_command_info.ci_response_bufstart,
1711 pdq->pdq_command_info.ci_pa_response_bufstart));
1712 for (idx = 0; idx < sizeof(dbp->pdqdb_command_responses)/sizeof(dbp->pdqdb_command_responses[0]); idx++) {
1713 pdq_rxdesc_t *rxd = &dbp->pdqdb_command_responses[idx];
1714
1715 rxd->rxd_pa_lo = pdq->pdq_command_info.ci_pa_response_bufstart;
1505 rxd->rxd_sop = 1;
1506 rxd->rxd_seg_cnt = 0;
1507 rxd->rxd_seg_len_lo = 0;
1716 rxd->rxd_sop = 1;
1717 rxd->rxd_seg_cnt = 0;
1718 rxd->rxd_seg_len_lo = 0;
1719 rxd->rxd_seg_len_hi = PDQ_SIZE_COMMAND_RESPONSE / 16;
1508 }
1720 }
1721 PDQ_OS_DESC_PRESYNC(pdq, dbp->pdqdb_command_responses,
1722 sizeof(dbp->pdqdb_command_responses));
1509
1510 /*
1511 * Initialize the unsolicited event information block
1512 */
1513 pdq->pdq_unsolicited_info.ui_free = PDQ_NUM_UNSOLICITED_EVENTS;
1723
1724 /*
1725 * Initialize the unsolicited event information block
1726 */
1727 pdq->pdq_unsolicited_info.ui_free = PDQ_NUM_UNSOLICITED_EVENTS;
1514 pdq->pdq_unsolicited_info.ui_pa_bufstart = PDQ_OS_VA_TO_PA(pdq, pdq->pdq_unsolicited_info.ui_events);
1515 for (idx = 0; idx < sizeof(pdq->pdq_dbp->pdqdb_unsolicited_events)/sizeof(pdq->pdq_dbp->pdqdb_unsolicited_events[0]); idx++) {
1516 pdq_rxdesc_t *rxd = &pdq->pdq_dbp->pdqdb_unsolicited_events[idx];
1728 pdq->pdq_unsolicited_info.ui_pa_descriptors = PDQ_DB_BUSPA(pdq, dbp->pdqdb_unsolicited_events);
1729 PDQ_PRINTF(("PDQ Unsolicit Event Buffer = " PDQ_OS_PTR_FMT " (PA=0x%x)\n",
1730 pdq->pdq_unsolicited_info.ui_events,
1731 pdq->pdq_unsolicited_info.ui_pa_bufstart));
1732 for (idx = 0; idx < sizeof(dbp->pdqdb_unsolicited_events)/sizeof(dbp->pdqdb_unsolicited_events[0]); idx++) {
1733 pdq_rxdesc_t *rxd = &dbp->pdqdb_unsolicited_events[idx];
1517 pdq_unsolicited_event_t *event = &pdq->pdq_unsolicited_info.ui_events[idx & (PDQ_NUM_UNSOLICITED_EVENTS-1)];
1518
1519 rxd->rxd_sop = 1;
1520 rxd->rxd_seg_cnt = 0;
1521 rxd->rxd_seg_len_hi = sizeof(pdq_unsolicited_event_t) / 16;
1522 rxd->rxd_pa_lo = pdq->pdq_unsolicited_info.ui_pa_bufstart + (const pdq_uint8_t *) event
1523 - (const pdq_uint8_t *) pdq->pdq_unsolicited_info.ui_events;
1524 rxd->rxd_pa_hi = 0;
1734 pdq_unsolicited_event_t *event = &pdq->pdq_unsolicited_info.ui_events[idx & (PDQ_NUM_UNSOLICITED_EVENTS-1)];
1735
1736 rxd->rxd_sop = 1;
1737 rxd->rxd_seg_cnt = 0;
1738 rxd->rxd_seg_len_hi = sizeof(pdq_unsolicited_event_t) / 16;
1739 rxd->rxd_pa_lo = pdq->pdq_unsolicited_info.ui_pa_bufstart + (const pdq_uint8_t *) event
1740 - (const pdq_uint8_t *) pdq->pdq_unsolicited_info.ui_events;
1741 rxd->rxd_pa_hi = 0;
1742 PDQ_OS_UNSOL_EVENT_PRESYNC(pdq, event);
1525 }
1743 }
1744 PDQ_OS_DESC_PRESYNC(pdq, dbp->pdqdb_unsolicited_events,
1745 sizeof(dbp->pdqdb_unsolicited_events));
1746
1526 /*
1527 * Initialize the receive information blocks (normal and SMT).
1528 */
1747 /*
1748 * Initialize the receive information blocks (normal and SMT).
1749 */
1529 pdq->pdq_rx_info.rx_free = PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_receives);
1750 pdq->pdq_rx_info.rx_buffers = pdq->pdq_receive_buffers;
1751 pdq->pdq_rx_info.rx_free = PDQ_RING_MASK(dbp->pdqdb_receives);
1530 pdq->pdq_rx_info.rx_target = pdq->pdq_rx_info.rx_free - PDQ_RX_SEGCNT * 8;
1752 pdq->pdq_rx_info.rx_target = pdq->pdq_rx_info.rx_free - PDQ_RX_SEGCNT * 8;
1753 pdq->pdq_rx_info.rx_pa_descriptors = PDQ_DB_BUSPA(pdq, dbp->pdqdb_receives);
1531
1754
1532 pdq->pdq_host_smt_info.rx_free = PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_host_smt);
1755 pdq->pdq_host_smt_info.rx_buffers = pdq->pdq_host_smt_buffers;
1756 pdq->pdq_host_smt_info.rx_free = PDQ_RING_MASK(dbp->pdqdb_host_smt);
1533 pdq->pdq_host_smt_info.rx_target = pdq->pdq_host_smt_info.rx_free - PDQ_RX_SEGCNT * 3;
1757 pdq->pdq_host_smt_info.rx_target = pdq->pdq_host_smt_info.rx_free - PDQ_RX_SEGCNT * 3;
1758 pdq->pdq_host_smt_info.rx_pa_descriptors = PDQ_DB_BUSPA(pdq, dbp->pdqdb_host_smt);
1534
1535 /*
1536 * Initialize the transmit information block.
1537 */
1759
1760 /*
1761 * Initialize the transmit information block.
1762 */
1538 pdq->pdq_tx_hdr[0] = PDQ_FDDI_PH0;
1539 pdq->pdq_tx_hdr[1] = PDQ_FDDI_PH1;
1540 pdq->pdq_tx_hdr[2] = PDQ_FDDI_PH2;
1541 pdq->pdq_tx_info.tx_free = PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_transmits);
1542 pdq->pdq_tx_info.tx_hdrdesc.txd_seg_len = sizeof(pdq->pdq_tx_hdr);
1763 dbp->pdqdb_tx_hdr[0] = PDQ_FDDI_PH0;
1764 dbp->pdqdb_tx_hdr[1] = PDQ_FDDI_PH1;
1765 dbp->pdqdb_tx_hdr[2] = PDQ_FDDI_PH2;
1766 pdq->pdq_tx_info.tx_free = PDQ_RING_MASK(dbp->pdqdb_transmits);
1767 pdq->pdq_tx_info.tx_hdrdesc.txd_seg_len = 3;
1543 pdq->pdq_tx_info.tx_hdrdesc.txd_sop = 1;
1768 pdq->pdq_tx_info.tx_hdrdesc.txd_sop = 1;
1544 pdq->pdq_tx_info.tx_hdrdesc.txd_pa_lo = PDQ_OS_VA_TO_PA(pdq, pdq->pdq_tx_hdr);
1769 pdq->pdq_tx_info.tx_hdrdesc.txd_pa_lo = PDQ_DB_BUSPA(pdq, dbp->pdqdb_tx_hdr);
1770 pdq->pdq_tx_info.tx_pa_descriptors = PDQ_DB_BUSPA(pdq, dbp->pdqdb_transmits);
1545
1546 state = PDQ_PSTS_ADAPTER_STATE(PDQ_CSR_READ(&pdq->pdq_csrs, csr_port_status));
1547 PDQ_PRINTF(("PDQ Adapter State = %s\n", pdq_adapter_states[state]));
1548
1549 /*
1550 * Stop the PDQ if it is running and put it into a known state.
1551 */
1552 state = pdq_stop(pdq);

--- 38 unchanged lines hidden --- 		1771
1772 state = PDQ_PSTS_ADAPTER_STATE(PDQ_CSR_READ(&pdq->pdq_csrs, csr_port_status));
1773 PDQ_PRINTF(("PDQ Adapter State = %s\n", pdq_adapter_states[state]));
1774
1775 /*
1776 * Stop the PDQ if it is running and put it into a known state.
1777 */
1778 state = pdq_stop(pdq);

--- 38 unchanged lines hidden ---