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pccbb.c (100424) pccbb.c (100704)
1/*
1/*
2 * Copyright (c) 2002 M. Warner Losh.
2 * Copyright (c) 2000,2001 Jonathan Chen.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions, and the following disclaimer,

--- 10 unchanged lines hidden (view full) ---

20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
3 * Copyright (c) 2000,2001 Jonathan Chen.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions, and the following disclaimer,

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21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
28 * $FreeBSD: head/sys/dev/pccbb/pccbb.c 100424 2002-07-21 04:23:11Z imp $
29 * $FreeBSD: head/sys/dev/pccbb/pccbb.c 100704 2002-07-26 08:05:25Z imp $
29 */
30
31/*
32 * Copyright (c) 1998, 1999 and 2000
33 * HAYAKAWA Koichi. All rights reserved.
34 *
35 * Redistribution and use in source and binary forms, with or without
36 * modification, are permitted provided that the following conditions

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120#define PCCBB_START_16_IO 0x100
121
122struct yenta_chipinfo {
123 uint32_t yc_id;
124 const char *yc_name;
125 int yc_chiptype;
126} yc_chipsets[] = {
127 /* Texas Instruments chips */
30 */
31
32/*
33 * Copyright (c) 1998, 1999 and 2000
34 * HAYAKAWA Koichi. All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions

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121#define PCCBB_START_16_IO 0x100
122
123struct yenta_chipinfo {
124 uint32_t yc_id;
125 const char *yc_name;
126 int yc_chiptype;
127} yc_chipsets[] = {
128 /* Texas Instruments chips */
128 {PCI_DEVICE_ID_PCIC_TI1031, "TI1031 PCI-PC Card Bridge", CB_TI113X},
129 {PCI_DEVICE_ID_PCIC_TI1130, "TI1130 PCI-CardBus Bridge", CB_TI113X},
130 {PCI_DEVICE_ID_PCIC_TI1131, "TI1131 PCI-CardBus Bridge", CB_TI113X},
129 {PCIC_ID_TI1031, "TI1031 PCI-PC Card Bridge", CB_TI113X},
130 {PCIC_ID_TI1130, "TI1130 PCI-CardBus Bridge", CB_TI113X},
131 {PCIC_ID_TI1131, "TI1131 PCI-CardBus Bridge", CB_TI113X},
131
132
132 {PCI_DEVICE_ID_PCIC_TI1210, "TI1210 PCI-CardBus Bridge", CB_TI12XX},
133 {PCI_DEVICE_ID_PCIC_TI1211, "TI1211 PCI-CardBus Bridge", CB_TI12XX},
134 {PCI_DEVICE_ID_PCIC_TI1220, "TI1220 PCI-CardBus Bridge", CB_TI12XX},
135 {PCI_DEVICE_ID_PCIC_TI1221, "TI1221 PCI-CardBus Bridge", CB_TI12XX},
136 {PCI_DEVICE_ID_PCIC_TI1225, "TI1225 PCI-CardBus Bridge", CB_TI12XX},
137 {PCI_DEVICE_ID_PCIC_TI1250, "TI1250 PCI-CardBus Bridge", CB_TI12XX},
138 {PCI_DEVICE_ID_PCIC_TI1251, "TI1251 PCI-CardBus Bridge", CB_TI12XX},
139 {PCI_DEVICE_ID_PCIC_TI1251B,"TI1251B PCI-CardBus Bridge",CB_TI12XX},
140 {PCI_DEVICE_ID_PCIC_TI1260, "TI1260 PCI-CardBus Bridge", CB_TI12XX},
141 {PCI_DEVICE_ID_PCIC_TI1260B,"TI1260B PCI-CardBus Bridge",CB_TI12XX},
142 {PCI_DEVICE_ID_PCIC_TI1410, "TI1410 PCI-CardBus Bridge", CB_TI12XX},
143 {PCI_DEVICE_ID_PCIC_TI1420, "TI1420 PCI-CardBus Bridge", CB_TI12XX},
144 {PCI_DEVICE_ID_PCIC_TI1421, "TI1421 PCI-CardBus Bridge", CB_TI12XX},
145 {PCI_DEVICE_ID_PCIC_TI1450, "TI1450 PCI-CardBus Bridge", CB_TI12XX},
146 {PCI_DEVICE_ID_PCIC_TI1451, "TI1451 PCI-CardBus Bridge", CB_TI12XX},
147 {PCI_DEVICE_ID_PCIC_TI4410, "TI4410 PCI-CardBus Bridge", CB_TI12XX},
148 {PCI_DEVICE_ID_PCIC_TI4450, "TI4450 PCI-CardBus Bridge", CB_TI12XX},
149 {PCI_DEVICE_ID_PCIC_TI4451, "TI4451 PCI-CardBus Bridge", CB_TI12XX},
133 {PCIC_ID_TI1210, "TI1210 PCI-CardBus Bridge", CB_TI12XX},
134 {PCIC_ID_TI1211, "TI1211 PCI-CardBus Bridge", CB_TI12XX},
135 {PCIC_ID_TI1220, "TI1220 PCI-CardBus Bridge", CB_TI12XX},
136 {PCIC_ID_TI1221, "TI1221 PCI-CardBus Bridge", CB_TI12XX},
137 {PCIC_ID_TI1225, "TI1225 PCI-CardBus Bridge", CB_TI12XX},
138 {PCIC_ID_TI1250, "TI1250 PCI-CardBus Bridge", CB_TI125X},
139 {PCIC_ID_TI1251, "TI1251 PCI-CardBus Bridge", CB_TI125X},
140 {PCIC_ID_TI1251B,"TI1251B PCI-CardBus Bridge",CB_TI125X},
141 {PCIC_ID_TI1260, "TI1260 PCI-CardBus Bridge", CB_TI12XX},
142 {PCIC_ID_TI1260B,"TI1260B PCI-CardBus Bridge",CB_TI12XX},
143 {PCIC_ID_TI1410, "TI1410 PCI-CardBus Bridge", CB_TI12XX},
144 {PCIC_ID_TI1420, "TI1420 PCI-CardBus Bridge", CB_TI12XX},
145 {PCIC_ID_TI1421, "TI1421 PCI-CardBus Bridge", CB_TI12XX},
146 {PCIC_ID_TI1450, "TI1450 PCI-CardBus Bridge", CB_TI125X},
147 {PCIC_ID_TI1451, "TI1451 PCI-CardBus Bridge", CB_TI12XX},
148 {PCIC_ID_TI1510, "TI1510 PCI-CardBus Bridge", CB_TI12XX},
149 {PCIC_ID_TI1520, "TI1520 PCI-CardBus Bridge", CB_TI12XX},
150 {PCIC_ID_TI4410, "TI4410 PCI-CardBus Bridge", CB_TI12XX},
151 {PCIC_ID_TI4450, "TI4450 PCI-CardBus Bridge", CB_TI12XX},
152 {PCIC_ID_TI4451, "TI4451 PCI-CardBus Bridge", CB_TI12XX},
153 {PCIC_ID_TI4510, "TI4510 PCI-CardBus Bridge", CB_TI12XX},
150
151 /* Ricoh chips */
154
155 /* Ricoh chips */
152 {PCI_DEVICE_ID_RICOH_RL5C465, "RF5C465 PCI-CardBus Bridge",
153 CB_RF5C46X},
154 {PCI_DEVICE_ID_RICOH_RL5C466, "RF5C466 PCI-CardBus Bridge",
155 CB_RF5C46X},
156 {PCI_DEVICE_ID_RICOH_RL5C475, "RF5C475 PCI-CardBus Bridge",
157 CB_RF5C47X},
158 {PCI_DEVICE_ID_RICOH_RL5C476, "RF5C476 PCI-CardBus Bridge",
159 CB_RF5C47X},
160 {PCI_DEVICE_ID_RICOH_RL5C477, "RF5C477 PCI-CardBus Bridge",
161 CB_RF5C47X},
162 {PCI_DEVICE_ID_RICOH_RL5C478, "RF5C478 PCI-CardBus Bridge",
163 CB_RF5C47X},
156 {PCIC_ID_RICOH_RL5C465, "RF5C465 PCI-CardBus Bridge", CB_RF5C46X},
157 {PCIC_ID_RICOH_RL5C466, "RF5C466 PCI-CardBus Bridge", CB_RF5C46X},
158 {PCIC_ID_RICOH_RL5C475, "RF5C475 PCI-CardBus Bridge", CB_RF5C47X},
159 {PCIC_ID_RICOH_RL5C476, "RF5C476 PCI-CardBus Bridge", CB_RF5C47X},
160 {PCIC_ID_RICOH_RL5C477, "RF5C477 PCI-CardBus Bridge", CB_RF5C47X},
161 {PCIC_ID_RICOH_RL5C478, "RF5C478 PCI-CardBus Bridge", CB_RF5C47X},
164
165 /* Toshiba products */
162
163 /* Toshiba products */
166 {PCI_DEVICE_ID_TOSHIBA_TOPIC95, "ToPIC95 PCI-CardBus Bridge",
167 CB_TOPIC95},
168 {PCI_DEVICE_ID_TOSHIBA_TOPIC95B, "ToPIC95B PCI-CardBus Bridge",
169 CB_TOPIC95},
170 {PCI_DEVICE_ID_TOSHIBA_TOPIC97, "ToPIC97 PCI-CardBus Bridge",
171 CB_TOPIC97},
172 {PCI_DEVICE_ID_TOSHIBA_TOPIC100, "ToPIC100 PCI-CardBus Bridge",
173 CB_TOPIC97},
164 {PCIC_ID_TOPIC95, "ToPIC95 PCI-CardBus Bridge", CB_TOPIC95},
165 {PCIC_ID_TOPIC95B, "ToPIC95B PCI-CardBus Bridge", CB_TOPIC95},
166 {PCIC_ID_TOPIC97, "ToPIC97 PCI-CardBus Bridge", CB_TOPIC97},
167 {PCIC_ID_TOPIC100, "ToPIC100 PCI-CardBus Bridge", CB_TOPIC97},
174
175 /* Cirrus Logic */
168
169 /* Cirrus Logic */
176 {PCI_DEVICE_ID_PCIC_CLPD6832, "CLPD6832 PCI-CardBus Bridge",
177 CB_CIRRUS},
178 {PCI_DEVICE_ID_PCIC_CLPD6833, "CLPD6833 PCI-CardBus Bridge",
179 CB_CIRRUS},
180 {PCI_DEVICE_ID_PCIC_CLPD6834, "CLPD6834 PCI-CardBus Bridge",
181 CB_CIRRUS},
170 {PCIC_ID_CLPD6832, "CLPD6832 PCI-CardBus Bridge", CB_CIRRUS},
171 {PCIC_ID_CLPD6833, "CLPD6833 PCI-CardBus Bridge", CB_CIRRUS},
172 {PCIC_ID_CLPD6834, "CLPD6834 PCI-CardBus Bridge", CB_CIRRUS},
182
183 /* 02Micro */
173
174 /* 02Micro */
184 {PCI_DEVICE_ID_PCIC_OZ6832, "O2Mirco OZ6832/6833 PCI-CardBus Bridge",
185 CB_CIRRUS},
186 {PCI_DEVICE_ID_PCIC_OZ6860, "O2Mirco OZ6836/6860 PCI-CardBus Bridge",
187 CB_CIRRUS},
188 {PCI_DEVICE_ID_PCIC_OZ6872, "O2Mirco OZ6812/6872 PCI-CardBus Bridge",
189 CB_CIRRUS},
190 {PCI_DEVICE_ID_PCIC_OZ6912, "O2Mirco OZ6912/6972 PCI-CardBus Bridge",
191 CB_CIRRUS},
192 {PCI_DEVICE_ID_PCIC_OZ6922, "O2Mirco OZ6822 PCI-CardBus Bridge",
193 CB_CIRRUS},
194 {PCI_DEVICE_ID_PCIC_OZ6933, "O2Mirco OZ6833 PCI-CardBus Bridge",
195 CB_CIRRUS},
175 {PCIC_ID_OZ6832, "O2Mirco OZ6832/6833 PCI-CardBus Bridge", CB_CIRRUS},
176 {PCIC_ID_OZ6860, "O2Mirco OZ6836/6860 PCI-CardBus Bridge", CB_CIRRUS},
177 {PCIC_ID_OZ6872, "O2Mirco OZ6812/6872 PCI-CardBus Bridge", CB_CIRRUS},
178 {PCIC_ID_OZ6912, "O2Mirco OZ6912/6972 PCI-CardBus Bridge", CB_CIRRUS},
179 {PCIC_ID_OZ6922, "O2Mirco OZ6822 PCI-CardBus Bridge", CB_CIRRUS},
180 {PCIC_ID_OZ6933, "O2Mirco OZ6833 PCI-CardBus Bridge", CB_CIRRUS},
196
197 /* sentinel */
198 {0 /* null id */, "unknown", CB_UNKNOWN},
199};
200
201/* sysctl vars */
202SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters");
203

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301}
302
303static __inline void
304pccbb_clrb(struct pccbb_softc *sc, uint32_t reg, uint32_t bits)
305{
306 pccbb_set(sc, reg, pccbb_get(sc, reg) & ~bits);
307}
308
181
182 /* sentinel */
183 {0 /* null id */, "unknown", CB_UNKNOWN},
184};
185
186/* sysctl vars */
187SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters");
188

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286}
287
288static __inline void
289pccbb_clrb(struct pccbb_softc *sc, uint32_t reg, uint32_t bits)
290{
291 pccbb_set(sc, reg, pccbb_get(sc, reg) & ~bits);
292}
293
309static __inline uint8_t
310pccbb_pcic_read(struct exca_softc *sc, int reg)
311{
312 return (bus_space_read_1(sc->bst, sc->bsh, sc->offset + reg));
313}
314
315static __inline void
316pccbb_pcic_write(struct exca_softc *sc, int reg, uint8_t val)
317{
318 return (bus_space_write_1(sc->bst, sc->bsh, sc->offset + reg, val));
319}
320
321static void
322pccbb_remove_res(struct pccbb_softc *sc, struct resource *res)
323{
324 struct pccbb_reslist *rle;
325
326 SLIST_FOREACH(rle, &sc->rl, link) {
327 if (rle->res == res) {
328 SLIST_REMOVE(&sc->rl, rle, pccbb_reslist, link);

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425 }
426 return (ENXIO);
427}
428
429
430static void
431pccbb_chipinit(struct pccbb_softc *sc)
432{
294static void
295pccbb_remove_res(struct pccbb_softc *sc, struct resource *res)
296{
297 struct pccbb_reslist *rle;
298
299 SLIST_FOREACH(rle, &sc->rl, link) {
300 if (rle->res == res) {
301 SLIST_REMOVE(&sc->rl, rle, pccbb_reslist, link);

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398 }
399 return (ENXIO);
400}
401
402
403static void
404pccbb_chipinit(struct pccbb_softc *sc)
405{
406 uint32_t mux, sysctrl;
407
433 /* Set CardBus latency timer */
434 if (pci_read_config(sc->dev, PCIR_SECLAT_1, 1) < 0x20)
435 pci_write_config(sc->dev, PCIR_SECLAT_1, 0x20, 1);
436
437 /* Set PCI latency timer */
438 if (pci_read_config(sc->dev, PCIR_LATTIMER, 1) < 0x20)
439 pci_write_config(sc->dev, PCIR_LATTIMER, 0x20, 1);
440

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479 PCI_MASK_CONFIG(sc->dev, CBBR_CBCTRL,
480 | CBBM_CBCTRL_113X_PCI_INTR |
481 CBBM_CBCTRL_113X_PCI_CSC | CBBM_CBCTRL_113X_PCI_IRQ_EN,
482 1);
483 PCI_MASK_CONFIG(sc->dev, CBBR_DEVCTRL,
484 & ~(CBBM_DEVCTRL_INT_SERIAL |
485 CBBM_DEVCTRL_INT_PCI), 1);
486 break;
408 /* Set CardBus latency timer */
409 if (pci_read_config(sc->dev, PCIR_SECLAT_1, 1) < 0x20)
410 pci_write_config(sc->dev, PCIR_SECLAT_1, 0x20, 1);
411
412 /* Set PCI latency timer */
413 if (pci_read_config(sc->dev, PCIR_LATTIMER, 1) < 0x20)
414 pci_write_config(sc->dev, PCIR_LATTIMER, 0x20, 1);
415

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454 PCI_MASK_CONFIG(sc->dev, CBBR_CBCTRL,
455 | CBBM_CBCTRL_113X_PCI_INTR |
456 CBBM_CBCTRL_113X_PCI_CSC | CBBM_CBCTRL_113X_PCI_IRQ_EN,
457 1);
458 PCI_MASK_CONFIG(sc->dev, CBBR_DEVCTRL,
459 & ~(CBBM_DEVCTRL_INT_SERIAL |
460 CBBM_DEVCTRL_INT_PCI), 1);
461 break;
462 case CB_TI12XX:
463 /*
464 * Some TI 12xx (and [14][45]xx) based pci cards
465 * sometimes have issues with the MFUNC register not
466 * being initialized due to a bad EEPROM on board.
467 * Laptops that this matters on have this register
468 * properly initialized.
469 *
470 * The TI125X parts have a different register.
471 */
472 mux = pci_read_config(sc->dev, CBBR_MFUNC, 4);
473 sysctrl = pci_read_config(sc->dev, CBBR_SYSCTRL, 4);
474 if (mux == 0) {
475 mux = (mux & ~CBBM_MFUNC_PIN0) |
476 CBBM_MFUNC_PIN0_INTA;
477 if ((sysctrl & CBBM_SYSCTRL_INTRTIE) == 0)
478 mux = (mux & ~CBBM_MFUNC_PIN1) |
479 CBBM_MFUNC_PIN1_INTB;
480 pci_write_config(sc->dev, CBBR_MFUNC, mux, 4);
481 }
482 /*FALLTHROUGH*/
483 case CB_TI125X:
484 /*
485 * Disable zoom video. Some machines initialize this
486 * improperly and exerpience has shown that this helps
487 * on some machines.
488 */
489 pci_write_config(sc->dev, CBBR_MMCTRL, 0, 4);
490 break;
487 case CB_TOPIC97:
488 /*
489 * Disable Zoom Video, ToPIC 97, 100.
490 */
491 pci_write_config(sc->dev, CBBR_TOPIC_ZV_CONTROL, 0, 1);
492 /*
493 * ToPIC 97, 100
494 * At offset 0xa1: INTERRUPT CONTROL register

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552 pci_write_config(sc->dev, CBBR_IOLIMIT1, 0, 4);
553}
554
555static int
556pccbb_attach(device_t brdev)
557{
558 struct pccbb_softc *sc = (struct pccbb_softc *)device_get_softc(brdev);
559 int rid;
491 case CB_TOPIC97:
492 /*
493 * Disable Zoom Video, ToPIC 97, 100.
494 */
495 pci_write_config(sc->dev, CBBR_TOPIC_ZV_CONTROL, 0, 1);
496 /*
497 * ToPIC 97, 100
498 * At offset 0xa1: INTERRUPT CONTROL register

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556 pci_write_config(sc->dev, CBBR_IOLIMIT1, 0, 4);
557}
558
559static int
560pccbb_attach(device_t brdev)
561{
562 struct pccbb_softc *sc = (struct pccbb_softc *)device_get_softc(brdev);
563 int rid;
560 uint32_t sockbase;
561
562 mtx_init(&sc->mtx, device_get_nameunit(brdev), "pccbb", MTX_DEF);
563 cv_init(&sc->cv, "pccbb cv");
564 sc->chipset = pccbb_chipset(pci_get_devid(brdev), NULL);
565 sc->dev = brdev;
566 sc->cbdev = NULL;
567 sc->pccarddev = NULL;
568 sc->secbus = pci_read_config(brdev, PCIR_SECBUS_2, 1);

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610 DEVPRINTF((brdev, "PCI Memory allocated: %08lx\n",
611 rman_get_start(sc->base_res)));
612 } else {
613 device_printf(brdev, "Could not map register memory\n");
614 mtx_destroy(&sc->mtx);
615 cv_destroy(&sc->cv);
616 return (ENOMEM);
617 }
564
565 mtx_init(&sc->mtx, device_get_nameunit(brdev), "pccbb", MTX_DEF);
566 cv_init(&sc->cv, "pccbb cv");
567 sc->chipset = pccbb_chipset(pci_get_devid(brdev), NULL);
568 sc->dev = brdev;
569 sc->cbdev = NULL;
570 sc->pccarddev = NULL;
571 sc->secbus = pci_read_config(brdev, PCIR_SECBUS_2, 1);

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613 DEVPRINTF((brdev, "PCI Memory allocated: %08lx\n",
614 rman_get_start(sc->base_res)));
615 } else {
616 device_printf(brdev, "Could not map register memory\n");
617 mtx_destroy(&sc->mtx);
618 cv_destroy(&sc->cv);
619 return (ENOMEM);
620 }
621#endif
618 }
619
620 sc->bst = rman_get_bustag(sc->base_res);
621 sc->bsh = rman_get_bushandle(sc->base_res);
622 }
623
624 sc->bst = rman_get_bustag(sc->base_res);
625 sc->bsh = rman_get_bushandle(sc->base_res);
622 exca_init(&sc->exca, brdev, &pccbb_pcic_write, &pccbb_pcic_read,
623 sc->bst, sc->bsh, 0x800);
626 exca_init(&sc->exca, brdev, sc->bst, sc->bsh, CBB_EXCA_OFFSET);
627 sc->exca.flags |= EXCA_HAS_MEMREG_WIN;
624 pccbb_chipinit(sc);
625
626 /* attach children */
627 sc->cbdev = device_add_child(brdev, "cardbus", -1);
628 if (sc->cbdev == NULL)
629 DEVPRINTF((brdev, "WARNING: cannot add cardbus bus.\n"));
630 else if (device_probe_and_attach(sc->cbdev) != 0) {
631 DEVPRINTF((brdev, "WARNING: cannot attach cardbus bus!\n"));

--- 1332 unchanged lines hidden --- 		628 pccbb_chipinit(sc);
629
630 /* attach children */
631 sc->cbdev = device_add_child(brdev, "cardbus", -1);
632 if (sc->cbdev == NULL)
633 DEVPRINTF((brdev, "WARNING: cannot add cardbus bus.\n"));
634 else if (device_probe_and_attach(sc->cbdev) != 0) {
635 DEVPRINTF((brdev, "WARNING: cannot attach cardbus bus!\n"));

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