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1/*-
2 * Copyright (c) 2004
3 * Bill Paul <wpaul@windriver.com>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD: head/sys/dev/mii/ciphy.c 164830 2006-12-02 19:36:25Z marius $");
35
36/*
37 * Driver for the Cicada CS8201 10/100/1000 copper PHY.
38 */
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#include <sys/kernel.h>
43#include <sys/module.h>
44#include <sys/socket.h>
45#include <sys/bus.h>
46
47#include <net/if.h>
48#include <net/if_arp.h>
49#include <net/if_media.h>
50
51#include <dev/mii/mii.h>
52#include <dev/mii/miivar.h>
53#include "miidevs.h"
54
55#include <dev/mii/ciphyreg.h>
56
57#include "miibus_if.h"
58
59#include <machine/bus.h>
60/*
61#include <dev/vge/if_vgereg.h>
62*/
63static int ciphy_probe(device_t);
64static int ciphy_attach(device_t);
65
66static device_method_t ciphy_methods[] = {
67 /* device interface */
68 DEVMETHOD(device_probe, ciphy_probe),
69 DEVMETHOD(device_attach, ciphy_attach),
70 DEVMETHOD(device_detach, mii_phy_detach),
71 DEVMETHOD(device_shutdown, bus_generic_shutdown),
72 { 0, 0 }
73};
74
75static devclass_t ciphy_devclass;
76
77static driver_t ciphy_driver = {
78 "ciphy",
79 ciphy_methods,
80 sizeof(struct mii_softc)
81};
82
83DRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0);
84
85static int ciphy_service(struct mii_softc *, struct mii_data *, int);
86static void ciphy_status(struct mii_softc *);
87static void ciphy_reset(struct mii_softc *);
88static void ciphy_fixup(struct mii_softc *);
89
90static const struct mii_phydesc ciphys[] = {
91 MII_PHY_DESC(CICADA, CS8201),
92 MII_PHY_DESC(CICADA, CS8201A),
93 MII_PHY_DESC(CICADA, CS8201B),
94 MII_PHY_END
95};
96
97static int
98ciphy_probe(device_t dev)
99{
100
101 return (mii_phy_dev_probe(dev, ciphys, BUS_PROBE_DEFAULT));
102}
103
104static int
105ciphy_attach(device_t dev)
106{
107 struct mii_softc *sc;
108 struct mii_attach_args *ma;
109 struct mii_data *mii;
110
111 sc = device_get_softc(dev);
112 ma = device_get_ivars(dev);
113 sc->mii_dev = device_get_parent(dev);
114 mii = device_get_softc(sc->mii_dev);
115 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
116
117 sc->mii_inst = mii->mii_instance;
118 sc->mii_phy = ma->mii_phyno;
119 sc->mii_service = ciphy_service;
120 sc->mii_pdata = mii;
121
122 sc->mii_flags |= MIIF_NOISOLATE;
123 mii->mii_instance++;
124
125 ciphy_reset(sc);
126
127 sc->mii_capabilities =
128 PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
129 if (sc->mii_capabilities & BMSR_EXTSTAT)
130 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
131 device_printf(dev, " ");
132 mii_phy_add_media(sc);
133 printf("\n");
134
135 MIIBUS_MEDIAINIT(sc->mii_dev);
136 return (0);
137}
138
139static int
140ciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
141{
142 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
143 int reg, speed, gig;
144
145 switch (cmd) {
146 case MII_POLLSTAT:
147 /*
148 * If we're not polling our PHY instance, just return.
149 */
150 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
151 return (0);
152 break;
153
154 case MII_MEDIACHG:
155 /*
156 * If the media indicates a different PHY instance,
157 * isolate ourselves.
158 */
159 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
160 reg = PHY_READ(sc, MII_BMCR);
161 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
162 return (0);
163 }
164
165 /*
166 * If the interface is not up, don't do anything.
167 */
168 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
169 break;
170
171 ciphy_fixup(sc); /* XXX hardware bug work-around */
172
173 switch (IFM_SUBTYPE(ife->ifm_media)) {
174 case IFM_AUTO:
175#ifdef foo
176 /*
177 * If we're already in auto mode, just return.
178 */
179 if (PHY_READ(sc, CIPHY_MII_BMCR) & CIPHY_BMCR_AUTOEN)
180 return (0);
181#endif
182 (void) mii_phy_auto(sc);
183 break;
184 case IFM_1000_T:
185 speed = CIPHY_S1000;
186 goto setit;
187 case IFM_100_TX:
188 speed = CIPHY_S100;
189 goto setit;
190 case IFM_10_T:
191 speed = CIPHY_S10;
192setit:
193 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) {
194 speed |= CIPHY_BMCR_FDX;
195 gig = CIPHY_1000CTL_AFD;
196 } else {
197 gig = CIPHY_1000CTL_AHD;
198 }
199
200 PHY_WRITE(sc, CIPHY_MII_1000CTL, 0);
201 PHY_WRITE(sc, CIPHY_MII_BMCR, speed);
202 PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE);
203
204 if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T)
205 break;
206
207 PHY_WRITE(sc, CIPHY_MII_1000CTL, gig);
208 PHY_WRITE(sc, CIPHY_MII_BMCR,
209 speed|CIPHY_BMCR_AUTOEN|CIPHY_BMCR_STARTNEG);
210
211 /*
212 * When setting the link manually, one side must
213 * be the master and the other the slave. However
214 * ifmedia doesn't give us a good way to specify
215 * this, so we fake it by using one of the LINK
216 * flags. If LINK0 is set, we program the PHY to
217 * be a master, otherwise it's a slave.
218 */
219 if ((mii->mii_ifp->if_flags & IFF_LINK0)) {
220 PHY_WRITE(sc, CIPHY_MII_1000CTL,
221 gig|CIPHY_1000CTL_MSE|CIPHY_1000CTL_MSC);
222 } else {
223 PHY_WRITE(sc, CIPHY_MII_1000CTL,
224 gig|CIPHY_1000CTL_MSE);
225 }
226 break;
227 case IFM_NONE:
228 PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN);
229 break;
230 case IFM_100_T4:
231 default:
232 return (EINVAL);
233 }
234 break;
235
236 case MII_TICK:
237 /*
238 * If we're not currently selected, just return.
239 */
240 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
241 return (0);
242
243 /*
244 * Is the interface even up?
245 */
246 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
247 return (0);
248
249 /*
250 * Only used for autonegotiation.
251 */
252 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
253 break;
254
255 /*
256 * Check to see if we have link. If we do, we don't
257 * need to restart the autonegotiation process. Read
258 * the BMSR twice in case it's latched.
259 */
260 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
261 if (reg & BMSR_LINK)
262 break;
263
264 /*
265 * Only retry autonegotiation every 5 seconds.
266 */
267 if (++sc->mii_ticks <= MII_ANEGTICKS)
268 break;
269
270 sc->mii_ticks = 0;
271 mii_phy_auto(sc);
272 return (0);
273 }
274
275 /* Update the media status. */
276 ciphy_status(sc);
277
278 /*
279 * Callback if something changed. Note that we need to poke
280 * apply fixups for certain PHY revs.
281 */
282 if (sc->mii_media_active != mii->mii_media_active ||
283 sc->mii_media_status != mii->mii_media_status ||
284 cmd == MII_MEDIACHG) {
285 ciphy_fixup(sc);
286 }
287 mii_phy_update(sc, cmd);
288 return (0);
289}
290
291static void
292ciphy_status(struct mii_softc *sc)
293{
294 struct mii_data *mii = sc->mii_pdata;
295 int bmsr, bmcr;
296
297 mii->mii_media_status = IFM_AVALID;
298 mii->mii_media_active = IFM_ETHER;
299
300 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
301
302 if (bmsr & BMSR_LINK)
303 mii->mii_media_status |= IFM_ACTIVE;
304
305 bmcr = PHY_READ(sc, CIPHY_MII_BMCR);
306
307 if (bmcr & CIPHY_BMCR_LOOP)
308 mii->mii_media_active |= IFM_LOOP;
309
310 if (bmcr & CIPHY_BMCR_AUTOEN) {
311 if ((bmsr & CIPHY_BMSR_ACOMP) == 0) {
312 /* Erg, still trying, I guess... */
313 mii->mii_media_active |= IFM_NONE;
314 return;
315 }
316 }
317
318 bmsr = PHY_READ(sc, CIPHY_MII_AUXCSR);
319 switch (bmsr & CIPHY_AUXCSR_SPEED) {
320 case CIPHY_SPEED10:
321 mii->mii_media_active |= IFM_10_T;
322 break;
323 case CIPHY_SPEED100:
324 mii->mii_media_active |= IFM_100_TX;
325 break;
326 case CIPHY_SPEED1000:
327 mii->mii_media_active |= IFM_1000_T;
328 break;
329 default:
330 device_printf(sc->mii_dev, "unknown PHY speed %x\n",
331 bmsr & CIPHY_AUXCSR_SPEED);
332 break;
333 }
334
335 if (bmsr & CIPHY_AUXCSR_FDX)
336 mii->mii_media_active |= IFM_FDX;
337}
338
339static void
340ciphy_reset(struct mii_softc *sc)
341{
342
343 mii_phy_reset(sc);
344 DELAY(1000);
345}
346
347#define PHY_SETBIT(x, y, z) \
348 PHY_WRITE(x, y, (PHY_READ(x, y) | (z)))
349#define PHY_CLRBIT(x, y, z) \
350 PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z)))
351
352static void
353ciphy_fixup(struct mii_softc *sc)
354{
355 uint16_t model;
356 uint16_t status, speed;
357
358 model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2));
359 status = PHY_READ(sc, CIPHY_MII_AUXCSR);
360 speed = status & CIPHY_AUXCSR_SPEED;
361
362 switch (model) {
363 case MII_MODEL_CICADA_CS8201:
364
365 /* Turn off "aux mode" (whatever that means) */
366 PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS);
367
368 /*
369 * Work around speed polling bug in VT3119/VT3216
370 * when using MII in full duplex mode.
371 */
372 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
373 (status & CIPHY_AUXCSR_FDX)) {
374 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
375 } else {
376 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
377 }
378
379 /* Enable link/activity LED blink. */
380 PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK);
381
382 break;
383
384 case MII_MODEL_CICADA_CS8201A:
385 case MII_MODEL_CICADA_CS8201B:
386
387 /*
388 * Work around speed polling bug in VT3119/VT3216
389 * when using MII in full duplex mode.
390 */
391 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
392 (status & CIPHY_AUXCSR_FDX)) {
393 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
394 } else {
395 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
396 }
397
398 break;
399 default:
400 device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n",
401 model);
402 break;
403 }
404}